2 * linux/arch/arm/mach-omap2/io.c
4 * OMAP2 I/O mapping code
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
13 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
23 #include <linux/clk.h>
24 #include <linux/omapfb.h>
27 #include <asm/mach/map.h>
29 #include <plat/sram.h>
30 #include <plat/sdrc.h>
31 #include <plat/serial.h>
32 #include <plat/omap-pm.h>
33 #include <plat/omap_hwmod.h>
34 #include <plat/multi.h>
38 #include "powerdomain.h"
39 #include "clockdomain.h"
41 #include "clock2xxx.h"
42 #include "clock3xxx.h"
43 #include "clock44xx.h"
46 * The machine specific code may provide the extra mapping besides the
47 * default mapping provided here.
50 #ifdef CONFIG_ARCH_OMAP2
51 static struct map_desc omap24xx_io_desc[] __initdata = {
53 .virtual = L3_24XX_VIRT,
54 .pfn = __phys_to_pfn(L3_24XX_PHYS),
55 .length = L3_24XX_SIZE,
59 .virtual = L4_24XX_VIRT,
60 .pfn = __phys_to_pfn(L4_24XX_PHYS),
61 .length = L4_24XX_SIZE,
66 #ifdef CONFIG_SOC_OMAP2420
67 static struct map_desc omap242x_io_desc[] __initdata = {
69 .virtual = DSP_MEM_2420_VIRT,
70 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
71 .length = DSP_MEM_2420_SIZE,
75 .virtual = DSP_IPI_2420_VIRT,
76 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
77 .length = DSP_IPI_2420_SIZE,
81 .virtual = DSP_MMU_2420_VIRT,
82 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
83 .length = DSP_MMU_2420_SIZE,
90 #ifdef CONFIG_SOC_OMAP2430
91 static struct map_desc omap243x_io_desc[] __initdata = {
93 .virtual = L4_WK_243X_VIRT,
94 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
95 .length = L4_WK_243X_SIZE,
99 .virtual = OMAP243X_GPMC_VIRT,
100 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
101 .length = OMAP243X_GPMC_SIZE,
105 .virtual = OMAP243X_SDRC_VIRT,
106 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
107 .length = OMAP243X_SDRC_SIZE,
111 .virtual = OMAP243X_SMS_VIRT,
112 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
113 .length = OMAP243X_SMS_SIZE,
120 #ifdef CONFIG_ARCH_OMAP3
121 static struct map_desc omap34xx_io_desc[] __initdata = {
123 .virtual = L3_34XX_VIRT,
124 .pfn = __phys_to_pfn(L3_34XX_PHYS),
125 .length = L3_34XX_SIZE,
129 .virtual = L4_34XX_VIRT,
130 .pfn = __phys_to_pfn(L4_34XX_PHYS),
131 .length = L4_34XX_SIZE,
135 .virtual = OMAP34XX_GPMC_VIRT,
136 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
137 .length = OMAP34XX_GPMC_SIZE,
141 .virtual = OMAP343X_SMS_VIRT,
142 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
143 .length = OMAP343X_SMS_SIZE,
147 .virtual = OMAP343X_SDRC_VIRT,
148 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
149 .length = OMAP343X_SDRC_SIZE,
153 .virtual = L4_PER_34XX_VIRT,
154 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
155 .length = L4_PER_34XX_SIZE,
159 .virtual = L4_EMU_34XX_VIRT,
160 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
161 .length = L4_EMU_34XX_SIZE,
164 #if defined(CONFIG_DEBUG_LL) && \
165 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
167 .virtual = ZOOM_UART_VIRT,
168 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
176 #ifdef CONFIG_SOC_OMAPTI81XX
177 static struct map_desc omapti81xx_io_desc[] __initdata = {
179 .virtual = L4_34XX_VIRT,
180 .pfn = __phys_to_pfn(L4_34XX_PHYS),
181 .length = L4_34XX_SIZE,
187 #ifdef CONFIG_SOC_OMAPAM33XX
188 static struct map_desc omapam33xx_io_desc[] __initdata = {
190 .virtual = L4_34XX_VIRT,
191 .pfn = __phys_to_pfn(L4_34XX_PHYS),
192 .length = L4_34XX_SIZE,
196 .virtual = L4_WK_AM33XX_VIRT,
197 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
198 .length = L4_WK_AM33XX_SIZE,
204 #ifdef CONFIG_ARCH_OMAP4
205 static struct map_desc omap44xx_io_desc[] __initdata = {
207 .virtual = L3_44XX_VIRT,
208 .pfn = __phys_to_pfn(L3_44XX_PHYS),
209 .length = L3_44XX_SIZE,
213 .virtual = L4_44XX_VIRT,
214 .pfn = __phys_to_pfn(L4_44XX_PHYS),
215 .length = L4_44XX_SIZE,
219 .virtual = OMAP44XX_GPMC_VIRT,
220 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
221 .length = OMAP44XX_GPMC_SIZE,
225 .virtual = OMAP44XX_EMIF1_VIRT,
226 .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
227 .length = OMAP44XX_EMIF1_SIZE,
231 .virtual = OMAP44XX_EMIF2_VIRT,
232 .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
233 .length = OMAP44XX_EMIF2_SIZE,
237 .virtual = OMAP44XX_DMM_VIRT,
238 .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
239 .length = OMAP44XX_DMM_SIZE,
243 .virtual = L4_PER_44XX_VIRT,
244 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
245 .length = L4_PER_44XX_SIZE,
249 .virtual = L4_EMU_44XX_VIRT,
250 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
251 .length = L4_EMU_44XX_SIZE,
254 #ifdef CONFIG_OMAP4_ERRATA_I688
256 .virtual = OMAP4_SRAM_VA,
257 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
259 .type = MT_MEMORY_SO,
266 #ifdef CONFIG_SOC_OMAP2420
267 void __init omap242x_map_common_io(void)
269 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
270 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
274 #ifdef CONFIG_SOC_OMAP2430
275 void __init omap243x_map_common_io(void)
277 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
278 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
282 #ifdef CONFIG_ARCH_OMAP3
283 void __init omap34xx_map_common_io(void)
285 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
289 #ifdef CONFIG_SOC_OMAPTI81XX
290 void __init omapti81xx_map_common_io(void)
292 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
296 #ifdef CONFIG_SOC_OMAPAM33XX
297 void __init omapam33xx_map_common_io(void)
299 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
303 #ifdef CONFIG_ARCH_OMAP4
304 void __init omap44xx_map_common_io(void)
306 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
311 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
313 * Sets the CORE DPLL3 M2 divider to the same value that it's at
314 * currently. This has the effect of setting the SDRC SDRAM AC timing
315 * registers to the values currently defined by the kernel. Currently
316 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
317 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
318 * or passes along the return value of clk_set_rate().
320 static int __init _omap2_init_reprogram_sdrc(void)
322 struct clk *dpll3_m2_ck;
326 if (!cpu_is_omap34xx())
329 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
330 if (IS_ERR(dpll3_m2_ck))
333 rate = clk_get_rate(dpll3_m2_ck);
334 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
335 v = clk_set_rate(dpll3_m2_ck, rate);
337 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
339 clk_put(dpll3_m2_ck);
344 static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
346 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
349 static void __init omap_common_init_early(void)
351 omap2_check_revision();
352 omap_init_consistent_dma_size();
355 static void __init omap_hwmod_init_postsetup(void)
359 /* Set the default postsetup state for all hwmods */
360 #ifdef CONFIG_PM_RUNTIME
361 postsetup_state = _HWMOD_STATE_IDLE;
363 postsetup_state = _HWMOD_STATE_ENABLED;
365 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
368 * Set the default postsetup state for unusual modules (like
371 * The postsetup_state is not actually used until
372 * omap_hwmod_late_init(), so boards that desire full watchdog
373 * coverage of kernel initialization can reprogram the
374 * postsetup_state between the calls to
375 * omap2_init_common_infra() and omap_sdrc_init().
377 * XXX ideally we could detect whether the MPU WDT was currently
378 * enabled here and make this conditional
380 postsetup_state = _HWMOD_STATE_DISABLED;
381 omap_hwmod_for_each_by_class("wd_timer",
382 _set_hwmod_postsetup_state,
385 omap_pm_if_early_init();
388 #ifdef CONFIG_SOC_OMAP2420
389 void __init omap2420_init_early(void)
391 omap2_set_globals_242x();
392 omap_common_init_early();
393 omap2xxx_voltagedomains_init();
394 omap242x_powerdomains_init();
395 omap242x_clockdomains_init();
396 omap2420_hwmod_init();
397 omap_hwmod_init_postsetup();
402 #ifdef CONFIG_SOC_OMAP2430
403 void __init omap2430_init_early(void)
405 omap2_set_globals_243x();
406 omap_common_init_early();
407 omap2xxx_voltagedomains_init();
408 omap243x_powerdomains_init();
409 omap243x_clockdomains_init();
410 omap2430_hwmod_init();
411 omap_hwmod_init_postsetup();
417 * Currently only board-omap3beagle.c should call this because of the
418 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
420 #ifdef CONFIG_ARCH_OMAP3
421 void __init omap3_init_early(void)
423 omap2_set_globals_3xxx();
424 omap_common_init_early();
425 omap3xxx_voltagedomains_init();
426 omap3xxx_powerdomains_init();
427 omap3xxx_clockdomains_init();
428 omap3xxx_hwmod_init();
429 omap_hwmod_init_postsetup();
433 void __init omap3430_init_early(void)
438 void __init omap35xx_init_early(void)
443 void __init omap3630_init_early(void)
448 void __init am35xx_init_early(void)
453 void __init ti81xx_init_early(void)
455 omap2_set_globals_ti81xx();
456 omap_common_init_early();
457 omap3xxx_voltagedomains_init();
458 omap3xxx_powerdomains_init();
459 omap3xxx_clockdomains_init();
460 omap3xxx_hwmod_init();
461 omap_hwmod_init_postsetup();
466 #ifdef CONFIG_ARCH_OMAP4
467 void __init omap4430_init_early(void)
469 omap2_set_globals_443x();
470 omap_common_init_early();
471 omap44xx_voltagedomains_init();
472 omap44xx_powerdomains_init();
473 omap44xx_clockdomains_init();
474 omap44xx_hwmod_init();
475 omap_hwmod_init_postsetup();
480 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
481 struct omap_sdrc_params *sdrc_cs1)
485 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
486 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
487 _omap2_init_reprogram_sdrc();