2 * linux/arch/arm/mach-omap2/devices.c
4 * OMAP2 platform device setup/initialization
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
16 #include <linux/clk.h>
17 #include <linux/err.h>
19 #include <mach/hardware.h>
20 #include <mach/irqs.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/map.h>
26 #include <plat/board.h>
27 #include <plat/mcbsp.h>
28 #include <mach/gpio.h>
31 #include <plat/omap_hwmod.h>
32 #include <plat/omap_device.h>
37 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
39 static struct resource cam_resources[] = {
41 .start = OMAP24XX_CAMERA_BASE,
42 .end = OMAP24XX_CAMERA_BASE + 0xfff,
43 .flags = IORESOURCE_MEM,
46 .start = INT_24XX_CAM_IRQ,
47 .flags = IORESOURCE_IRQ,
51 static struct platform_device omap_cam_device = {
52 .name = "omap24xxcam",
54 .num_resources = ARRAY_SIZE(cam_resources),
55 .resource = cam_resources,
58 static inline void omap_init_camera(void)
60 platform_device_register(&omap_cam_device);
63 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
65 static struct resource omap3isp_resources[] = {
67 .start = OMAP3430_ISP_BASE,
68 .end = OMAP3430_ISP_END,
69 .flags = IORESOURCE_MEM,
72 .start = OMAP3430_ISP_CBUFF_BASE,
73 .end = OMAP3430_ISP_CBUFF_END,
74 .flags = IORESOURCE_MEM,
77 .start = OMAP3430_ISP_CCP2_BASE,
78 .end = OMAP3430_ISP_CCP2_END,
79 .flags = IORESOURCE_MEM,
82 .start = OMAP3430_ISP_CCDC_BASE,
83 .end = OMAP3430_ISP_CCDC_END,
84 .flags = IORESOURCE_MEM,
87 .start = OMAP3430_ISP_HIST_BASE,
88 .end = OMAP3430_ISP_HIST_END,
89 .flags = IORESOURCE_MEM,
92 .start = OMAP3430_ISP_H3A_BASE,
93 .end = OMAP3430_ISP_H3A_END,
94 .flags = IORESOURCE_MEM,
97 .start = OMAP3430_ISP_PREV_BASE,
98 .end = OMAP3430_ISP_PREV_END,
99 .flags = IORESOURCE_MEM,
102 .start = OMAP3430_ISP_RESZ_BASE,
103 .end = OMAP3430_ISP_RESZ_END,
104 .flags = IORESOURCE_MEM,
107 .start = OMAP3430_ISP_SBL_BASE,
108 .end = OMAP3430_ISP_SBL_END,
109 .flags = IORESOURCE_MEM,
112 .start = OMAP3430_ISP_CSI2A_BASE,
113 .end = OMAP3430_ISP_CSI2A_END,
114 .flags = IORESOURCE_MEM,
117 .start = OMAP3430_ISP_CSI2PHY_BASE,
118 .end = OMAP3430_ISP_CSI2PHY_END,
119 .flags = IORESOURCE_MEM,
122 .start = INT_34XX_CAM_IRQ,
123 .flags = IORESOURCE_IRQ,
127 static struct platform_device omap3isp_device = {
130 .num_resources = ARRAY_SIZE(omap3isp_resources),
131 .resource = omap3isp_resources,
134 static inline void omap_init_camera(void)
136 platform_device_register(&omap3isp_device);
139 static inline void omap_init_camera(void)
144 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
146 #define MBOX_REG_SIZE 0x120
148 #ifdef CONFIG_ARCH_OMAP2
149 static struct resource omap2_mbox_resources[] = {
151 .start = OMAP24XX_MAILBOX_BASE,
152 .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
153 .flags = IORESOURCE_MEM,
156 .start = INT_24XX_MAIL_U0_MPU,
157 .flags = IORESOURCE_IRQ,
161 .start = INT_24XX_MAIL_U3_MPU,
162 .flags = IORESOURCE_IRQ,
166 static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources);
168 #define omap2_mbox_resources NULL
169 #define omap2_mbox_resources_sz 0
172 #ifdef CONFIG_ARCH_OMAP3
173 static struct resource omap3_mbox_resources[] = {
175 .start = OMAP34XX_MAILBOX_BASE,
176 .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
177 .flags = IORESOURCE_MEM,
180 .start = INT_24XX_MAIL_U0_MPU,
181 .flags = IORESOURCE_IRQ,
185 static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources);
187 #define omap3_mbox_resources NULL
188 #define omap3_mbox_resources_sz 0
191 #ifdef CONFIG_ARCH_OMAP4
193 #define OMAP4_MBOX_REG_SIZE 0x130
194 static struct resource omap4_mbox_resources[] = {
196 .start = OMAP44XX_MAILBOX_BASE,
197 .end = OMAP44XX_MAILBOX_BASE +
198 OMAP4_MBOX_REG_SIZE - 1,
199 .flags = IORESOURCE_MEM,
202 .start = OMAP44XX_IRQ_MAIL_U0,
203 .flags = IORESOURCE_IRQ,
207 static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources);
209 #define omap4_mbox_resources NULL
210 #define omap4_mbox_resources_sz 0
213 static struct platform_device mbox_device = {
214 .name = "omap-mailbox",
218 static inline void omap_init_mbox(void)
220 if (cpu_is_omap24xx()) {
221 mbox_device.resource = omap2_mbox_resources;
222 mbox_device.num_resources = omap2_mbox_resources_sz;
223 } else if (cpu_is_omap34xx()) {
224 mbox_device.resource = omap3_mbox_resources;
225 mbox_device.num_resources = omap3_mbox_resources_sz;
226 } else if (cpu_is_omap44xx()) {
227 mbox_device.resource = omap4_mbox_resources;
228 mbox_device.num_resources = omap4_mbox_resources_sz;
230 pr_err("%s: platform not supported\n", __func__);
233 platform_device_register(&mbox_device);
236 static inline void omap_init_mbox(void) { }
237 #endif /* CONFIG_OMAP_MBOX_FWK */
239 static inline void omap_init_sti(void) {}
241 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
243 static struct platform_device omap_pcm = {
244 .name = "omap-pcm-audio",
249 * OMAP2420 has 2 McBSP ports
250 * OMAP2430 has 5 McBSP ports
251 * OMAP3 has 5 McBSP ports
252 * OMAP4 has 4 McBSP ports
254 OMAP_MCBSP_PLATFORM_DEVICE(1);
255 OMAP_MCBSP_PLATFORM_DEVICE(2);
256 OMAP_MCBSP_PLATFORM_DEVICE(3);
257 OMAP_MCBSP_PLATFORM_DEVICE(4);
258 OMAP_MCBSP_PLATFORM_DEVICE(5);
260 static void omap_init_audio(void)
262 platform_device_register(&omap_mcbsp1);
263 platform_device_register(&omap_mcbsp2);
264 if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
265 platform_device_register(&omap_mcbsp3);
266 platform_device_register(&omap_mcbsp4);
268 if (cpu_is_omap243x() || cpu_is_omap34xx())
269 platform_device_register(&omap_mcbsp5);
271 platform_device_register(&omap_pcm);
275 static inline void omap_init_audio(void) {}
278 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
280 #include <plat/mcspi.h>
282 #define OMAP2_MCSPI1_BASE 0x48098000
283 #define OMAP2_MCSPI2_BASE 0x4809a000
284 #define OMAP2_MCSPI3_BASE 0x480b8000
285 #define OMAP2_MCSPI4_BASE 0x480ba000
287 #define OMAP4_MCSPI1_BASE 0x48098100
288 #define OMAP4_MCSPI2_BASE 0x4809a100
289 #define OMAP4_MCSPI3_BASE 0x480b8100
290 #define OMAP4_MCSPI4_BASE 0x480ba100
292 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
296 static struct resource omap2_mcspi1_resources[] = {
298 .start = OMAP2_MCSPI1_BASE,
299 .end = OMAP2_MCSPI1_BASE + 0xff,
300 .flags = IORESOURCE_MEM,
304 static struct platform_device omap2_mcspi1 = {
305 .name = "omap2_mcspi",
307 .num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
308 .resource = omap2_mcspi1_resources,
310 .platform_data = &omap2_mcspi1_config,
314 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
318 static struct resource omap2_mcspi2_resources[] = {
320 .start = OMAP2_MCSPI2_BASE,
321 .end = OMAP2_MCSPI2_BASE + 0xff,
322 .flags = IORESOURCE_MEM,
326 static struct platform_device omap2_mcspi2 = {
327 .name = "omap2_mcspi",
329 .num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
330 .resource = omap2_mcspi2_resources,
332 .platform_data = &omap2_mcspi2_config,
336 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
337 defined(CONFIG_ARCH_OMAP4)
338 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
342 static struct resource omap2_mcspi3_resources[] = {
344 .start = OMAP2_MCSPI3_BASE,
345 .end = OMAP2_MCSPI3_BASE + 0xff,
346 .flags = IORESOURCE_MEM,
350 static struct platform_device omap2_mcspi3 = {
351 .name = "omap2_mcspi",
353 .num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
354 .resource = omap2_mcspi3_resources,
356 .platform_data = &omap2_mcspi3_config,
361 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
362 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
366 static struct resource omap2_mcspi4_resources[] = {
368 .start = OMAP2_MCSPI4_BASE,
369 .end = OMAP2_MCSPI4_BASE + 0xff,
370 .flags = IORESOURCE_MEM,
374 static struct platform_device omap2_mcspi4 = {
375 .name = "omap2_mcspi",
377 .num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
378 .resource = omap2_mcspi4_resources,
380 .platform_data = &omap2_mcspi4_config,
385 #ifdef CONFIG_ARCH_OMAP4
386 static inline void omap4_mcspi_fixup(void)
388 omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
389 omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff;
390 omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
391 omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff;
392 omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
393 omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff;
394 omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
395 omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff;
398 static inline void omap4_mcspi_fixup(void)
403 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
404 defined(CONFIG_ARCH_OMAP4)
405 static inline void omap2_mcspi3_init(void)
407 platform_device_register(&omap2_mcspi3);
410 static inline void omap2_mcspi3_init(void)
415 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
416 static inline void omap2_mcspi4_init(void)
418 platform_device_register(&omap2_mcspi4);
421 static inline void omap2_mcspi4_init(void)
426 static void omap_init_mcspi(void)
428 if (cpu_is_omap44xx())
431 platform_device_register(&omap2_mcspi1);
432 platform_device_register(&omap2_mcspi2);
434 if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
437 if (cpu_is_omap343x() || cpu_is_omap44xx())
442 static inline void omap_init_mcspi(void) {}
445 static struct resource omap2_pmu_resource = {
448 .flags = IORESOURCE_IRQ,
451 static struct resource omap3_pmu_resource = {
452 .start = INT_34XX_BENCH_MPU_EMUL,
453 .end = INT_34XX_BENCH_MPU_EMUL,
454 .flags = IORESOURCE_IRQ,
457 static struct platform_device omap_pmu_device = {
459 .id = ARM_PMU_DEVICE_CPU,
463 static void omap_init_pmu(void)
465 if (cpu_is_omap24xx())
466 omap_pmu_device.resource = &omap2_pmu_resource;
467 else if (cpu_is_omap34xx())
468 omap_pmu_device.resource = &omap3_pmu_resource;
472 platform_device_register(&omap_pmu_device);
476 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
478 #ifdef CONFIG_ARCH_OMAP2
479 static struct resource omap2_sham_resources[] = {
481 .start = OMAP24XX_SEC_SHA1MD5_BASE,
482 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
483 .flags = IORESOURCE_MEM,
486 .start = INT_24XX_SHA1MD5,
487 .flags = IORESOURCE_IRQ,
490 static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
492 #define omap2_sham_resources NULL
493 #define omap2_sham_resources_sz 0
496 #ifdef CONFIG_ARCH_OMAP3
497 static struct resource omap3_sham_resources[] = {
499 .start = OMAP34XX_SEC_SHA1MD5_BASE,
500 .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
501 .flags = IORESOURCE_MEM,
504 .start = INT_34XX_SHA1MD52_IRQ,
505 .flags = IORESOURCE_IRQ,
508 .start = OMAP34XX_DMA_SHA1MD5_RX,
509 .flags = IORESOURCE_DMA,
512 static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
514 #define omap3_sham_resources NULL
515 #define omap3_sham_resources_sz 0
518 static struct platform_device sham_device = {
523 static void omap_init_sham(void)
525 if (cpu_is_omap24xx()) {
526 sham_device.resource = omap2_sham_resources;
527 sham_device.num_resources = omap2_sham_resources_sz;
528 } else if (cpu_is_omap34xx()) {
529 sham_device.resource = omap3_sham_resources;
530 sham_device.num_resources = omap3_sham_resources_sz;
532 pr_err("%s: platform not supported\n", __func__);
535 platform_device_register(&sham_device);
538 static inline void omap_init_sham(void) { }
541 #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
543 #ifdef CONFIG_ARCH_OMAP2
544 static struct resource omap2_aes_resources[] = {
546 .start = OMAP24XX_SEC_AES_BASE,
547 .end = OMAP24XX_SEC_AES_BASE + 0x4C,
548 .flags = IORESOURCE_MEM,
551 .start = OMAP24XX_DMA_AES_TX,
552 .flags = IORESOURCE_DMA,
555 .start = OMAP24XX_DMA_AES_RX,
556 .flags = IORESOURCE_DMA,
559 static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
561 #define omap2_aes_resources NULL
562 #define omap2_aes_resources_sz 0
565 #ifdef CONFIG_ARCH_OMAP3
566 static struct resource omap3_aes_resources[] = {
568 .start = OMAP34XX_SEC_AES_BASE,
569 .end = OMAP34XX_SEC_AES_BASE + 0x4C,
570 .flags = IORESOURCE_MEM,
573 .start = OMAP34XX_DMA_AES2_TX,
574 .flags = IORESOURCE_DMA,
577 .start = OMAP34XX_DMA_AES2_RX,
578 .flags = IORESOURCE_DMA,
581 static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
583 #define omap3_aes_resources NULL
584 #define omap3_aes_resources_sz 0
587 static struct platform_device aes_device = {
592 static void omap_init_aes(void)
594 if (cpu_is_omap24xx()) {
595 aes_device.resource = omap2_aes_resources;
596 aes_device.num_resources = omap2_aes_resources_sz;
597 } else if (cpu_is_omap34xx()) {
598 aes_device.resource = omap3_aes_resources;
599 aes_device.num_resources = omap3_aes_resources_sz;
601 pr_err("%s: platform not supported\n", __func__);
604 platform_device_register(&aes_device);
608 static inline void omap_init_aes(void) { }
611 /*-------------------------------------------------------------------------*/
613 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
615 #define MMCHS_SYSCONFIG 0x0010
616 #define MMCHS_SYSCONFIG_SWRESET (1 << 1)
617 #define MMCHS_SYSSTATUS 0x0014
618 #define MMCHS_SYSSTATUS_RESETDONE (1 << 0)
620 static struct platform_device dummy_pdev = {
622 .bus = &platform_bus_type,
627 * omap_hsmmc_reset() - Full reset of each HS-MMC controller
629 * Ensure that each MMC controller is fully reset. Controllers
630 * left in an unknown state (by bootloader) may prevent retention
631 * or OFF-mode. This is especially important in cases where the
632 * MMC driver is not enabled, _or_ built as a module.
634 * In order for reset to work, interface, functional and debounce
635 * clocks must be enabled. The debounce clock comes from func_32k_clk
636 * and is not under SW control, so we only enable i- and f-clocks.
638 static void __init omap_hsmmc_reset(void)
640 u32 i, nr_controllers;
641 struct clk *iclk, *fclk;
643 if (cpu_is_omap242x())
646 nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
647 (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
649 for (i = 0; i < nr_controllers; i++) {
651 struct device *dev = &dummy_pdev.dev;
655 base = OMAP2_MMC1_BASE;
658 base = OMAP2_MMC2_BASE;
661 base = OMAP3_MMC3_BASE;
664 if (!cpu_is_omap44xx())
666 base = OMAP4_MMC4_BASE;
669 if (!cpu_is_omap44xx())
671 base = OMAP4_MMC5_BASE;
675 if (cpu_is_omap44xx())
676 base += OMAP4_MMC_REG_OFFSET;
679 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
680 iclk = clk_get(dev, "ick");
683 if (clk_enable(iclk))
686 fclk = clk_get(dev, "fck");
689 if (clk_enable(fclk))
692 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
693 v = omap_readl(base + MMCHS_SYSSTATUS);
694 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
695 MMCHS_SYSSTATUS_RESETDONE))
712 printk(KERN_WARNING "%s: Unable to enable clocks for MMC%d, "
713 "cannot reset.\n", __func__, i);
716 static inline void omap_hsmmc_reset(void) {}
719 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
720 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
722 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
725 if ((mmc_controller->slots[0].switch_pin > 0) && \
726 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
727 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
728 OMAP_PIN_INPUT_PULLUP);
729 if ((mmc_controller->slots[0].gpio_wp > 0) && \
730 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
731 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
732 OMAP_PIN_INPUT_PULLUP);
734 if (cpu_is_omap2420() && controller_nr == 0) {
735 omap_mux_init_signal("sdmmc_cmd", 0);
736 omap_mux_init_signal("sdmmc_clki", 0);
737 omap_mux_init_signal("sdmmc_clko", 0);
738 omap_mux_init_signal("sdmmc_dat0", 0);
739 omap_mux_init_signal("sdmmc_dat_dir0", 0);
740 omap_mux_init_signal("sdmmc_cmd_dir", 0);
741 if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
742 omap_mux_init_signal("sdmmc_dat1", 0);
743 omap_mux_init_signal("sdmmc_dat2", 0);
744 omap_mux_init_signal("sdmmc_dat3", 0);
745 omap_mux_init_signal("sdmmc_dat_dir1", 0);
746 omap_mux_init_signal("sdmmc_dat_dir2", 0);
747 omap_mux_init_signal("sdmmc_dat_dir3", 0);
751 * Use internal loop-back in MMC/SDIO Module Input Clock
754 if (mmc_controller->slots[0].internal_clock) {
755 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
757 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
761 if (cpu_is_omap34xx()) {
762 if (controller_nr == 0) {
763 omap_mux_init_signal("sdmmc1_clk",
764 OMAP_PIN_INPUT_PULLUP);
765 omap_mux_init_signal("sdmmc1_cmd",
766 OMAP_PIN_INPUT_PULLUP);
767 omap_mux_init_signal("sdmmc1_dat0",
768 OMAP_PIN_INPUT_PULLUP);
769 if (mmc_controller->slots[0].caps &
770 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
771 omap_mux_init_signal("sdmmc1_dat1",
772 OMAP_PIN_INPUT_PULLUP);
773 omap_mux_init_signal("sdmmc1_dat2",
774 OMAP_PIN_INPUT_PULLUP);
775 omap_mux_init_signal("sdmmc1_dat3",
776 OMAP_PIN_INPUT_PULLUP);
778 if (mmc_controller->slots[0].caps &
779 MMC_CAP_8_BIT_DATA) {
780 omap_mux_init_signal("sdmmc1_dat4",
781 OMAP_PIN_INPUT_PULLUP);
782 omap_mux_init_signal("sdmmc1_dat5",
783 OMAP_PIN_INPUT_PULLUP);
784 omap_mux_init_signal("sdmmc1_dat6",
785 OMAP_PIN_INPUT_PULLUP);
786 omap_mux_init_signal("sdmmc1_dat7",
787 OMAP_PIN_INPUT_PULLUP);
790 if (controller_nr == 1) {
792 omap_mux_init_signal("sdmmc2_clk",
793 OMAP_PIN_INPUT_PULLUP);
794 omap_mux_init_signal("sdmmc2_cmd",
795 OMAP_PIN_INPUT_PULLUP);
796 omap_mux_init_signal("sdmmc2_dat0",
797 OMAP_PIN_INPUT_PULLUP);
800 * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
801 * in the board-*.c files
803 if (mmc_controller->slots[0].caps &
804 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
805 omap_mux_init_signal("sdmmc2_dat1",
806 OMAP_PIN_INPUT_PULLUP);
807 omap_mux_init_signal("sdmmc2_dat2",
808 OMAP_PIN_INPUT_PULLUP);
809 omap_mux_init_signal("sdmmc2_dat3",
810 OMAP_PIN_INPUT_PULLUP);
812 if (mmc_controller->slots[0].caps &
813 MMC_CAP_8_BIT_DATA) {
814 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
815 OMAP_PIN_INPUT_PULLUP);
816 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
817 OMAP_PIN_INPUT_PULLUP);
818 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
819 OMAP_PIN_INPUT_PULLUP);
820 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
821 OMAP_PIN_INPUT_PULLUP);
826 * For MMC3 the pins need to be muxed in the board-*.c files
831 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
837 for (i = 0; i < nr_controllers; i++) {
838 unsigned long base, size;
839 unsigned int irq = 0;
844 omap2_mmc_mux(mmc_data[i], i);
848 base = OMAP2_MMC1_BASE;
849 irq = INT_24XX_MMC_IRQ;
852 base = OMAP2_MMC2_BASE;
853 irq = INT_24XX_MMC2_IRQ;
856 if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
858 base = OMAP3_MMC3_BASE;
859 irq = INT_34XX_MMC3_IRQ;
862 if (!cpu_is_omap44xx())
864 base = OMAP4_MMC4_BASE;
865 irq = OMAP44XX_IRQ_MMC4;
868 if (!cpu_is_omap44xx())
870 base = OMAP4_MMC5_BASE;
871 irq = OMAP44XX_IRQ_MMC5;
877 if (cpu_is_omap2420()) {
878 size = OMAP2420_MMC_SIZE;
880 } else if (cpu_is_omap44xx()) {
882 irq += OMAP44XX_IRQ_GIC_START;
883 size = OMAP4_HSMMC_SIZE;
884 name = "mmci-omap-hs";
886 size = OMAP3_HSMMC_SIZE;
887 name = "mmci-omap-hs";
889 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
895 /*-------------------------------------------------------------------------*/
897 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
898 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
899 #define OMAP_HDQ_BASE 0x480B2000
901 static struct resource omap_hdq_resources[] = {
903 .start = OMAP_HDQ_BASE,
904 .end = OMAP_HDQ_BASE + 0x1C,
905 .flags = IORESOURCE_MEM,
908 .start = INT_24XX_HDQ_IRQ,
909 .flags = IORESOURCE_IRQ,
912 static struct platform_device omap_hdq_dev = {
916 .platform_data = NULL,
918 .num_resources = ARRAY_SIZE(omap_hdq_resources),
919 .resource = omap_hdq_resources,
921 static inline void omap_hdq_init(void)
923 (void) platform_device_register(&omap_hdq_dev);
926 static inline void omap_hdq_init(void) {}
929 /*---------------------------------------------------------------------------*/
931 #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
932 defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
933 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
934 static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
937 static struct resource omap_vout_resource[2] = {
941 static struct platform_device omap_vout_device = {
943 .num_resources = ARRAY_SIZE(omap_vout_resource),
944 .resource = &omap_vout_resource[0],
947 static void omap_init_vout(void)
949 if (platform_device_register(&omap_vout_device) < 0)
950 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
953 static inline void omap_init_vout(void) {}
956 /*-------------------------------------------------------------------------*/
958 static int __init omap2_init_devices(void)
961 * please keep these calls, and their implementations above,
962 * in alphabetical order so they're easier to sort through.
978 arch_initcall(omap2_init_devices);
980 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
981 static struct omap_device_pm_latency omap_wdt_latency[] = {
983 .deactivate_func = omap_device_idle_hwmods,
984 .activate_func = omap_device_enable_hwmods,
985 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
989 static int __init omap_init_wdt(void)
992 struct omap_device *od;
993 struct omap_hwmod *oh;
994 char *oh_name = "wd_timer2";
995 char *dev_name = "omap_wdt";
997 if (!cpu_class_is_omap2())
1000 oh = omap_hwmod_lookup(oh_name);
1002 pr_err("Could not look up wd_timer%d hwmod\n", id);
1006 od = omap_device_build(dev_name, id, oh, NULL, 0,
1008 ARRAY_SIZE(omap_wdt_latency), 0);
1009 WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n",
1010 dev_name, oh->name);
1013 subsys_initcall(omap_init_wdt);