2 * SMP support: Entry point for secondary CPUs of Marvell EBU
3 * Cortex-A9 based SOCs (Armada 375 and Armada 38x).
5 * Copyright (C) 2014 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
15 #include <linux/linkage.h>
16 #include <linux/init.h>
18 #include <asm/assembler.h>
21 #define CPU_RESUME_ADDR_REG 0xf10182d4
23 .global armada_375_smp_cpu1_enable_code_start
24 .global armada_375_smp_cpu1_enable_code_end
26 armada_375_smp_cpu1_enable_code_start:
34 .word CPU_RESUME_ADDR_REG
35 armada_375_smp_cpu1_enable_code_end:
37 ENTRY(mvebu_cortex_a9_secondary_startup)
41 ENDPROC(mvebu_cortex_a9_secondary_startup)