Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-fs
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-msm / board-qsd8x50.c
1 /* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  *
12  * You should have received a copy of the GNU General Public License
13  * along with this program; if not, write to the Free Software
14  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15  * 02110-1301, USA.
16  */
17 #include <linux/gpio.h>
18 #include <linux/kernel.h>
19 #include <linux/irq.h>
20 #include <linux/platform_device.h>
21 #include <linux/delay.h>
22 #include <linux/usb/msm_hsusb.h>
23 #include <linux/err.h>
24 #include <linux/clkdev.h>
25
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/io.h>
29 #include <asm/setup.h>
30
31 #include <mach/board.h>
32 #include <mach/irqs.h>
33 #include <mach/sirc.h>
34 #include <mach/vreg.h>
35 #include <linux/platform_data/mmc-msm_sdcc.h>
36
37 #include "devices.h"
38 #include "common.h"
39
40 static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300;
41 static const unsigned        qsd8x50_surf_smc91x_gpio __initconst = 156;
42
43 /* Leave smc91x resources empty here, as we'll fill them in
44  * at run-time: they vary from board to board, and the true
45  * configuration won't be known until boot.
46  */
47 static struct resource smc91x_resources[] = {
48         [0] = {
49                 .flags = IORESOURCE_MEM,
50         },
51         [1] = {
52                 .flags = IORESOURCE_IRQ,
53         },
54 };
55
56 static struct platform_device smc91x_device = {
57         .name           = "smc91x",
58         .id             = 0,
59         .num_resources  = ARRAY_SIZE(smc91x_resources),
60         .resource       = smc91x_resources,
61 };
62
63 static int __init msm_init_smc91x(void)
64 {
65         if (machine_is_qsd8x50_surf()) {
66                 smc91x_resources[0].start = qsd8x50_surf_smc91x_base;
67                 smc91x_resources[0].end   = qsd8x50_surf_smc91x_base + 0xff;
68                 smc91x_resources[1].start =
69                         gpio_to_irq(qsd8x50_surf_smc91x_gpio);
70                 smc91x_resources[1].end   =
71                         gpio_to_irq(qsd8x50_surf_smc91x_gpio);
72                 platform_device_register(&smc91x_device);
73         }
74
75         return 0;
76 }
77 module_init(msm_init_smc91x);
78
79 static int hsusb_phy_init_seq[] = {
80         0x08, 0x31,     /* Increase HS Driver Amplitude */
81         0x20, 0x32,     /* Enable and set Pre-Emphasis Depth to 10% */
82         -1
83 };
84
85 static struct msm_otg_platform_data msm_otg_pdata = {
86         .phy_init_seq           = hsusb_phy_init_seq,
87         .mode                   = USB_PERIPHERAL,
88         .otg_control            = OTG_PHY_CONTROL,
89 };
90
91 static struct platform_device *devices[] __initdata = {
92         &msm_clock_8x50,
93         &msm_device_gpio_8x50,
94         &msm_device_uart3,
95         &msm_device_smd,
96         &msm_device_otg,
97         &msm_device_hsusb,
98         &msm_device_hsusb_host,
99 };
100
101 static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
102         {51, "sdc1_dat_3"},
103         {52, "sdc1_dat_2"},
104         {53, "sdc1_dat_1"},
105         {54, "sdc1_dat_0"},
106         {55, "sdc1_cmd"},
107         {56, "sdc1_clk"}
108 };
109
110 static struct vreg *vreg_mmc;
111 static unsigned long vreg_sts;
112
113 static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
114 {
115         int rc = 0;
116         struct platform_device *pdev;
117
118         pdev = container_of(dv, struct platform_device, dev);
119
120         if (vdd == 0) {
121                 if (!vreg_sts)
122                         return 0;
123
124                 clear_bit(pdev->id, &vreg_sts);
125
126                 if (!vreg_sts) {
127                         rc = vreg_disable(vreg_mmc);
128                         if (rc)
129                                 pr_err("vreg_mmc disable failed for slot "
130                                                 "%d: %d\n", pdev->id, rc);
131                 }
132                 return 0;
133         }
134
135         if (!vreg_sts) {
136                 rc = vreg_set_level(vreg_mmc, 2900);
137                 if (rc)
138                         pr_err("vreg_mmc set level failed for slot %d: %d\n",
139                                         pdev->id, rc);
140                 rc = vreg_enable(vreg_mmc);
141                 if (rc)
142                         pr_err("vreg_mmc enable failed for slot %d: %d\n",
143                                         pdev->id, rc);
144         }
145         set_bit(pdev->id, &vreg_sts);
146         return 0;
147 }
148
149 static struct msm_mmc_gpio_data sdc1_gpio = {
150         .gpio = sdc1_gpio_cfg,
151         .size = ARRAY_SIZE(sdc1_gpio_cfg),
152 };
153
154 static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
155         .ocr_mask       = MMC_VDD_27_28 | MMC_VDD_28_29,
156         .translate_vdd  = msm_sdcc_setup_power,
157         .gpio_data = &sdc1_gpio,
158 };
159
160 static void __init qsd8x50_init_mmc(void)
161 {
162         vreg_mmc = vreg_get(NULL, "gp5");
163
164         if (IS_ERR(vreg_mmc)) {
165                 pr_err("vreg get for vreg_mmc failed (%ld)\n",
166                                 PTR_ERR(vreg_mmc));
167                 return;
168         }
169
170         msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
171 }
172
173 static void __init qsd8x50_map_io(void)
174 {
175         msm_map_qsd8x50_io();
176 }
177
178 static void __init qsd8x50_init_irq(void)
179 {
180         msm_init_irq();
181         msm_init_sirc();
182 }
183
184 static void __init qsd8x50_init(void)
185 {
186         msm_device_otg.dev.platform_data = &msm_otg_pdata;
187         msm_device_hsusb.dev.parent = &msm_device_otg.dev;
188         msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
189         platform_add_devices(devices, ARRAY_SIZE(devices));
190         qsd8x50_init_mmc();
191 }
192
193 static void __init qsd8x50_init_late(void)
194 {
195         smd_debugfs_init();
196 }
197
198 MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
199         .atag_offset = 0x100,
200         .map_io = qsd8x50_map_io,
201         .init_irq = qsd8x50_init_irq,
202         .init_machine = qsd8x50_init,
203         .init_late = qsd8x50_init_late,
204         .init_time      = qsd8x50_timer_init,
205 MACHINE_END
206
207 MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
208         .atag_offset = 0x100,
209         .map_io = qsd8x50_map_io,
210         .init_irq = qsd8x50_init_irq,
211         .init_machine = qsd8x50_init,
212         .init_late = qsd8x50_init_late,
213         .init_time      = qsd8x50_timer_init,
214 MACHINE_END