1 /* Copyright (c) 2010, 2011, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
16 #include <linux/irq.h>
17 #include <linux/irqdomain.h>
19 #include <linux/of_address.h>
20 #include <linux/of_platform.h>
22 #include <asm/mach-types.h>
23 #include <asm/mach/arch.h>
24 #include <asm/hardware/gic.h>
26 #include <mach/board.h>
27 #include <mach/msm_iomap.h>
30 static void __init msm8x60_map_io(void)
35 static void __init msm8x60_init_irq(void)
39 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
40 (void *)MSM_QGIC_CPU_BASE);
42 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
43 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
45 /* RUMI does not adhere to GIC spec by enabling STIs by default.
46 * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
48 if (!machine_is_msm8x60_sim())
49 writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
51 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
52 * as they are configured as level, which does not play nice with
55 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
56 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
57 irq_set_handler(i, handle_percpu_irq);
61 static void __init msm8x60_init(void)
66 static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
70 static struct of_device_id msm_dt_gic_match[] __initdata = {
71 { .compatible = "qcom,msm-8660-qgic", },
75 static void __init msm8x60_dt_init(void)
77 struct device_node *node;
79 node = of_find_matching_node_by_address(NULL, msm_dt_gic_match,
80 MSM8X60_QGIC_DIST_PHYS);
82 irq_domain_add_simple(node, GIC_SPI_START);
84 if (of_machine_is_compatible("qcom,msm8660-surf")) {
85 printk(KERN_INFO "Init surf UART registers\n");
86 msm8x60_init_uart12dm();
89 of_platform_populate(NULL, of_default_bus_match_table,
90 msm_auxdata_lookup, NULL);
93 static const char *msm8x60_fluid_match[] __initdata = {
98 #endif /* CONFIG_OF */
100 MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
101 .map_io = msm8x60_map_io,
102 .init_irq = msm8x60_init_irq,
103 .init_machine = msm8x60_init,
107 MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
108 .map_io = msm8x60_map_io,
109 .init_irq = msm8x60_init_irq,
110 .init_machine = msm8x60_init,
114 MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
115 .map_io = msm8x60_map_io,
116 .init_irq = msm8x60_init_irq,
117 .init_machine = msm8x60_init,
121 MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
122 .map_io = msm8x60_map_io,
123 .init_irq = msm8x60_init_irq,
124 .init_machine = msm8x60_init,
129 /* TODO: General device tree support for all MSM. */
130 DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
131 .map_io = msm8x60_map_io,
132 .init_irq = msm8x60_init_irq,
133 .init_machine = msm8x60_dt_init,
135 .dt_compat = msm8x60_fluid_match,
137 #endif /* CONFIG_OF */