2 * arch/arm/mach-kirkwood/common.c
4 * Core functions for Marvell Kirkwood SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/mbus.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/mv643xx_i2c.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/spi/orion_spi.h>
23 #include <asm/timex.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/time.h>
26 #include <mach/kirkwood.h>
27 #include <mach/bridge-regs.h>
28 #include <plat/audio.h>
29 #include <plat/cache-feroceon-l2.h>
30 #include <plat/ehci-orion.h>
31 #include <plat/mvsdio.h>
32 #include <plat/mv_xor.h>
33 #include <plat/orion_nand.h>
34 #include <plat/orion_wdt.h>
35 #include <plat/time.h>
38 /*****************************************************************************
40 ****************************************************************************/
41 static struct map_desc kirkwood_io_desc[] __initdata = {
43 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
44 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
45 .length = KIRKWOOD_PCIE_IO_SIZE,
48 .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
49 .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
50 .length = KIRKWOOD_PCIE1_IO_SIZE,
53 .virtual = KIRKWOOD_REGS_VIRT_BASE,
54 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
55 .length = KIRKWOOD_REGS_SIZE,
60 void __init kirkwood_map_io(void)
62 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
66 * Default clock control bits. Any bit _not_ set in this variable
67 * will be cleared from the hardware after platform devices have been
68 * registered. Some reserved bits must be set to 1.
70 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
73 /*****************************************************************************
75 ****************************************************************************/
76 static struct orion_ehci_data kirkwood_ehci_data = {
77 .dram = &kirkwood_mbus_dram_info,
78 .phy_version = EHCI_PHY_NA,
81 static u64 ehci_dmamask = 0xffffffffUL;
84 /*****************************************************************************
86 ****************************************************************************/
87 static struct resource kirkwood_ehci_resources[] = {
89 .start = USB_PHYS_BASE,
90 .end = USB_PHYS_BASE + 0x0fff,
91 .flags = IORESOURCE_MEM,
93 .start = IRQ_KIRKWOOD_USB,
94 .end = IRQ_KIRKWOOD_USB,
95 .flags = IORESOURCE_IRQ,
99 static struct platform_device kirkwood_ehci = {
100 .name = "orion-ehci",
103 .dma_mask = &ehci_dmamask,
104 .coherent_dma_mask = 0xffffffff,
105 .platform_data = &kirkwood_ehci_data,
107 .resource = kirkwood_ehci_resources,
108 .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
111 void __init kirkwood_ehci_init(void)
113 kirkwood_clk_ctrl |= CGC_USB0;
114 platform_device_register(&kirkwood_ehci);
118 /*****************************************************************************
120 ****************************************************************************/
121 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
122 .dram = &kirkwood_mbus_dram_info,
125 static struct resource kirkwood_ge00_shared_resources[] = {
128 .start = GE00_PHYS_BASE + 0x2000,
129 .end = GE00_PHYS_BASE + 0x3fff,
130 .flags = IORESOURCE_MEM,
132 .name = "ge00 err irq",
133 .start = IRQ_KIRKWOOD_GE00_ERR,
134 .end = IRQ_KIRKWOOD_GE00_ERR,
135 .flags = IORESOURCE_IRQ,
139 static struct platform_device kirkwood_ge00_shared = {
140 .name = MV643XX_ETH_SHARED_NAME,
143 .platform_data = &kirkwood_ge00_shared_data,
145 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
146 .resource = kirkwood_ge00_shared_resources,
149 static struct resource kirkwood_ge00_resources[] = {
152 .start = IRQ_KIRKWOOD_GE00_SUM,
153 .end = IRQ_KIRKWOOD_GE00_SUM,
154 .flags = IORESOURCE_IRQ,
158 static struct platform_device kirkwood_ge00 = {
159 .name = MV643XX_ETH_NAME,
162 .resource = kirkwood_ge00_resources,
164 .coherent_dma_mask = 0xffffffff,
168 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
170 kirkwood_clk_ctrl |= CGC_GE0;
171 eth_data->shared = &kirkwood_ge00_shared;
172 kirkwood_ge00.dev.platform_data = eth_data;
174 platform_device_register(&kirkwood_ge00_shared);
175 platform_device_register(&kirkwood_ge00);
179 /*****************************************************************************
181 ****************************************************************************/
182 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
183 .dram = &kirkwood_mbus_dram_info,
184 .shared_smi = &kirkwood_ge00_shared,
187 static struct resource kirkwood_ge01_shared_resources[] = {
190 .start = GE01_PHYS_BASE + 0x2000,
191 .end = GE01_PHYS_BASE + 0x3fff,
192 .flags = IORESOURCE_MEM,
194 .name = "ge01 err irq",
195 .start = IRQ_KIRKWOOD_GE01_ERR,
196 .end = IRQ_KIRKWOOD_GE01_ERR,
197 .flags = IORESOURCE_IRQ,
201 static struct platform_device kirkwood_ge01_shared = {
202 .name = MV643XX_ETH_SHARED_NAME,
205 .platform_data = &kirkwood_ge01_shared_data,
207 .num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
208 .resource = kirkwood_ge01_shared_resources,
211 static struct resource kirkwood_ge01_resources[] = {
214 .start = IRQ_KIRKWOOD_GE01_SUM,
215 .end = IRQ_KIRKWOOD_GE01_SUM,
216 .flags = IORESOURCE_IRQ,
220 static struct platform_device kirkwood_ge01 = {
221 .name = MV643XX_ETH_NAME,
224 .resource = kirkwood_ge01_resources,
226 .coherent_dma_mask = 0xffffffff,
230 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
232 kirkwood_clk_ctrl |= CGC_GE1;
233 eth_data->shared = &kirkwood_ge01_shared;
234 kirkwood_ge01.dev.platform_data = eth_data;
236 platform_device_register(&kirkwood_ge01_shared);
237 platform_device_register(&kirkwood_ge01);
241 /*****************************************************************************
243 ****************************************************************************/
244 static struct resource kirkwood_switch_resources[] = {
248 .flags = IORESOURCE_IRQ,
252 static struct platform_device kirkwood_switch_device = {
256 .resource = kirkwood_switch_resources,
259 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
264 kirkwood_switch_resources[0].start = irq;
265 kirkwood_switch_resources[0].end = irq;
266 kirkwood_switch_device.num_resources = 1;
269 d->netdev = &kirkwood_ge00.dev;
270 for (i = 0; i < d->nr_chips; i++)
271 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
272 kirkwood_switch_device.dev.platform_data = d;
274 platform_device_register(&kirkwood_switch_device);
278 /*****************************************************************************
280 ****************************************************************************/
281 static struct resource kirkwood_nand_resource = {
282 .flags = IORESOURCE_MEM,
283 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
284 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
285 KIRKWOOD_NAND_MEM_SIZE - 1,
288 static struct orion_nand_data kirkwood_nand_data = {
294 static struct platform_device kirkwood_nand_flash = {
295 .name = "orion_nand",
298 .platform_data = &kirkwood_nand_data,
300 .resource = &kirkwood_nand_resource,
304 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
307 kirkwood_clk_ctrl |= CGC_RUNIT;
308 kirkwood_nand_data.parts = parts;
309 kirkwood_nand_data.nr_parts = nr_parts;
310 kirkwood_nand_data.chip_delay = chip_delay;
311 platform_device_register(&kirkwood_nand_flash);
314 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
315 int (*dev_ready)(struct mtd_info *))
317 kirkwood_clk_ctrl |= CGC_RUNIT;
318 kirkwood_nand_data.parts = parts;
319 kirkwood_nand_data.nr_parts = nr_parts;
320 kirkwood_nand_data.dev_ready = dev_ready;
321 platform_device_register(&kirkwood_nand_flash);
324 /*****************************************************************************
326 ****************************************************************************/
327 static struct resource kirkwood_rtc_resource = {
328 .start = RTC_PHYS_BASE,
329 .end = RTC_PHYS_BASE + SZ_16 - 1,
330 .flags = IORESOURCE_MEM,
333 static void __init kirkwood_rtc_init(void)
335 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
339 /*****************************************************************************
341 ****************************************************************************/
342 static struct resource kirkwood_sata_resources[] = {
345 .start = SATA_PHYS_BASE,
346 .end = SATA_PHYS_BASE + 0x5000 - 1,
347 .flags = IORESOURCE_MEM,
350 .start = IRQ_KIRKWOOD_SATA,
351 .end = IRQ_KIRKWOOD_SATA,
352 .flags = IORESOURCE_IRQ,
356 static struct platform_device kirkwood_sata = {
360 .coherent_dma_mask = 0xffffffff,
362 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
363 .resource = kirkwood_sata_resources,
366 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
368 kirkwood_clk_ctrl |= CGC_SATA0;
369 if (sata_data->n_ports > 1)
370 kirkwood_clk_ctrl |= CGC_SATA1;
371 sata_data->dram = &kirkwood_mbus_dram_info;
372 kirkwood_sata.dev.platform_data = sata_data;
373 platform_device_register(&kirkwood_sata);
377 /*****************************************************************************
379 ****************************************************************************/
380 static struct resource mvsdio_resources[] = {
382 .start = SDIO_PHYS_BASE,
383 .end = SDIO_PHYS_BASE + SZ_1K - 1,
384 .flags = IORESOURCE_MEM,
387 .start = IRQ_KIRKWOOD_SDIO,
388 .end = IRQ_KIRKWOOD_SDIO,
389 .flags = IORESOURCE_IRQ,
393 static u64 mvsdio_dmamask = 0xffffffffUL;
395 static struct platform_device kirkwood_sdio = {
399 .dma_mask = &mvsdio_dmamask,
400 .coherent_dma_mask = 0xffffffff,
402 .num_resources = ARRAY_SIZE(mvsdio_resources),
403 .resource = mvsdio_resources,
406 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
410 kirkwood_pcie_id(&dev, &rev);
411 if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
412 mvsdio_data->clock = 100000000;
414 mvsdio_data->clock = 200000000;
415 mvsdio_data->dram = &kirkwood_mbus_dram_info;
416 kirkwood_clk_ctrl |= CGC_SDIO;
417 kirkwood_sdio.dev.platform_data = mvsdio_data;
418 platform_device_register(&kirkwood_sdio);
422 /*****************************************************************************
424 ****************************************************************************/
425 static struct orion_spi_info kirkwood_spi_plat_data = {
428 static struct resource kirkwood_spi_resources[] = {
430 .start = SPI_PHYS_BASE,
431 .end = SPI_PHYS_BASE + SZ_512 - 1,
432 .flags = IORESOURCE_MEM,
436 static struct platform_device kirkwood_spi = {
439 .resource = kirkwood_spi_resources,
441 .platform_data = &kirkwood_spi_plat_data,
443 .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
446 void __init kirkwood_spi_init()
448 kirkwood_clk_ctrl |= CGC_RUNIT;
449 platform_device_register(&kirkwood_spi);
453 /*****************************************************************************
455 ****************************************************************************/
456 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
457 .freq_m = 8, /* assumes 166 MHz TCLK */
459 .timeout = 1000, /* Default timeout of 1 second */
462 static struct resource kirkwood_i2c_resources[] = {
464 .start = I2C_PHYS_BASE,
465 .end = I2C_PHYS_BASE + 0x1f,
466 .flags = IORESOURCE_MEM,
468 .start = IRQ_KIRKWOOD_TWSI,
469 .end = IRQ_KIRKWOOD_TWSI,
470 .flags = IORESOURCE_IRQ,
474 static struct platform_device kirkwood_i2c = {
475 .name = MV64XXX_I2C_CTLR_NAME,
477 .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
478 .resource = kirkwood_i2c_resources,
480 .platform_data = &kirkwood_i2c_pdata,
484 void __init kirkwood_i2c_init(void)
486 platform_device_register(&kirkwood_i2c);
490 /*****************************************************************************
492 ****************************************************************************/
493 static struct plat_serial8250_port kirkwood_uart0_data[] = {
495 .mapbase = UART0_PHYS_BASE,
496 .membase = (char *)UART0_VIRT_BASE,
497 .irq = IRQ_KIRKWOOD_UART_0,
498 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
506 static struct resource kirkwood_uart0_resources[] = {
508 .start = UART0_PHYS_BASE,
509 .end = UART0_PHYS_BASE + 0xff,
510 .flags = IORESOURCE_MEM,
512 .start = IRQ_KIRKWOOD_UART_0,
513 .end = IRQ_KIRKWOOD_UART_0,
514 .flags = IORESOURCE_IRQ,
518 static struct platform_device kirkwood_uart0 = {
519 .name = "serial8250",
522 .platform_data = kirkwood_uart0_data,
524 .resource = kirkwood_uart0_resources,
525 .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
528 void __init kirkwood_uart0_init(void)
530 platform_device_register(&kirkwood_uart0);
534 /*****************************************************************************
536 ****************************************************************************/
537 static struct plat_serial8250_port kirkwood_uart1_data[] = {
539 .mapbase = UART1_PHYS_BASE,
540 .membase = (char *)UART1_VIRT_BASE,
541 .irq = IRQ_KIRKWOOD_UART_1,
542 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
550 static struct resource kirkwood_uart1_resources[] = {
552 .start = UART1_PHYS_BASE,
553 .end = UART1_PHYS_BASE + 0xff,
554 .flags = IORESOURCE_MEM,
556 .start = IRQ_KIRKWOOD_UART_1,
557 .end = IRQ_KIRKWOOD_UART_1,
558 .flags = IORESOURCE_IRQ,
562 static struct platform_device kirkwood_uart1 = {
563 .name = "serial8250",
566 .platform_data = kirkwood_uart1_data,
568 .resource = kirkwood_uart1_resources,
569 .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
572 void __init kirkwood_uart1_init(void)
574 platform_device_register(&kirkwood_uart1);
578 /*****************************************************************************
579 * Cryptographic Engines and Security Accelerator (CESA)
580 ****************************************************************************/
582 static struct resource kirkwood_crypto_res[] = {
585 .start = CRYPTO_PHYS_BASE,
586 .end = CRYPTO_PHYS_BASE + 0xffff,
587 .flags = IORESOURCE_MEM,
590 .start = KIRKWOOD_SRAM_PHYS_BASE,
591 .end = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
592 .flags = IORESOURCE_MEM,
594 .name = "crypto interrupt",
595 .start = IRQ_KIRKWOOD_CRYPTO,
596 .end = IRQ_KIRKWOOD_CRYPTO,
597 .flags = IORESOURCE_IRQ,
601 static struct platform_device kirkwood_crypto_device = {
604 .num_resources = ARRAY_SIZE(kirkwood_crypto_res),
605 .resource = kirkwood_crypto_res,
608 void __init kirkwood_crypto_init(void)
610 kirkwood_clk_ctrl |= CGC_CRYPTO;
611 platform_device_register(&kirkwood_crypto_device);
615 /*****************************************************************************
617 ****************************************************************************/
618 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
619 .dram = &kirkwood_mbus_dram_info,
622 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
625 /*****************************************************************************
627 ****************************************************************************/
628 static struct resource kirkwood_xor0_shared_resources[] = {
631 .start = XOR0_PHYS_BASE,
632 .end = XOR0_PHYS_BASE + 0xff,
633 .flags = IORESOURCE_MEM,
635 .name = "xor 0 high",
636 .start = XOR0_HIGH_PHYS_BASE,
637 .end = XOR0_HIGH_PHYS_BASE + 0xff,
638 .flags = IORESOURCE_MEM,
642 static struct platform_device kirkwood_xor0_shared = {
643 .name = MV_XOR_SHARED_NAME,
646 .platform_data = &kirkwood_xor_shared_data,
648 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
649 .resource = kirkwood_xor0_shared_resources,
652 static struct resource kirkwood_xor00_resources[] = {
654 .start = IRQ_KIRKWOOD_XOR_00,
655 .end = IRQ_KIRKWOOD_XOR_00,
656 .flags = IORESOURCE_IRQ,
660 static struct mv_xor_platform_data kirkwood_xor00_data = {
661 .shared = &kirkwood_xor0_shared,
663 .pool_size = PAGE_SIZE,
666 static struct platform_device kirkwood_xor00_channel = {
669 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
670 .resource = kirkwood_xor00_resources,
672 .dma_mask = &kirkwood_xor_dmamask,
673 .coherent_dma_mask = DMA_BIT_MASK(64),
674 .platform_data = &kirkwood_xor00_data,
678 static struct resource kirkwood_xor01_resources[] = {
680 .start = IRQ_KIRKWOOD_XOR_01,
681 .end = IRQ_KIRKWOOD_XOR_01,
682 .flags = IORESOURCE_IRQ,
686 static struct mv_xor_platform_data kirkwood_xor01_data = {
687 .shared = &kirkwood_xor0_shared,
689 .pool_size = PAGE_SIZE,
692 static struct platform_device kirkwood_xor01_channel = {
695 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
696 .resource = kirkwood_xor01_resources,
698 .dma_mask = &kirkwood_xor_dmamask,
699 .coherent_dma_mask = DMA_BIT_MASK(64),
700 .platform_data = &kirkwood_xor01_data,
704 static void __init kirkwood_xor0_init(void)
706 kirkwood_clk_ctrl |= CGC_XOR0;
707 platform_device_register(&kirkwood_xor0_shared);
710 * two engines can't do memset simultaneously, this limitation
711 * satisfied by removing memset support from one of the engines.
713 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
714 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
715 platform_device_register(&kirkwood_xor00_channel);
717 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
718 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
719 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
720 platform_device_register(&kirkwood_xor01_channel);
724 /*****************************************************************************
726 ****************************************************************************/
727 static struct resource kirkwood_xor1_shared_resources[] = {
730 .start = XOR1_PHYS_BASE,
731 .end = XOR1_PHYS_BASE + 0xff,
732 .flags = IORESOURCE_MEM,
734 .name = "xor 1 high",
735 .start = XOR1_HIGH_PHYS_BASE,
736 .end = XOR1_HIGH_PHYS_BASE + 0xff,
737 .flags = IORESOURCE_MEM,
741 static struct platform_device kirkwood_xor1_shared = {
742 .name = MV_XOR_SHARED_NAME,
745 .platform_data = &kirkwood_xor_shared_data,
747 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
748 .resource = kirkwood_xor1_shared_resources,
751 static struct resource kirkwood_xor10_resources[] = {
753 .start = IRQ_KIRKWOOD_XOR_10,
754 .end = IRQ_KIRKWOOD_XOR_10,
755 .flags = IORESOURCE_IRQ,
759 static struct mv_xor_platform_data kirkwood_xor10_data = {
760 .shared = &kirkwood_xor1_shared,
762 .pool_size = PAGE_SIZE,
765 static struct platform_device kirkwood_xor10_channel = {
768 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
769 .resource = kirkwood_xor10_resources,
771 .dma_mask = &kirkwood_xor_dmamask,
772 .coherent_dma_mask = DMA_BIT_MASK(64),
773 .platform_data = &kirkwood_xor10_data,
777 static struct resource kirkwood_xor11_resources[] = {
779 .start = IRQ_KIRKWOOD_XOR_11,
780 .end = IRQ_KIRKWOOD_XOR_11,
781 .flags = IORESOURCE_IRQ,
785 static struct mv_xor_platform_data kirkwood_xor11_data = {
786 .shared = &kirkwood_xor1_shared,
788 .pool_size = PAGE_SIZE,
791 static struct platform_device kirkwood_xor11_channel = {
794 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
795 .resource = kirkwood_xor11_resources,
797 .dma_mask = &kirkwood_xor_dmamask,
798 .coherent_dma_mask = DMA_BIT_MASK(64),
799 .platform_data = &kirkwood_xor11_data,
803 static void __init kirkwood_xor1_init(void)
805 kirkwood_clk_ctrl |= CGC_XOR1;
806 platform_device_register(&kirkwood_xor1_shared);
809 * two engines can't do memset simultaneously, this limitation
810 * satisfied by removing memset support from one of the engines.
812 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
813 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
814 platform_device_register(&kirkwood_xor10_channel);
816 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
817 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
818 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
819 platform_device_register(&kirkwood_xor11_channel);
823 /*****************************************************************************
825 ****************************************************************************/
826 static struct orion_wdt_platform_data kirkwood_wdt_data = {
830 static struct platform_device kirkwood_wdt_device = {
834 .platform_data = &kirkwood_wdt_data,
839 static void __init kirkwood_wdt_init(void)
841 kirkwood_wdt_data.tclk = kirkwood_tclk;
842 platform_device_register(&kirkwood_wdt_device);
846 /*****************************************************************************
848 ****************************************************************************/
851 int __init kirkwood_find_tclk(void)
855 kirkwood_pcie_id(&dev, &rev);
857 if ((dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
858 rev == MV88F6281_REV_A1)) ||
859 (dev == MV88F6282_DEV_ID))
865 static void __init kirkwood_timer_init(void)
867 kirkwood_tclk = kirkwood_find_tclk();
868 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
871 struct sys_timer kirkwood_timer = {
872 .init = kirkwood_timer_init,
875 /*****************************************************************************
877 ****************************************************************************/
878 static struct resource kirkwood_i2s_resources[] = {
880 .start = AUDIO_PHYS_BASE,
881 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
882 .flags = IORESOURCE_MEM,
885 .start = IRQ_KIRKWOOD_I2S,
886 .end = IRQ_KIRKWOOD_I2S,
887 .flags = IORESOURCE_IRQ,
891 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
892 .dram = &kirkwood_mbus_dram_info,
896 static struct platform_device kirkwood_i2s_device = {
897 .name = "kirkwood-i2s",
899 .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
900 .resource = kirkwood_i2s_resources,
902 .platform_data = &kirkwood_i2s_data,
906 static struct platform_device kirkwood_pcm_device = {
907 .name = "kirkwood-pcm-audio",
911 void __init kirkwood_audio_init(void)
913 kirkwood_clk_ctrl |= CGC_AUDIO;
914 platform_device_register(&kirkwood_i2s_device);
915 platform_device_register(&kirkwood_pcm_device);
918 /*****************************************************************************
920 ****************************************************************************/
922 * Identify device ID and revision.
924 static char * __init kirkwood_id(void)
928 kirkwood_pcie_id(&dev, &rev);
930 if (dev == MV88F6281_DEV_ID) {
931 if (rev == MV88F6281_REV_Z0)
932 return "MV88F6281-Z0";
933 else if (rev == MV88F6281_REV_A0)
934 return "MV88F6281-A0";
935 else if (rev == MV88F6281_REV_A1)
936 return "MV88F6281-A1";
938 return "MV88F6281-Rev-Unsupported";
939 } else if (dev == MV88F6192_DEV_ID) {
940 if (rev == MV88F6192_REV_Z0)
941 return "MV88F6192-Z0";
942 else if (rev == MV88F6192_REV_A0)
943 return "MV88F6192-A0";
944 else if (rev == MV88F6192_REV_A1)
945 return "MV88F6192-A1";
947 return "MV88F6192-Rev-Unsupported";
948 } else if (dev == MV88F6180_DEV_ID) {
949 if (rev == MV88F6180_REV_A0)
950 return "MV88F6180-Rev-A0";
951 else if (rev == MV88F6180_REV_A1)
952 return "MV88F6180-Rev-A1";
954 return "MV88F6180-Rev-Unsupported";
955 } else if (dev == MV88F6282_DEV_ID) {
956 if (rev == MV88F6282_REV_A0)
957 return "MV88F6282-Rev-A0";
959 return "MV88F6282-Rev-Unsupported";
961 return "Device-Unknown";
965 static void __init kirkwood_l2_init(void)
967 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
968 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
971 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
976 void __init kirkwood_init(void)
978 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
979 kirkwood_id(), kirkwood_tclk);
980 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
981 kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
982 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
983 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
984 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
985 kirkwood_i2s_data.tclk = kirkwood_tclk;
988 * Disable propagation of mbus errors to the CPU local bus,
989 * as this causes mbus errors (which can occur for example
990 * for PCI aborts) to throw CPU aborts, which we're not set
993 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
995 kirkwood_setup_cpu_mbus();
997 #ifdef CONFIG_CACHE_FEROCEON_L2
1001 /* internal devices that every board has */
1002 kirkwood_rtc_init();
1003 kirkwood_wdt_init();
1004 kirkwood_xor0_init();
1005 kirkwood_xor1_init();
1006 kirkwood_crypto_init();
1009 static int __init kirkwood_clock_gate(void)
1011 unsigned int curr = readl(CLOCK_GATING_CTRL);
1014 kirkwood_pcie_id(&dev, &rev);
1015 printk(KERN_DEBUG "Gating clock of unused units\n");
1016 printk(KERN_DEBUG "before: 0x%08x\n", curr);
1018 /* Make sure those units are accessible */
1019 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
1021 /* For SATA: first shutdown the phy */
1022 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
1023 /* Disable PLL and IVREF */
1024 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
1026 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
1028 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
1029 /* Disable PLL and IVREF */
1030 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
1032 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
1035 /* For PCIe: first shutdown the phy */
1036 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
1037 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
1039 if (readl(PCIE_STATUS) & 0x1)
1041 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
1044 /* For PCIe 1: first shutdown the phy */
1045 if (dev == MV88F6282_DEV_ID) {
1046 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
1047 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
1049 if (readl(PCIE1_STATUS) & 0x1)
1051 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
1053 } else /* keep this bit set for devices that don't have PCIe1 */
1054 kirkwood_clk_ctrl |= CGC_PEX1;
1056 /* Now gate clock the required units */
1057 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
1058 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
1062 late_initcall(kirkwood_clock_gate);