arch/arm/mach-imx/mach-imx6q.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/delay.h>
  16 #include <linux/export.h>
  17 #include <linux/init.h>
  18 #include <linux/io.h>
  19 #include <linux/irq.h>
  20 #include <linux/of.h>
  21 #include <linux/of_address.h>
  22 #include <linux/of_irq.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/phy.h>
  25 #include <linux/regmap.h>
  26 #include <linux/micrel_phy.h>
  27 #include <linux/mfd/syscon.h>
  28 #include <asm/smp_twd.h>
  29 #include <asm/hardware/cache-l2x0.h>
  30 #include <asm/hardware/gic.h>
  31 #include <asm/mach/arch.h>
  32 #include <asm/mach/map.h>
  33 #include <asm/mach/time.h>
  34 #include <asm/system_misc.h>
  35
  36 #include "common.h"
  37 #include "cpuidle.h"
  38 #include "hardware.h"
  39
  40 #define IMX6Q_ANALOG_DIGPROG    0x260
  41
  42 static int imx6q_revision(void)
  43 {
  44         struct device_node *np;
  45         void __iomem *base;
  46         static u32 rev;
  47
  48         if (!rev) {
  49                 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
  50                 if (!np)
  51                         return IMX_CHIP_REVISION_UNKNOWN;
  52                 base = of_iomap(np, 0);
  53                 if (!base) {
  54                         of_node_put(np);
  55                         return IMX_CHIP_REVISION_UNKNOWN;
  56                 }
  57                 rev =  readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
  58                 iounmap(base);
  59                 of_node_put(np);
  60         }
  61
  62         switch (rev & 0xff) {
  63         case 0:
  64                 return IMX_CHIP_REVISION_1_0;
  65         case 1:
  66                 return IMX_CHIP_REVISION_1_1;
  67         case 2:
  68                 return IMX_CHIP_REVISION_1_2;
  69         default:
  70                 return IMX_CHIP_REVISION_UNKNOWN;
  71         }
  72 }
  73
  74 void imx6q_restart(char mode, const char *cmd)
  75 {
  76         struct device_node *np;
  77         void __iomem *wdog_base;
  78
  79         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
  80         wdog_base = of_iomap(np, 0);
  81         if (!wdog_base)
  82                 goto soft;
  83
  84         imx_src_prepare_restart();
  85
  86         /* enable wdog */
  87         writew_relaxed(1 << 2, wdog_base);
  88         /* write twice to ensure the request will not get ignored */
  89         writew_relaxed(1 << 2, wdog_base);
  90
  91         /* wait for reset to assert ... */
  92         mdelay(500);
  93
  94         pr_err("Watchdog reset failed to assert reset\n");
  95
  96         /* delay to allow the serial port to show the message */
  97         mdelay(50);
  98
  99 soft:
 100         /* we'll take a jump through zero as a poor second */
 101         soft_restart(0);
 102 }
 103
 104 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
 105 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
 106 {
 107         if (IS_BUILTIN(CONFIG_PHYLIB)) {
 108                 /* min rx data delay */
 109                 phy_write(phydev, 0x0b, 0x8105);
 110                 phy_write(phydev, 0x0c, 0x0000);
 111
 112                 /* max rx/tx clock delay, min rx/tx control delay */
 113                 phy_write(phydev, 0x0b, 0x8104);
 114                 phy_write(phydev, 0x0c, 0xf0f0);
 115                 phy_write(phydev, 0x0b, 0x104);
 116         }
 117
 118         return 0;
 119 }
 120
 121 static void __init imx6q_sabrelite_cko1_setup(void)
 122 {
 123         struct clk *cko1_sel, *ahb, *cko1;
 124         unsigned long rate;
 125
 126         cko1_sel = clk_get_sys(NULL, "cko1_sel");
 127         ahb = clk_get_sys(NULL, "ahb");
 128         cko1 = clk_get_sys(NULL, "cko1");
 129         if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
 130                 pr_err("cko1 setup failed!\n");
 131                 goto put_clk;
 132         }
 133         clk_set_parent(cko1_sel, ahb);
 134         rate = clk_round_rate(cko1, 16000000);
 135         clk_set_rate(cko1, rate);
 136 put_clk:
 137         if (!IS_ERR(cko1_sel))
 138                 clk_put(cko1_sel);
 139         if (!IS_ERR(ahb))
 140                 clk_put(ahb);
 141         if (!IS_ERR(cko1))
 142                 clk_put(cko1);
 143 }
 144
 145 static void __init imx6q_sabrelite_init(void)
 146 {
 147         if (IS_BUILTIN(CONFIG_PHYLIB))
 148                 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 149                                 ksz9021rn_phy_fixup);
 150         imx6q_sabrelite_cko1_setup();
 151 }
 152
 153 static void __init imx6q_1588_init(void)
 154 {
 155         struct regmap *gpr;
 156
 157         gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
 158         if (!IS_ERR(gpr))
 159                 regmap_update_bits(gpr, 0x4, 1 << 21, 1 << 21);
 160         else
 161                 pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n");
 162
 163 }
 164 static void __init imx6q_usb_init(void)
 165 {
 166         struct regmap *anatop;
 167
 168 #define HW_ANADIG_USB1_CHRG_DETECT              0x000001b0
 169 #define HW_ANADIG_USB2_CHRG_DETECT              0x00000210
 170
 171 #define BM_ANADIG_USB_CHRG_DETECT_EN_B          0x00100000
 172 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B    0x00080000
 173
 174         anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
 175         if (!IS_ERR(anatop)) {
 176                 /*
 177                  * The external charger detector needs to be disabled,
 178                  * or the signal at DP will be poor
 179                  */
 180                 regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
 181                                 BM_ANADIG_USB_CHRG_DETECT_EN_B
 182                                 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
 183                 regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
 184                                 BM_ANADIG_USB_CHRG_DETECT_EN_B |
 185                                 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
 186         } else {
 187                 pr_warn("failed to find fsl,imx6q-anatop regmap\n");
 188         }
 189 }
 190
 191 static void __init imx6q_init_machine(void)
 192 {
 193         if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
 194                 imx6q_sabrelite_init();
 195
 196         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 197
 198         imx6q_pm_init();
 199         imx6q_usb_init();
 200         imx6q_1588_init();
 201 }
 202
 203 static void __init imx6q_init_late(void)
 204 {
 205         /*
 206          * WAIT mode is broken on TO 1.0 and 1.1, so there is no point
 207          * to run cpuidle on them.
 208          */
 209         if (imx6q_revision() > IMX_CHIP_REVISION_1_1)
 210                 imx6q_cpuidle_init();
 211 }
 212
 213 static void __init imx6q_map_io(void)
 214 {
 215         debug_ll_io_init();
 216         imx_scu_map_io();
 217 }
 218
 219 static const struct of_device_id imx6q_irq_match[] __initconst = {
 220         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
 221         { /* sentinel */ }
 222 };
 223
 224 static void __init imx6q_init_irq(void)
 225 {
 226         l2x0_of_init(0, ~0UL);
 227         imx_src_init();
 228         imx_gpc_init();
 229         of_irq_init(imx6q_irq_match);
 230 }
 231
 232 static void __init imx6q_timer_init(void)
 233 {
 234         mx6q_clocks_init();
 235         twd_local_timer_of_register();
 236         imx_print_silicon_rev("i.MX6Q", imx6q_revision());
 237 }
 238
 239 static struct sys_timer imx6q_timer = {
 240         .init = imx6q_timer_init,
 241 };
 242
 243 static const char *imx6q_dt_compat[] __initdata = {
 244         "fsl,imx6q",
 245         NULL,
 246 };
 247
 248 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
 249         .smp            = smp_ops(imx_smp_ops),
 250         .map_io         = imx6q_map_io,
 251         .init_irq       = imx6q_init_irq,
 252         .handle_irq     = imx6q_handle_irq,
 253         .timer          = &imx6q_timer,
 254         .init_machine   = imx6q_init_machine,
 255         .init_late      = imx6q_init_late,
 256         .dt_compat      = imx6q_dt_compat,
 257         .restart        = imx6q_restart,
 258 MACHINE_END