arch/arm/include/asm/cputype.h

   1 #ifndef __ASM_ARM_CPUTYPE_H
   2 #define __ASM_ARM_CPUTYPE_H
   3
   4 #include <linux/stringify.h>
   5 #include <linux/kernel.h>
   6
   7 #define CPUID_ID        0
   8 #define CPUID_CACHETYPE 1
   9 #define CPUID_TCM       2
  10 #define CPUID_TLBTYPE   3
  11 #define CPUID_MPIDR     5
  12
  13 #define CPUID_EXT_PFR0  "c1, 0"
  14 #define CPUID_EXT_PFR1  "c1, 1"
  15 #define CPUID_EXT_DFR0  "c1, 2"
  16 #define CPUID_EXT_AFR0  "c1, 3"
  17 #define CPUID_EXT_MMFR0 "c1, 4"
  18 #define CPUID_EXT_MMFR1 "c1, 5"
  19 #define CPUID_EXT_MMFR2 "c1, 6"
  20 #define CPUID_EXT_MMFR3 "c1, 7"
  21 #define CPUID_EXT_ISAR0 "c2, 0"
  22 #define CPUID_EXT_ISAR1 "c2, 1"
  23 #define CPUID_EXT_ISAR2 "c2, 2"
  24 #define CPUID_EXT_ISAR3 "c2, 3"
  25 #define CPUID_EXT_ISAR4 "c2, 4"
  26 #define CPUID_EXT_ISAR5 "c2, 5"
  27
  28 #define MPIDR_SMP_BITMASK (0x3 << 30)
  29 #define MPIDR_SMP_VALUE (0x2 << 30)
  30
  31 #define MPIDR_MT_BITMASK (0x1 << 24)
  32
  33 #define MPIDR_HWID_BITMASK 0xFFFFFF
  34
  35 #define MPIDR_INVALID (~MPIDR_HWID_BITMASK)
  36
  37 #define MPIDR_LEVEL_BITS 8
  38 #define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
  39
  40 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \
  41         ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
  42
  43 #define ARM_CPU_IMP_ARM                 0x41
  44 #define ARM_CPU_IMP_INTEL               0x69
  45
  46 #define ARM_CPU_PART_ARM1136            0xB360
  47 #define ARM_CPU_PART_ARM1156            0xB560
  48 #define ARM_CPU_PART_ARM1176            0xB760
  49 #define ARM_CPU_PART_ARM11MPCORE        0xB020
  50 #define ARM_CPU_PART_CORTEX_A8          0xC080
  51 #define ARM_CPU_PART_CORTEX_A9          0xC090
  52 #define ARM_CPU_PART_CORTEX_A5          0xC050
  53 #define ARM_CPU_PART_CORTEX_A15         0xC0F0
  54 #define ARM_CPU_PART_CORTEX_A7          0xC070
  55
  56 #define ARM_CPU_XSCALE_ARCH_MASK        0xe000
  57 #define ARM_CPU_XSCALE_ARCH_V1          0x2000
  58 #define ARM_CPU_XSCALE_ARCH_V2          0x4000
  59 #define ARM_CPU_XSCALE_ARCH_V3          0x6000
  60
  61 extern unsigned int processor_id;
  62
  63 #ifdef CONFIG_CPU_CP15
  64 #define read_cpuid(reg)                                                 \
  65         ({                                                              \
  66                 unsigned int __val;                                     \
  67                 asm("mrc        p15, 0, %0, c0, c0, " __stringify(reg)  \
  68                     : "=r" (__val)                                      \
  69                     :                                                   \
  70                     : "cc");                                            \
  71                 __val;                                                  \
  72         })
  73
  74 #define read_cpuid_ext(ext_reg)                                         \
  75         ({                                                              \
  76                 unsigned int __val;                                     \
  77                 asm("mrc        p15, 0, %0, c0, " ext_reg               \
  78                     : "=r" (__val)                                      \
  79                     :                                                   \
  80                     : "cc");                                            \
  81                 __val;                                                  \
  82         })
  83
  84 #else /* ifdef CONFIG_CPU_CP15 */
  85
  86 /*
  87  * read_cpuid and read_cpuid_ext should only ever be called on machines that
  88  * have cp15 so warn on other usages.
  89  */
  90 #define read_cpuid(reg)                                                 \
  91         ({                                                              \
  92                 WARN_ON_ONCE(1);                                        \
  93                 0;                                                      \
  94         })
  95
  96 #define read_cpuid_ext(reg) read_cpuid(reg)
  97
  98 #endif /* ifdef CONFIG_CPU_CP15 / else */
  99
 100 #ifdef CONFIG_CPU_CP15
 101 /*
 102  * The CPU ID never changes at run time, so we might as well tell the
 103  * compiler that it's constant.  Use this function to read the CPU ID
 104  * rather than directly reading processor_id or read_cpuid() directly.
 105  */
 106 static inline unsigned int __attribute_const__ read_cpuid_id(void)
 107 {
 108         return read_cpuid(CPUID_ID);
 109 }
 110
 111 #else /* ifdef CONFIG_CPU_CP15 */
 112
 113 static inline unsigned int __attribute_const__ read_cpuid_id(void)
 114 {
 115         return processor_id;
 116 }
 117
 118 #endif /* ifdef CONFIG_CPU_CP15 / else */
 119
 120 static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
 121 {
 122         return (read_cpuid_id() & 0xFF000000) >> 24;
 123 }
 124
 125 static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
 126 {
 127         return read_cpuid_id() & 0xFFF0;
 128 }
 129
 130 static inline unsigned int __attribute_const__ xscale_cpu_arch_version(void)
 131 {
 132         return read_cpuid_part_number() & ARM_CPU_XSCALE_ARCH_MASK;
 133 }
 134
 135 static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
 136 {
 137         return read_cpuid(CPUID_CACHETYPE);
 138 }
 139
 140 static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void)
 141 {
 142         return read_cpuid(CPUID_TCM);
 143 }
 144
 145 static inline unsigned int __attribute_const__ read_cpuid_mpidr(void)
 146 {
 147         return read_cpuid(CPUID_MPIDR);
 148 }
 149
 150 /*
 151  * Intel's XScale3 core supports some v6 features (supersections, L2)
 152  * but advertises itself as v5 as it does not support the v6 ISA.  For
 153  * this reason, we need a way to explicitly test for this type of CPU.
 154  */
 155 #ifndef CONFIG_CPU_XSC3
 156 #define cpu_is_xsc3()   0
 157 #else
 158 static inline int cpu_is_xsc3(void)
 159 {
 160         unsigned int id;
 161         id = read_cpuid_id() & 0xffffe000;
 162         /* It covers both Intel ID and Marvell ID */
 163         if ((id == 0x69056000) || (id == 0x56056000))
 164                 return 1;
 165
 166         return 0;
 167 }
 168 #endif
 169
 170 #if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
 171 #define cpu_is_xscale() 0
 172 #else
 173 #define cpu_is_xscale() 1
 174 #endif
 175
 176 #endif