2 * wm8850.dtsi - Device tree file for Wondermedia WM8850 SoC
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
6 * Licensed under GPLv2 or later
9 /include/ "skeleton.dtsi"
12 compatible = "wm,wm8850";
24 compatible = "simple-bus";
26 interrupt-parent = <&intc0>;
28 intc0: interrupt-controller@d8140000 {
29 compatible = "via,vt8500-intc";
31 reg = <0xd8140000 0x10000>;
32 #interrupt-cells = <1>;
35 /* Secondary IC cascaded to intc0 */
36 intc1: interrupt-controller@d8150000 {
37 compatible = "via,vt8500-intc";
39 #interrupt-cells = <1>;
40 reg = <0xD8150000 0x10000>;
41 interrupts = <56 57 58 59 60 61 62 63>;
44 pinctrl: pinctrl@d8110000 {
45 compatible = "wm,wm8850-pinctrl";
46 reg = <0xd8110000 0x10000>;
48 #interrupt-cells = <2>;
54 compatible = "via,vt8500-pmc";
55 reg = <0xd8130000 0x1000>;
63 compatible = "fixed-clock";
64 clock-frequency = <25000000>;
69 compatible = "fixed-clock";
70 clock-frequency = <24000000>;
75 compatible = "wm,wm8750-pll-clock";
82 compatible = "wm,wm8750-pll-clock";
89 compatible = "via,vt8500-device-clock";
97 compatible = "via,vt8500-device-clock";
105 compatible = "via,vt8500-device-clock";
107 enable-reg = <0x254>;
113 compatible = "via,vt8500-device-clock";
115 enable-reg = <0x254>;
121 compatible = "via,vt8500-device-clock";
123 divisor-reg = <0x350>;
124 enable-reg = <0x250>;
130 compatible = "via,vt8500-device-clock";
132 divisor-reg = <0x330>;
133 divisor-mask = <0x3f>;
134 enable-reg = <0x250>;
141 compatible = "wm,wm8505-fb";
142 reg = <0xd8051700 0x200>;
146 compatible = "wm,prizm-ge-rops";
147 reg = <0xd8050400 0x100>;
152 compatible = "via,vt8500-pwm";
153 reg = <0xd8220000 0x100>;
158 compatible = "via,vt8500-timer";
159 reg = <0xd8130100 0x28>;
164 compatible = "via,vt8500-ehci";
165 reg = <0xd8007900 0x200>;
170 compatible = "platform-uhci";
171 reg = <0xd8007b00 0x200>;
176 compatible = "platform-uhci";
177 reg = <0xd8008d00 0x200>;
181 uart0: uart@d8200000 {
182 compatible = "via,vt8500-uart";
183 reg = <0xd8200000 0x1040>;
185 clocks = <&clkuart0>;
188 uart1: uart@d82b0000 {
189 compatible = "via,vt8500-uart";
190 reg = <0xd82b0000 0x1040>;
192 clocks = <&clkuart1>;
195 uart2: uart@d8210000 {
196 compatible = "via,vt8500-uart";
197 reg = <0xd8210000 0x1040>;
199 clocks = <&clkuart2>;
202 uart3: uart@d82c0000 {
203 compatible = "via,vt8500-uart";
204 reg = <0xd82c0000 0x1040>;
206 clocks = <&clkuart3>;
210 compatible = "via,vt8500-rtc";
211 reg = <0xd8100000 0x10000>;
216 compatible = "wm,wm8505-sdhc";
217 reg = <0xd800a000 0x1000>;
218 interrupts = <20 21>;