2 * ARM Ltd. Versatile Express
4 * Motherboard Express uATX
9 * Original memory map ("Legacy memory map" in the board's
10 * Technical Reference Manual)
12 * WARNING! The hardware described in this file is independent from the
13 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
14 * correspondence between the two configurations.
16 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
17 * CHANGES TO vexpress-v2m-rs1.dtsi!
23 arm,vexpress,site = <0>;
24 compatible = "arm,vexpress,v2m-p1", "simple-bus";
25 #address-cells = <2>; /* SMB chipselect number and offset */
27 #interrupt-cells = <1>;
31 compatible = "arm,vexpress-flash", "cfi-flash";
32 reg = <0 0x00000000 0x04000000>,
33 <1 0x00000000 0x04000000>;
38 compatible = "arm,vexpress-psram", "mtd-ram";
39 reg = <2 0x00000000 0x02000000>;
44 compatible = "arm,vexpress-vram";
45 reg = <3 0x00000000 0x00800000>;
49 compatible = "smsc,lan9118", "smsc,lan9115";
50 reg = <3 0x02000000 0x10000>;
56 vdd33a-supply = <&v2m_fixed_3v3>;
57 vddvario-supply = <&v2m_fixed_3v3>;
61 compatible = "nxp,usb-isp1761";
62 reg = <3 0x03000000 0x20000>;
68 compatible = "arm,amba-bus", "simple-bus";
71 ranges = <0 7 0 0x20000>;
73 v2m_sysreg: sysreg@00000 {
74 compatible = "arm,vexpress-sysreg";
75 reg = <0x00000 0x1000>;
77 v2m_led_gpios: sys_led@08 {
78 compatible = "arm,vexpress-sysreg,sys_led";
83 v2m_mmc_gpios: sys_mci@48 {
84 compatible = "arm,vexpress-sysreg,sys_mci";
89 v2m_flash_gpios: sys_flash@4c {
90 compatible = "arm,vexpress-sysreg,sys_flash";
96 v2m_sysctl: sysctl@01000 {
97 compatible = "arm,sp810", "arm,primecell";
98 reg = <0x01000 0x1000>;
99 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
100 clock-names = "refclk", "timclk", "apb_pclk";
102 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
106 v2m_i2c_pcie: i2c@02000 {
107 compatible = "arm,versatile-i2c";
108 reg = <0x02000 0x1000>;
110 #address-cells = <1>;
114 compatible = "idt,89hpes32h8";
120 compatible = "arm,pl041", "arm,primecell";
121 reg = <0x04000 0x1000>;
124 clock-names = "apb_pclk";
128 compatible = "arm,pl180", "arm,primecell";
129 reg = <0x05000 0x1000>;
131 cd-gpios = <&v2m_mmc_gpios 0 0>;
132 wp-gpios = <&v2m_mmc_gpios 1 0>;
133 max-frequency = <12000000>;
134 vmmc-supply = <&v2m_fixed_3v3>;
135 clocks = <&v2m_clk24mhz>, <&smbclk>;
136 clock-names = "mclk", "apb_pclk";
140 compatible = "arm,pl050", "arm,primecell";
141 reg = <0x06000 0x1000>;
143 clocks = <&v2m_clk24mhz>, <&smbclk>;
144 clock-names = "KMIREFCLK", "apb_pclk";
148 compatible = "arm,pl050", "arm,primecell";
149 reg = <0x07000 0x1000>;
151 clocks = <&v2m_clk24mhz>, <&smbclk>;
152 clock-names = "KMIREFCLK", "apb_pclk";
155 v2m_serial0: uart@09000 {
156 compatible = "arm,pl011", "arm,primecell";
157 reg = <0x09000 0x1000>;
159 clocks = <&v2m_oscclk2>, <&smbclk>;
160 clock-names = "uartclk", "apb_pclk";
163 v2m_serial1: uart@0a000 {
164 compatible = "arm,pl011", "arm,primecell";
165 reg = <0x0a000 0x1000>;
167 clocks = <&v2m_oscclk2>, <&smbclk>;
168 clock-names = "uartclk", "apb_pclk";
171 v2m_serial2: uart@0b000 {
172 compatible = "arm,pl011", "arm,primecell";
173 reg = <0x0b000 0x1000>;
175 clocks = <&v2m_oscclk2>, <&smbclk>;
176 clock-names = "uartclk", "apb_pclk";
179 v2m_serial3: uart@0c000 {
180 compatible = "arm,pl011", "arm,primecell";
181 reg = <0x0c000 0x1000>;
183 clocks = <&v2m_oscclk2>, <&smbclk>;
184 clock-names = "uartclk", "apb_pclk";
188 compatible = "arm,sp805", "arm,primecell";
189 reg = <0x0f000 0x1000>;
191 clocks = <&v2m_refclk32khz>, <&smbclk>;
192 clock-names = "wdogclk", "apb_pclk";
195 v2m_timer01: timer@11000 {
196 compatible = "arm,sp804", "arm,primecell";
197 reg = <0x11000 0x1000>;
199 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
200 clock-names = "timclken1", "timclken2", "apb_pclk";
203 v2m_timer23: timer@12000 {
204 compatible = "arm,sp804", "arm,primecell";
205 reg = <0x12000 0x1000>;
207 clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
208 clock-names = "timclken1", "timclken2", "apb_pclk";
212 v2m_i2c_dvi: i2c@16000 {
213 compatible = "arm,versatile-i2c";
214 reg = <0x16000 0x1000>;
216 #address-cells = <1>;
220 compatible = "sil,sii9022-tpi", "sil,sii9022";
225 compatible = "sil,sii9022-cpi", "sil,sii9022";
231 compatible = "arm,pl031", "arm,primecell";
232 reg = <0x17000 0x1000>;
235 clock-names = "apb_pclk";
238 compact-flash@1a000 {
239 compatible = "arm,vexpress-cf", "ata-generic";
246 compatible = "arm,pl111", "arm,primecell";
247 reg = <0x1f000 0x1000>;
249 clocks = <&v2m_oscclk1>, <&smbclk>;
250 clock-names = "clcdclk", "apb_pclk";
254 v2m_fixed_3v3: fixedregulator@0 {
255 compatible = "regulator-fixed";
256 regulator-name = "3V3";
257 regulator-min-microvolt = <3300000>;
258 regulator-max-microvolt = <3300000>;
262 v2m_clk24mhz: clk24mhz {
263 compatible = "fixed-clock";
265 clock-frequency = <24000000>;
266 clock-output-names = "v2m:clk24mhz";
269 v2m_refclk1mhz: refclk1mhz {
270 compatible = "fixed-clock";
272 clock-frequency = <1000000>;
273 clock-output-names = "v2m:refclk1mhz";
276 v2m_refclk32khz: refclk32khz {
277 compatible = "fixed-clock";
279 clock-frequency = <32768>;
280 clock-output-names = "v2m:refclk32khz";
284 compatible = "gpio-leds";
287 label = "v2m:green:user1";
288 gpios = <&v2m_led_gpios 0 0>;
289 linux,default-trigger = "heartbeat";
293 label = "v2m:green:user2";
294 gpios = <&v2m_led_gpios 1 0>;
295 linux,default-trigger = "mmc0";
299 label = "v2m:green:user3";
300 gpios = <&v2m_led_gpios 2 0>;
301 linux,default-trigger = "cpu0";
305 label = "v2m:green:user4";
306 gpios = <&v2m_led_gpios 3 0>;
307 linux,default-trigger = "cpu1";
311 label = "v2m:green:user5";
312 gpios = <&v2m_led_gpios 4 0>;
313 linux,default-trigger = "cpu2";
317 label = "v2m:green:user6";
318 gpios = <&v2m_led_gpios 5 0>;
319 linux,default-trigger = "cpu3";
323 label = "v2m:green:user7";
324 gpios = <&v2m_led_gpios 6 0>;
325 linux,default-trigger = "cpu4";
329 label = "v2m:green:user8";
330 gpios = <&v2m_led_gpios 7 0>;
331 linux,default-trigger = "cpu5";
336 compatible = "arm,vexpress,config-bus";
337 arm,vexpress,config-bridge = <&v2m_sysreg>;
340 /* MCC static memory clock */
341 compatible = "arm,vexpress-osc";
342 arm,vexpress-sysreg,func = <1 0>;
343 freq-range = <25000000 60000000>;
345 clock-output-names = "v2m:oscclk0";
350 compatible = "arm,vexpress-osc";
351 arm,vexpress-sysreg,func = <1 1>;
352 freq-range = <23750000 63500000>;
354 clock-output-names = "v2m:oscclk1";
358 /* IO FPGA peripheral clock */
359 compatible = "arm,vexpress-osc";
360 arm,vexpress-sysreg,func = <1 2>;
361 freq-range = <24000000 24000000>;
363 clock-output-names = "v2m:oscclk2";
367 /* Logic level voltage */
368 compatible = "arm,vexpress-volt";
369 arm,vexpress-sysreg,func = <2 0>;
370 regulator-name = "VIO";
376 /* MCC internal operating temperature */
377 compatible = "arm,vexpress-temp";
378 arm,vexpress-sysreg,func = <4 0>;
383 compatible = "arm,vexpress-reset";
384 arm,vexpress-sysreg,func = <5 0>;
388 compatible = "arm,vexpress-muxfpga";
389 arm,vexpress-sysreg,func = <7 0>;
393 compatible = "arm,vexpress-shutdown";
394 arm,vexpress-sysreg,func = <8 0>;
398 compatible = "arm,vexpress-reboot";
399 arm,vexpress-sysreg,func = <9 0>;
403 compatible = "arm,vexpress-dvimode";
404 arm,vexpress-sysreg,func = <11 0>;