2 * ARM Ltd. Versatile Express
4 * Motherboard Express uATX
9 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
10 * Technical Reference Manual)
12 * WARNING! The hardware described in this file is independent from the
13 * original variant (vexpress-v2m.dtsi), but there is a strong
14 * correspondence between the two configurations.
16 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
17 * CHANGES TO vexpress-v2m.dtsi!
23 arm,vexpress,site = <0>;
24 arm,v2m-memory-map = "rs1";
25 compatible = "arm,vexpress,v2m-p1", "simple-bus";
26 #address-cells = <2>; /* SMB chipselect number and offset */
28 #interrupt-cells = <1>;
32 compatible = "arm,vexpress-flash", "cfi-flash";
33 reg = <0 0x00000000 0x04000000>,
34 <4 0x00000000 0x04000000>;
39 compatible = "arm,vexpress-psram", "mtd-ram";
40 reg = <1 0x00000000 0x02000000>;
45 compatible = "arm,vexpress-vram";
46 reg = <2 0x00000000 0x00800000>;
50 compatible = "smsc,lan9118", "smsc,lan9115";
51 reg = <2 0x02000000 0x10000>;
57 vdd33a-supply = <&v2m_fixed_3v3>;
58 vddvario-supply = <&v2m_fixed_3v3>;
62 compatible = "nxp,usb-isp1761";
63 reg = <2 0x03000000 0x20000>;
69 compatible = "arm,amba-bus", "simple-bus";
72 ranges = <0 3 0 0x200000>;
74 v2m_sysreg: sysreg@010000 {
75 compatible = "arm,vexpress-sysreg";
76 reg = <0x010000 0x1000>;
78 v2m_led_gpios: sys_led@08 {
79 compatible = "arm,vexpress-sysreg,sys_led";
84 v2m_mmc_gpios: sys_mci@48 {
85 compatible = "arm,vexpress-sysreg,sys_mci";
90 v2m_flash_gpios: sys_flash@4c {
91 compatible = "arm,vexpress-sysreg,sys_flash";
97 v2m_sysctl: sysctl@020000 {
98 compatible = "arm,sp810", "arm,primecell";
99 reg = <0x020000 0x1000>;
100 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
101 clock-names = "refclk", "timclk", "apb_pclk";
103 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
107 v2m_i2c_pcie: i2c@030000 {
108 compatible = "arm,versatile-i2c";
109 reg = <0x030000 0x1000>;
111 #address-cells = <1>;
115 compatible = "idt,89hpes32h8";
121 compatible = "arm,pl041", "arm,primecell";
122 reg = <0x040000 0x1000>;
125 clock-names = "apb_pclk";
129 compatible = "arm,pl180", "arm,primecell";
130 reg = <0x050000 0x1000>;
132 cd-gpios = <&v2m_mmc_gpios 0 0>;
133 wp-gpios = <&v2m_mmc_gpios 1 0>;
134 max-frequency = <12000000>;
135 vmmc-supply = <&v2m_fixed_3v3>;
136 clocks = <&v2m_clk24mhz>, <&smbclk>;
137 clock-names = "mclk", "apb_pclk";
141 compatible = "arm,pl050", "arm,primecell";
142 reg = <0x060000 0x1000>;
144 clocks = <&v2m_clk24mhz>, <&smbclk>;
145 clock-names = "KMIREFCLK", "apb_pclk";
149 compatible = "arm,pl050", "arm,primecell";
150 reg = <0x070000 0x1000>;
152 clocks = <&v2m_clk24mhz>, <&smbclk>;
153 clock-names = "KMIREFCLK", "apb_pclk";
156 v2m_serial0: uart@090000 {
157 compatible = "arm,pl011", "arm,primecell";
158 reg = <0x090000 0x1000>;
160 clocks = <&v2m_oscclk2>, <&smbclk>;
161 clock-names = "uartclk", "apb_pclk";
164 v2m_serial1: uart@0a0000 {
165 compatible = "arm,pl011", "arm,primecell";
166 reg = <0x0a0000 0x1000>;
168 clocks = <&v2m_oscclk2>, <&smbclk>;
169 clock-names = "uartclk", "apb_pclk";
172 v2m_serial2: uart@0b0000 {
173 compatible = "arm,pl011", "arm,primecell";
174 reg = <0x0b0000 0x1000>;
176 clocks = <&v2m_oscclk2>, <&smbclk>;
177 clock-names = "uartclk", "apb_pclk";
180 v2m_serial3: uart@0c0000 {
181 compatible = "arm,pl011", "arm,primecell";
182 reg = <0x0c0000 0x1000>;
184 clocks = <&v2m_oscclk2>, <&smbclk>;
185 clock-names = "uartclk", "apb_pclk";
189 compatible = "arm,sp805", "arm,primecell";
190 reg = <0x0f0000 0x1000>;
192 clocks = <&v2m_refclk32khz>, <&smbclk>;
193 clock-names = "wdogclk", "apb_pclk";
196 v2m_timer01: timer@110000 {
197 compatible = "arm,sp804", "arm,primecell";
198 reg = <0x110000 0x1000>;
200 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
201 clock-names = "timclken1", "timclken2", "apb_pclk";
204 v2m_timer23: timer@120000 {
205 compatible = "arm,sp804", "arm,primecell";
206 reg = <0x120000 0x1000>;
208 clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
209 clock-names = "timclken1", "timclken2", "apb_pclk";
213 v2m_i2c_dvi: i2c@160000 {
214 compatible = "arm,versatile-i2c";
215 reg = <0x160000 0x1000>;
217 #address-cells = <1>;
221 compatible = "sil,sii9022-tpi", "sil,sii9022";
226 compatible = "sil,sii9022-cpi", "sil,sii9022";
232 compatible = "arm,pl031", "arm,primecell";
233 reg = <0x170000 0x1000>;
236 clock-names = "apb_pclk";
239 compact-flash@1a0000 {
240 compatible = "arm,vexpress-cf", "ata-generic";
241 reg = <0x1a0000 0x100
247 compatible = "arm,pl111", "arm,primecell";
248 reg = <0x1f0000 0x1000>;
250 clocks = <&v2m_oscclk1>, <&smbclk>;
251 clock-names = "clcdclk", "apb_pclk";
255 v2m_fixed_3v3: fixedregulator@0 {
256 compatible = "regulator-fixed";
257 regulator-name = "3V3";
258 regulator-min-microvolt = <3300000>;
259 regulator-max-microvolt = <3300000>;
263 v2m_clk24mhz: clk24mhz {
264 compatible = "fixed-clock";
266 clock-frequency = <24000000>;
267 clock-output-names = "v2m:clk24mhz";
270 v2m_refclk1mhz: refclk1mhz {
271 compatible = "fixed-clock";
273 clock-frequency = <1000000>;
274 clock-output-names = "v2m:refclk1mhz";
277 v2m_refclk32khz: refclk32khz {
278 compatible = "fixed-clock";
280 clock-frequency = <32768>;
281 clock-output-names = "v2m:refclk32khz";
285 compatible = "gpio-leds";
288 label = "v2m:green:user1";
289 gpios = <&v2m_led_gpios 0 0>;
290 linux,default-trigger = "heartbeat";
294 label = "v2m:green:user2";
295 gpios = <&v2m_led_gpios 1 0>;
296 linux,default-trigger = "mmc0";
300 label = "v2m:green:user3";
301 gpios = <&v2m_led_gpios 2 0>;
302 linux,default-trigger = "cpu0";
306 label = "v2m:green:user4";
307 gpios = <&v2m_led_gpios 3 0>;
308 linux,default-trigger = "cpu1";
312 label = "v2m:green:user5";
313 gpios = <&v2m_led_gpios 4 0>;
314 linux,default-trigger = "cpu2";
318 label = "v2m:green:user6";
319 gpios = <&v2m_led_gpios 5 0>;
320 linux,default-trigger = "cpu3";
324 label = "v2m:green:user7";
325 gpios = <&v2m_led_gpios 6 0>;
326 linux,default-trigger = "cpu4";
330 label = "v2m:green:user8";
331 gpios = <&v2m_led_gpios 7 0>;
332 linux,default-trigger = "cpu5";
337 compatible = "arm,vexpress,config-bus";
338 arm,vexpress,config-bridge = <&v2m_sysreg>;
341 /* MCC static memory clock */
342 compatible = "arm,vexpress-osc";
343 arm,vexpress-sysreg,func = <1 0>;
344 freq-range = <25000000 60000000>;
346 clock-output-names = "v2m:oscclk0";
351 compatible = "arm,vexpress-osc";
352 arm,vexpress-sysreg,func = <1 1>;
353 freq-range = <23750000 63500000>;
355 clock-output-names = "v2m:oscclk1";
359 /* IO FPGA peripheral clock */
360 compatible = "arm,vexpress-osc";
361 arm,vexpress-sysreg,func = <1 2>;
362 freq-range = <24000000 24000000>;
364 clock-output-names = "v2m:oscclk2";
368 /* Logic level voltage */
369 compatible = "arm,vexpress-volt";
370 arm,vexpress-sysreg,func = <2 0>;
371 regulator-name = "VIO";
377 /* MCC internal operating temperature */
378 compatible = "arm,vexpress-temp";
379 arm,vexpress-sysreg,func = <4 0>;
384 compatible = "arm,vexpress-reset";
385 arm,vexpress-sysreg,func = <5 0>;
389 compatible = "arm,vexpress-muxfpga";
390 arm,vexpress-sysreg,func = <7 0>;
394 compatible = "arm,vexpress-shutdown";
395 arm,vexpress-sysreg,func = <8 0>;
399 compatible = "arm,vexpress-reboot";
400 arm,vexpress-sysreg,func = <9 0>;
404 compatible = "arm,vexpress-dvimode";
405 arm,vexpress-sysreg,func = <11 0>;