arch/arm/boot/dts/tegra30-cardhu.dtsi

   1 #include "tegra30.dtsi"
   2
   3 /**
   4  * This file contains common DT entry for all fab version of Cardhu.
   5  * There is multiple fab version of Cardhu starting from A01 to A07.
   6  * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
   7  * A02 will have different sets of GPIOs for fixed regulator compare to
   8  * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
   9  * compatible with fab version A04. Based on Cardhu fab version, the
  10  * related dts file need to be chosen like for Cardhu fab version A02,
  11  * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
  12  * tegra30-cardhu-a04.dts.
  13  * The identification of board is done in two ways, by looking the sticker
  14  * on PCB and by reading board id eeprom.
  15  * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
  16  * number is the fab version like here it is 002 and hence fab version A02.
  17  * The (downstream internal) U-Boot of Cardhu display the board-id as
  18  * follows:
  19  * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
  20  * In this Fab version is 02 i.e. A02.
  21  * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
  22  * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
  23  * wide.
  24  */
  25
  26 / {
  27         model = "NVIDIA Tegra30 Cardhu evaluation board";
  28         compatible = "nvidia,cardhu", "nvidia,tegra30";
  29
  30         memory {
  31                 reg = <0x80000000 0x40000000>;
  32         };
  33
  34         pinmux {
  35                 pinctrl-names = "default";
  36                 pinctrl-0 = <&state_default>;
  37
  38                 state_default: pinmux {
  39                         sdmmc1_clk_pz0 {
  40                                 nvidia,pins = "sdmmc1_clk_pz0";
  41                                 nvidia,function = "sdmmc1";
  42                                 nvidia,pull = <0>;
  43                                 nvidia,tristate = <0>;
  44                         };
  45                         sdmmc1_cmd_pz1 {
  46                                 nvidia,pins =   "sdmmc1_cmd_pz1",
  47                                                 "sdmmc1_dat0_py7",
  48                                                 "sdmmc1_dat1_py6",
  49                                                 "sdmmc1_dat2_py5",
  50                                                 "sdmmc1_dat3_py4";
  51                                 nvidia,function = "sdmmc1";
  52                                 nvidia,pull = <2>;
  53                                 nvidia,tristate = <0>;
  54                         };
  55                         sdmmc3_clk_pa6 {
  56                                 nvidia,pins = "sdmmc3_clk_pa6";
  57                                 nvidia,function = "sdmmc3";
  58                                 nvidia,pull = <0>;
  59                                 nvidia,tristate = <0>;
  60                         };
  61                         sdmmc3_cmd_pa7 {
  62                                 nvidia,pins =   "sdmmc3_cmd_pa7",
  63                                                 "sdmmc3_dat0_pb7",
  64                                                 "sdmmc3_dat1_pb6",
  65                                                 "sdmmc3_dat2_pb5",
  66                                                 "sdmmc3_dat3_pb4";
  67                                 nvidia,function = "sdmmc3";
  68                                 nvidia,pull = <2>;
  69                                 nvidia,tristate = <0>;
  70                         };
  71                         sdmmc4_clk_pcc4 {
  72                                 nvidia,pins =   "sdmmc4_clk_pcc4",
  73                                                 "sdmmc4_rst_n_pcc3";
  74                                 nvidia,function = "sdmmc4";
  75                                 nvidia,pull = <0>;
  76                                 nvidia,tristate = <0>;
  77                         };
  78                         sdmmc4_dat0_paa0 {
  79                                 nvidia,pins =   "sdmmc4_dat0_paa0",
  80                                                 "sdmmc4_dat1_paa1",
  81                                                 "sdmmc4_dat2_paa2",
  82                                                 "sdmmc4_dat3_paa3",
  83                                                 "sdmmc4_dat4_paa4",
  84                                                 "sdmmc4_dat5_paa5",
  85                                                 "sdmmc4_dat6_paa6",
  86                                                 "sdmmc4_dat7_paa7";
  87                                 nvidia,function = "sdmmc4";
  88                                 nvidia,pull = <2>;
  89                                 nvidia,tristate = <0>;
  90                         };
  91                         dap2_fs_pa2 {
  92                                 nvidia,pins =   "dap2_fs_pa2",
  93                                                 "dap2_sclk_pa3",
  94                                                 "dap2_din_pa4",
  95                                                 "dap2_dout_pa5";
  96                                 nvidia,function = "i2s1";
  97                                 nvidia,pull = <0>;
  98                                 nvidia,tristate = <0>;
  99                         };
 100                         sdio3 {
 101                                 nvidia,pins = "drive_sdio3";
 102                                 nvidia,high-speed-mode = <0>;
 103                                 nvidia,schmitt = <0>;
 104                                 nvidia,pull-down-strength = <46>;
 105                                 nvidia,pull-up-strength = <42>;
 106                                 nvidia,slew-rate-rising = <1>;
 107                                 nvidia,slew-rate-falling = <1>;
 108                         };
 109                         uart3_txd_pw6 {
 110                                 nvidia,pins =   "uart3_txd_pw6",
 111                                                 "uart3_cts_n_pa1",
 112                                                 "uart3_rts_n_pc0",
 113                                                 "uart3_rxd_pw7";
 114                                 nvidia,function = "uartc";
 115                                 nvidia,pull = <0>;
 116                                 nvidia,tristate = <0>;
 117                         };
 118                 };
 119         };
 120
 121         serial@70006000 {
 122                 status = "okay";
 123         };
 124
 125         serial@70006200 {
 126                 compatible = "nvidia,tegra30-hsuart";
 127                 status = "okay";
 128         };
 129
 130         i2c@7000c000 {
 131                 status = "okay";
 132                 clock-frequency = <100000>;
 133         };
 134
 135         i2c@7000c400 {
 136                 status = "okay";
 137                 clock-frequency = <100000>;
 138         };
 139
 140         i2c@7000c500 {
 141                 status = "okay";
 142                 clock-frequency = <100000>;
 143
 144                 /* ALS and Proximity sensor */
 145                 isl29028@44 {
 146                         compatible = "isil,isl29028";
 147                         reg = <0x44>;
 148                         interrupt-parent = <&gpio>;
 149                         interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
 150                 };
 151         };
 152
 153         i2c@7000c700 {
 154                 status = "okay";
 155                 clock-frequency = <100000>;
 156         };
 157
 158         i2c@7000d000 {
 159                 status = "okay";
 160                 clock-frequency = <100000>;
 161
 162                 wm8903: wm8903@1a {
 163                         compatible = "wlf,wm8903";
 164                         reg = <0x1a>;
 165                         interrupt-parent = <&gpio>;
 166                         interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
 167
 168                         gpio-controller;
 169                         #gpio-cells = <2>;
 170
 171                         micdet-cfg = <0>;
 172                         micdet-delay = <100>;
 173                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 174                 };
 175
 176                 pmic: tps65911@2d {
 177                         compatible = "ti,tps65911";
 178                         reg = <0x2d>;
 179
 180                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 181                         #interrupt-cells = <2>;
 182                         interrupt-controller;
 183
 184                         ti,system-power-controller;
 185
 186                         #gpio-cells = <2>;
 187                         gpio-controller;
 188
 189                         vcc1-supply = <&vdd_ac_bat_reg>;
 190                         vcc2-supply = <&vdd_ac_bat_reg>;
 191                         vcc3-supply = <&vio_reg>;
 192                         vcc4-supply = <&vdd_5v0_reg>;
 193                         vcc5-supply = <&vdd_ac_bat_reg>;
 194                         vcc6-supply = <&vdd2_reg>;
 195                         vcc7-supply = <&vdd_ac_bat_reg>;
 196                         vccio-supply = <&vdd_ac_bat_reg>;
 197
 198                         regulators {
 199                                 vdd1_reg: vdd1 {
 200                                         regulator-name = "vddio_ddr_1v2";
 201                                         regulator-min-microvolt = <1200000>;
 202                                         regulator-max-microvolt = <1200000>;
 203                                         regulator-always-on;
 204                                 };
 205
 206                                 vdd2_reg: vdd2 {
 207                                         regulator-name = "vdd_1v5_gen";
 208                                         regulator-min-microvolt = <1500000>;
 209                                         regulator-max-microvolt = <1500000>;
 210                                         regulator-always-on;
 211                                 };
 212
 213                                 vddctrl_reg: vddctrl {
 214                                         regulator-name = "vdd_cpu,vdd_sys";
 215                                         regulator-min-microvolt = <1000000>;
 216                                         regulator-max-microvolt = <1000000>;
 217                                         regulator-always-on;
 218                                 };
 219
 220                                 vio_reg: vio {
 221                                         regulator-name = "vdd_1v8_gen";
 222                                         regulator-min-microvolt = <1800000>;
 223                                         regulator-max-microvolt = <1800000>;
 224                                         regulator-always-on;
 225                                 };
 226
 227                                 ldo1_reg: ldo1 {
 228                                         regulator-name = "vdd_pexa,vdd_pexb";
 229                                         regulator-min-microvolt = <1050000>;
 230                                         regulator-max-microvolt = <1050000>;
 231                                 };
 232
 233                                 ldo2_reg: ldo2 {
 234                                         regulator-name = "vdd_sata,avdd_plle";
 235                                         regulator-min-microvolt = <1050000>;
 236                                         regulator-max-microvolt = <1050000>;
 237                                 };
 238
 239                                 /* LDO3 is not connected to anything */
 240
 241                                 ldo4_reg: ldo4 {
 242                                         regulator-name = "vdd_rtc";
 243                                         regulator-min-microvolt = <1200000>;
 244                                         regulator-max-microvolt = <1200000>;
 245                                         regulator-always-on;
 246                                 };
 247
 248                                 ldo5_reg: ldo5 {
 249                                         regulator-name = "vddio_sdmmc,avdd_vdac";
 250                                         regulator-min-microvolt = <3300000>;
 251                                         regulator-max-microvolt = <3300000>;
 252                                         regulator-always-on;
 253                                 };
 254
 255                                 ldo6_reg: ldo6 {
 256                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
 257                                         regulator-min-microvolt = <1200000>;
 258                                         regulator-max-microvolt = <1200000>;
 259                                 };
 260
 261                                 ldo7_reg: ldo7 {
 262                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
 263                                         regulator-min-microvolt = <1200000>;
 264                                         regulator-max-microvolt = <1200000>;
 265                                         regulator-always-on;
 266                                 };
 267
 268                                 ldo8_reg: ldo8 {
 269                                         regulator-name = "vdd_ddr_hs";
 270                                         regulator-min-microvolt = <1000000>;
 271                                         regulator-max-microvolt = <1000000>;
 272                                         regulator-always-on;
 273                                 };
 274                         };
 275                 };
 276
 277                 nct1008 {
 278                         compatible = "onnn,nct1008";
 279                         reg = <0x4c>;
 280                         interrupt-parent = <&gpio>;
 281                         interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
 282                 };
 283
 284                 tps62361 {
 285                         compatible = "ti,tps62361";
 286                         reg = <0x60>;
 287
 288                         regulator-name = "tps62361-vout";
 289                         regulator-min-microvolt = <500000>;
 290                         regulator-max-microvolt = <1500000>;
 291                         regulator-boot-on;
 292                         regulator-always-on;
 293                         ti,vsel0-state-high;
 294                         ti,vsel1-state-high;
 295                 };
 296         };
 297
 298         spi@7000da00 {
 299                 status = "okay";
 300                 spi-max-frequency = <25000000>;
 301                 spi-flash@1 {
 302                         compatible = "winbond,w25q32";
 303                         reg = <1>;
 304                         spi-max-frequency = <20000000>;
 305                 };
 306         };
 307
 308         ahub {
 309                 i2s@70080400 {
 310                         status = "okay";
 311                 };
 312         };
 313
 314         pmc {
 315                 status = "okay";
 316                 nvidia,invert-interrupt;
 317                 nvidia,suspend-mode = <2>;
 318                 nvidia,cpu-pwr-good-time = <2000>;
 319                 nvidia,cpu-pwr-off-time = <200>;
 320                 nvidia,core-pwr-good-time = <3845 3845>;
 321                 nvidia,core-pwr-off-time = <0>;
 322                 nvidia,core-power-req-active-high;
 323                 nvidia,sys-clock-req-active-high;
 324         };
 325
 326         sdhci@78000000 {
 327                 status = "okay";
 328                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 329                 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
 330                 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
 331                 bus-width = <4>;
 332         };
 333
 334         sdhci@78000600 {
 335                 status = "okay";
 336                 bus-width = <8>;
 337                 non-removable;
 338         };
 339
 340         clocks {
 341                 compatible = "simple-bus";
 342                 #address-cells = <1>;
 343                 #size-cells = <0>;
 344
 345                 clk32k_in: clock {
 346                         compatible = "fixed-clock";
 347                         reg=<0>;
 348                         #clock-cells = <0>;
 349                         clock-frequency = <32768>;
 350                 };
 351         };
 352
 353         regulators {
 354                 compatible = "simple-bus";
 355                 #address-cells = <1>;
 356                 #size-cells = <0>;
 357
 358                 vdd_ac_bat_reg: regulator@0 {
 359                         compatible = "regulator-fixed";
 360                         reg = <0>;
 361                         regulator-name = "vdd_ac_bat";
 362                         regulator-min-microvolt = <5000000>;
 363                         regulator-max-microvolt = <5000000>;
 364                         regulator-always-on;
 365                 };
 366
 367                 cam_1v8_reg: regulator@1 {
 368                         compatible = "regulator-fixed";
 369                         reg = <1>;
 370                         regulator-name = "cam_1v8";
 371                         regulator-min-microvolt = <1800000>;
 372                         regulator-max-microvolt = <1800000>;
 373                         enable-active-high;
 374                         gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
 375                         vin-supply = <&vio_reg>;
 376                 };
 377
 378                 cp_5v_reg: regulator@2 {
 379                         compatible = "regulator-fixed";
 380                         reg = <2>;
 381                         regulator-name = "cp_5v";
 382                         regulator-min-microvolt = <5000000>;
 383                         regulator-max-microvolt = <5000000>;
 384                         regulator-boot-on;
 385                         regulator-always-on;
 386                         enable-active-high;
 387                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 388                 };
 389
 390                 emmc_3v3_reg: regulator@3 {
 391                         compatible = "regulator-fixed";
 392                         reg = <3>;
 393                         regulator-name = "emmc_3v3";
 394                         regulator-min-microvolt = <3300000>;
 395                         regulator-max-microvolt = <3300000>;
 396                         regulator-always-on;
 397                         regulator-boot-on;
 398                         enable-active-high;
 399                         gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
 400                         vin-supply = <&sys_3v3_reg>;
 401                 };
 402
 403                 modem_3v3_reg: regulator@4 {
 404                         compatible = "regulator-fixed";
 405                         reg = <4>;
 406                         regulator-name = "modem_3v3";
 407                         regulator-min-microvolt = <3300000>;
 408                         regulator-max-microvolt = <3300000>;
 409                         enable-active-high;
 410                         gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
 411                 };
 412
 413                 pex_hvdd_3v3_reg: regulator@5 {
 414                         compatible = "regulator-fixed";
 415                         reg = <5>;
 416                         regulator-name = "pex_hvdd_3v3";
 417                         regulator-min-microvolt = <3300000>;
 418                         regulator-max-microvolt = <3300000>;
 419                         enable-active-high;
 420                         gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
 421                         vin-supply = <&sys_3v3_reg>;
 422                 };
 423
 424                 vdd_cam1_ldo_reg: regulator@6 {
 425                         compatible = "regulator-fixed";
 426                         reg = <6>;
 427                         regulator-name = "vdd_cam1_ldo";
 428                         regulator-min-microvolt = <2800000>;
 429                         regulator-max-microvolt = <2800000>;
 430                         enable-active-high;
 431                         gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
 432                         vin-supply = <&sys_3v3_reg>;
 433                 };
 434
 435                 vdd_cam2_ldo_reg: regulator@7 {
 436                         compatible = "regulator-fixed";
 437                         reg = <7>;
 438                         regulator-name = "vdd_cam2_ldo";
 439                         regulator-min-microvolt = <2800000>;
 440                         regulator-max-microvolt = <2800000>;
 441                         enable-active-high;
 442                         gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
 443                         vin-supply = <&sys_3v3_reg>;
 444                 };
 445
 446                 vdd_cam3_ldo_reg: regulator@8 {
 447                         compatible = "regulator-fixed";
 448                         reg = <8>;
 449                         regulator-name = "vdd_cam3_ldo";
 450                         regulator-min-microvolt = <3300000>;
 451                         regulator-max-microvolt = <3300000>;
 452                         enable-active-high;
 453                         gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
 454                         vin-supply = <&sys_3v3_reg>;
 455                 };
 456
 457                 vdd_com_reg: regulator@9 {
 458                         compatible = "regulator-fixed";
 459                         reg = <9>;
 460                         regulator-name = "vdd_com";
 461                         regulator-min-microvolt = <3300000>;
 462                         regulator-max-microvolt = <3300000>;
 463                         regulator-always-on;
 464                         regulator-boot-on;
 465                         enable-active-high;
 466                         gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 467                         vin-supply = <&sys_3v3_reg>;
 468                 };
 469
 470                 vdd_fuse_3v3_reg: regulator@10 {
 471                         compatible = "regulator-fixed";
 472                         reg = <10>;
 473                         regulator-name = "vdd_fuse_3v3";
 474                         regulator-min-microvolt = <3300000>;
 475                         regulator-max-microvolt = <3300000>;
 476                         enable-active-high;
 477                         gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
 478                         vin-supply = <&sys_3v3_reg>;
 479                 };
 480
 481                 vdd_pnl1_reg: regulator@11 {
 482                         compatible = "regulator-fixed";
 483                         reg = <11>;
 484                         regulator-name = "vdd_pnl1";
 485                         regulator-min-microvolt = <3300000>;
 486                         regulator-max-microvolt = <3300000>;
 487                         regulator-always-on;
 488                         regulator-boot-on;
 489                         enable-active-high;
 490                         gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
 491                         vin-supply = <&sys_3v3_reg>;
 492                 };
 493
 494                 vdd_vid_reg: regulator@12 {
 495                         compatible = "regulator-fixed";
 496                         reg = <12>;
 497                         regulator-name = "vddio_vid";
 498                         regulator-min-microvolt = <5000000>;
 499                         regulator-max-microvolt = <5000000>;
 500                         enable-active-high;
 501                         gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
 502                         gpio-open-drain;
 503                         vin-supply = <&vdd_5v0_reg>;
 504                 };
 505         };
 506
 507         sound {
 508                 compatible = "nvidia,tegra-audio-wm8903-cardhu",
 509                              "nvidia,tegra-audio-wm8903";
 510                 nvidia,model = "NVIDIA Tegra Cardhu";
 511
 512                 nvidia,audio-routing =
 513                         "Headphone Jack", "HPOUTR",
 514                         "Headphone Jack", "HPOUTL",
 515                         "Int Spk", "ROP",
 516                         "Int Spk", "RON",
 517                         "Int Spk", "LOP",
 518                         "Int Spk", "LON",
 519                         "Mic Jack", "MICBIAS",
 520                         "IN1L", "Mic Jack";
 521
 522                 nvidia,i2s-controller = <&tegra_i2s1>;
 523                 nvidia,audio-codec = <&wm8903>;
 524
 525                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 526                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 527                         GPIO_ACTIVE_HIGH>;
 528
 529                 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
 530                          <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
 531                          <&tegra_car TEGRA30_CLK_EXTERN1>;
 532                 clock-names = "pll_a", "pll_a_out0", "mclk";
 533         };
 534 };