Merge tag 'upstream-3.19-rc1' of git://git.infradead.org/linux-ubifs
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / tegra114-roth.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra114.dtsi"
5
6 / {
7         model = "NVIDIA SHIELD";
8         compatible = "nvidia,roth", "nvidia,tegra114";
9
10         chosen {
11                 /* SHIELD's bootloader's arguments need to be overridden */
12                 bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:1";
13                 /* SHIELD's bootloader will place initrd at this address */
14                 linux,initrd-start = <0x82000000>;
15                 linux,initrd-end = <0x82800000>;
16         };
17
18         aliases {
19                 serial0 = &uartd;
20         };
21
22         firmware {
23                 trusted-foundations {
24                         compatible = "tlm,trusted-foundations";
25                         tlm,version-major = <2>;
26                         tlm,version-minor = <8>;
27                 };
28         };
29
30         memory {
31                 /* memory >= 0x79600000 is reserved for firmware usage */
32                 reg = <0x80000000 0x79600000>;
33         };
34
35         host1x@50000000 {
36                 dsi@54300000 {
37                         status = "okay";
38
39                         vdd-supply = <&vdd_1v2_ap>;
40
41                         panel@0 {
42                                 compatible = "lg,lh500wx1-sd03";
43                                 reg = <0>;
44
45                                 power-supply = <&vdd_lcd>;
46                                 backlight = <&backlight>;
47                         };
48                 };
49         };
50
51         pinmux@70000868 {
52                 pinctrl-names = "default";
53                 pinctrl-0 = <&state_default>;
54
55                 state_default: pinmux {
56                         clk1_out_pw4 {
57                                 nvidia,pins = "clk1_out_pw4";
58                                 nvidia,function = "extperiph1";
59                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
60                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
61                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
62                         };
63                         dap1_din_pn1 {
64                                 nvidia,pins = "dap1_din_pn1";
65                                 nvidia,function = "i2s0";
66                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
67                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
68                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
69                         };
70                         dap1_dout_pn2 {
71                                 nvidia,pins = "dap1_dout_pn2",
72                                                 "dap1_fs_pn0",
73                                                 "dap1_sclk_pn3";
74                                 nvidia,function = "i2s0";
75                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
76                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
77                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
78                         };
79                         dap2_din_pa4 {
80                                 nvidia,pins = "dap2_din_pa4";
81                                 nvidia,function = "i2s1";
82                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
83                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
84                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
85                         };
86                         dap2_dout_pa5 {
87                                 nvidia,pins = "dap2_dout_pa5",
88                                                 "dap2_fs_pa2",
89                                                 "dap2_sclk_pa3";
90                                 nvidia,function = "i2s1";
91                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
92                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
93                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94                         };
95                         dap4_din_pp5 {
96                                 nvidia,pins = "dap4_din_pp5",
97                                                 "dap4_dout_pp6",
98                                                 "dap4_fs_pp4",
99                                                 "dap4_sclk_pp7";
100                                 nvidia,function = "i2s3";
101                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
103                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
104                         };
105                         dvfs_pwm_px0 {
106                                 nvidia,pins = "dvfs_pwm_px0",
107                                                 "dvfs_clk_px2";
108                                 nvidia,function = "cldvfs";
109                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
110                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
111                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
112                         };
113                         ulpi_clk_py0 {
114                                 nvidia,pins = "ulpi_clk_py0",
115                                                 "ulpi_data0_po1",
116                                                 "ulpi_data1_po2",
117                                                 "ulpi_data2_po3",
118                                                 "ulpi_data3_po4",
119                                                 "ulpi_data4_po5",
120                                                 "ulpi_data5_po6",
121                                                 "ulpi_data6_po7",
122                                                 "ulpi_data7_po0";
123                                 nvidia,function = "ulpi";
124                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
125                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
126                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
127                         };
128                         ulpi_dir_py1 {
129                                 nvidia,pins = "ulpi_dir_py1",
130                                                 "ulpi_nxt_py2";
131                                 nvidia,function = "ulpi";
132                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
133                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
134                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
135                         };
136                         ulpi_stp_py3 {
137                                 nvidia,pins = "ulpi_stp_py3";
138                                 nvidia,function = "ulpi";
139                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
140                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
141                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
142                         };
143                         cam_i2c_scl_pbb1 {
144                                 nvidia,pins = "cam_i2c_scl_pbb1",
145                                                 "cam_i2c_sda_pbb2";
146                                 nvidia,function = "i2c3";
147                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
148                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
149                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
150                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
151                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
152                         };
153                         cam_mclk_pcc0 {
154                                 nvidia,pins = "cam_mclk_pcc0",
155                                                 "pbb0";
156                                 nvidia,function = "vi_alt3";
157                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
158                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
159                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
160                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
161                         };
162                         pbb4 {
163                                 nvidia,pins = "pbb4";
164                                 nvidia,function = "vgp4";
165                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
166                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
167                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
168                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
169                         };
170                         gen2_i2c_scl_pt5 {
171                                 nvidia,pins = "gen2_i2c_scl_pt5",
172                                                 "gen2_i2c_sda_pt6";
173                                 nvidia,function = "i2c2";
174                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
175                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
176                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
177                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
178                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
179                         };
180                         gmi_a16_pj7 {
181                                 nvidia,pins = "gmi_a16_pj7",
182                                                 "gmi_a19_pk7";
183                                 nvidia,function = "uartd";
184                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
185                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
186                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
187                         };
188                         gmi_a17_pb0 {
189                                 nvidia,pins = "gmi_a17_pb0",
190                                                 "gmi_a18_pb1";
191                                 nvidia,function = "uartd";
192                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
193                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
194                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
195                         };
196                         gmi_ad5_pg5 {
197                                 nvidia,pins = "gmi_ad5_pg5",
198                                                 "gmi_wr_n_pi0";
199                                 nvidia,function = "spi4";
200                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
201                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
202                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
203                         };
204                         gmi_ad6_pg6 {
205                                 nvidia,pins = "gmi_ad6_pg6",
206                                                 "gmi_ad7_pg7";
207                                 nvidia,function = "spi4";
208                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
209                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
210                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
211                         };
212                         gmi_ad12_ph4 {
213                                 nvidia,pins = "gmi_ad12_ph4";
214                                 nvidia,function = "rsvd4";
215                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
217                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
218                         };
219                         gmi_cs6_n_pi13 {
220                                 nvidia,pins = "gmi_cs6_n_pi3";
221                                 nvidia,function = "nand";
222                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
223                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
224                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
225                         };
226                         gmi_ad9_ph1 {
227                                 nvidia,pins = "gmi_ad9_ph1";
228                                 nvidia,function = "pwm1";
229                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
230                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
231                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
232                         };
233                         gmi_cs1_n_pj2 {
234                                 nvidia,pins = "gmi_cs1_n_pj2",
235                                                 "gmi_oe_n_pi1";
236                                 nvidia,function = "soc";
237                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
238                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
239                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
240                         };
241                         gmi_rst_n_pi4 {
242                                 nvidia,pins = "gmi_rst_n_pi4";
243                                 nvidia,function = "gmi";
244                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
245                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
246                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
247                         };
248                         gmi_iordy_pi5 {
249                                 nvidia,pins = "gmi_iordy_pi5";
250                                 nvidia,function = "gmi";
251                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
252                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
253                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
254                         };
255                         clk2_out_pw5 {
256                                 nvidia,pins = "clk2_out_pw5";
257                                 nvidia,function = "extperiph2";
258                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
259                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
260                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
261                         };
262                         sdmmc1_clk_pz0 {
263                                 nvidia,pins = "sdmmc1_clk_pz0";
264                                 nvidia,function = "sdmmc1";
265                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
266                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
267                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
268                         };
269                         sdmmc1_cmd_pz1 {
270                                 nvidia,pins = "sdmmc1_cmd_pz1",
271                                                 "sdmmc1_dat0_py7",
272                                                 "sdmmc1_dat1_py6",
273                                                 "sdmmc1_dat2_py5",
274                                                 "sdmmc1_dat3_py4";
275                                 nvidia,function = "sdmmc1";
276                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
277                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
278                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
279                         };
280                         sdmmc3_clk_pa6 {
281                                 nvidia,pins = "sdmmc3_clk_pa6";
282                                 nvidia,function = "sdmmc3";
283                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
284                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
285                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
286                         };
287                         sdmmc3_cmd_pa7 {
288                                 nvidia,pins = "sdmmc3_cmd_pa7",
289                                                 "sdmmc3_dat0_pb7",
290                                                 "sdmmc3_dat1_pb6",
291                                                 "sdmmc3_dat2_pb5",
292                                                 "sdmmc3_dat3_pb4",
293                                                 "sdmmc3_cd_n_pv2",
294                                                 "sdmmc3_clk_lb_out_pee4",
295                                                 "sdmmc3_clk_lb_in_pee5";
296                                 nvidia,function = "sdmmc3";
297                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
298                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
299                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
300                         };
301                         kb_col4_pq4 {
302                                 nvidia,pins = "kb_col4_pq4";
303                                 nvidia,function = "sdmmc3";
304                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
305                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
306                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
307                         };
308                         sdmmc4_clk_pcc4 {
309                                 nvidia,pins = "sdmmc4_clk_pcc4";
310                                 nvidia,function = "sdmmc4";
311                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
312                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
313                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
314                         };
315                         sdmmc4_cmd_pt7 {
316                                 nvidia,pins = "sdmmc4_cmd_pt7",
317                                                 "sdmmc4_dat0_paa0",
318                                                 "sdmmc4_dat1_paa1",
319                                                 "sdmmc4_dat2_paa2",
320                                                 "sdmmc4_dat3_paa3",
321                                                 "sdmmc4_dat4_paa4",
322                                                 "sdmmc4_dat5_paa5",
323                                                 "sdmmc4_dat6_paa6",
324                                                 "sdmmc4_dat7_paa7";
325                                 nvidia,function = "sdmmc4";
326                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
327                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
328                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
329                         };
330                         clk_32k_out_pa0 {
331                                 nvidia,pins = "clk_32k_out_pa0";
332                                 nvidia,function = "blink";
333                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
334                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
335                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
336                         };
337                         kb_col0_pq0 {
338                                 nvidia,pins = "kb_col0_pq0",
339                                                 "kb_col1_pq1",
340                                                 "kb_col2_pq2",
341                                                 "kb_row0_pr0",
342                                                 "kb_row1_pr1",
343                                                 "kb_row2_pr2",
344                                                 "kb_row8_ps0";
345                                 nvidia,function = "kbc";
346                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
347                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
348                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
349                         };
350                         kb_row7_pr7 {
351                                 nvidia,pins = "kb_row7_pr7";
352                                 nvidia,function = "rsvd2";
353                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
354                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
355                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
356                         };
357                         kb_row10_ps2 {
358                                 nvidia,pins = "kb_row10_ps2";
359                                 nvidia,function = "uarta";
360                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
361                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
362                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
363                         };
364                         kb_row9_ps1 {
365                                 nvidia,pins = "kb_row9_ps1";
366                                 nvidia,function = "uarta";
367                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
368                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
369                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
370                         };
371                         pwr_i2c_scl_pz6 {
372                                 nvidia,pins = "pwr_i2c_scl_pz6",
373                                                 "pwr_i2c_sda_pz7";
374                                 nvidia,function = "i2cpwr";
375                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
376                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
377                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
378                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
379                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
380                         };
381                         sys_clk_req_pz5 {
382                                 nvidia,pins = "sys_clk_req_pz5";
383                                 nvidia,function = "sysclk";
384                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
385                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
386                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
387                         };
388                         core_pwr_req {
389                                 nvidia,pins = "core_pwr_req";
390                                 nvidia,function = "pwron";
391                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
392                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
393                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
394                         };
395                         cpu_pwr_req {
396                                 nvidia,pins = "cpu_pwr_req";
397                                 nvidia,function = "cpu";
398                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
399                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
400                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
401                         };
402                         pwr_int_n {
403                                 nvidia,pins = "pwr_int_n";
404                                 nvidia,function = "pmi";
405                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
406                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
407                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
408                         };
409                         reset_out_n {
410                                 nvidia,pins = "reset_out_n";
411                                 nvidia,function = "reset_out_n";
412                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
413                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
414                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
415                         };
416                         clk3_out_pee0 {
417                                 nvidia,pins = "clk3_out_pee0";
418                                 nvidia,function = "extperiph3";
419                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
420                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
421                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
422                         };
423                         gen1_i2c_scl_pc4 {
424                                 nvidia,pins = "gen1_i2c_scl_pc4",
425                                                 "gen1_i2c_sda_pc5";
426                                 nvidia,function = "i2c1";
427                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
428                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
429                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
430                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
431                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
432                         };
433                         uart2_cts_n_pj5 {
434                                 nvidia,pins = "uart2_cts_n_pj5";
435                                 nvidia,function = "uartb";
436                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
437                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
438                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
439                         };
440                         uart2_rts_n_pj6 {
441                                 nvidia,pins = "uart2_rts_n_pj6";
442                                 nvidia,function = "uartb";
443                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
444                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
445                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
446                         };
447                         uart2_rxd_pc3 {
448                                 nvidia,pins = "uart2_rxd_pc3";
449                                 nvidia,function = "irda";
450                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
451                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
452                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
453                         };
454                         uart2_txd_pc2 {
455                                 nvidia,pins = "uart2_txd_pc2";
456                                 nvidia,function = "irda";
457                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
458                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
459                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
460                         };
461                         uart3_cts_n_pa1 {
462                                 nvidia,pins = "uart3_cts_n_pa1",
463                                                 "uart3_rxd_pw7";
464                                 nvidia,function = "uartc";
465                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
466                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
467                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
468                         };
469                         uart3_rts_n_pc0 {
470                                 nvidia,pins = "uart3_rts_n_pc0",
471                                                 "uart3_txd_pw6";
472                                 nvidia,function = "uartc";
473                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
474                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
475                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
476                         };
477                         owr {
478                                 nvidia,pins = "owr";
479                                 nvidia,function = "owr";
480                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
481                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
482                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
483                         };
484                         hdmi_cec_pee3 {
485                                 nvidia,pins = "hdmi_cec_pee3";
486                                 nvidia,function = "cec";
487                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
488                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
489                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
490                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
491                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
492                         };
493                         ddc_scl_pv4 {
494                                 nvidia,pins = "ddc_scl_pv4",
495                                                 "ddc_sda_pv5";
496                                 nvidia,function = "i2c4";
497                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
498                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
499                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
500                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
501                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
502                         };
503                         spdif_in_pk6 {
504                                 nvidia,pins = "spdif_in_pk6";
505                                 nvidia,function = "usb";
506                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
507                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
508                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
509                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
510                         };
511                         usb_vbus_en0_pn4 {
512                                 nvidia,pins = "usb_vbus_en0_pn4";
513                                 nvidia,function = "usb";
514                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
515                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
516                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
517                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
518                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
519                         };
520                         gpio_x6_aud_px6 {
521                                 nvidia,pins = "gpio_x6_aud_px6";
522                                 nvidia,function = "spi6";
523                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
524                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
525                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
526                         };
527                         gpio_x1_aud_px1 {
528                                 nvidia,pins = "gpio_x1_aud_px1";
529                                 nvidia,function = "rsvd2";
530                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
531                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
532                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
533                         };
534                         gpio_x7_aud_px7 {
535                                 nvidia,pins = "gpio_x7_aud_px7";
536                                 nvidia,function = "rsvd1";
537                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
538                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
539                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
540                         };
541                         gmi_adv_n_pk0 {
542                                 nvidia,pins = "gmi_adv_n_pk0";
543                                 nvidia,function = "gmi";
544                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
545                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
546                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
547                         };
548                         gmi_cs0_n_pj0 {
549                                 nvidia,pins = "gmi_cs0_n_pj0";
550                                 nvidia,function = "gmi";
551                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
552                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
553                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
554                         };
555                         pu3 {
556                                 nvidia,pins = "pu3";
557                                 nvidia,function = "pwm0";
558                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
559                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
560                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
561                         };
562                         gpio_x4_aud_px4 {
563                                 nvidia,pins = "gpio_x4_aud_px4",
564                                                 "gpio_x5_aud_px5";
565                                 nvidia,function = "rsvd1";
566                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
567                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
568                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
569                         };
570                         gpio_x3_aud_px3 {
571                                 nvidia,pins = "gpio_x3_aud_px3";
572                                 nvidia,function = "rsvd4";
573                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
574                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
575                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
576                         };
577                         gpio_w2_aud_pw2 {
578                                 nvidia,pins = "gpio_w2_aud_pw2";
579                                 nvidia,function = "rsvd2";
580                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
581                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
582                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
583                         };
584                         gpio_w3_aud_pw3 {
585                                 nvidia,pins = "gpio_w3_aud_pw3";
586                                 nvidia,function = "spi6";
587                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
588                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
589                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
590                         };
591                         dap3_fs_pp0 {
592                                 nvidia,pins = "dap3_fs_pp0",
593                                                 "dap3_din_pp1",
594                                                 "dap3_dout_pp2",
595                                                 "dap3_sclk_pp3";
596                                 nvidia,function = "i2s2";
597                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
598                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
599                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
600                         };
601                         pv0 {
602                                 nvidia,pins = "pv0";
603                                 nvidia,function = "rsvd4";
604                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
605                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
606                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
607                         };
608                         pv1 {
609                                 nvidia,pins = "pv1";
610                                 nvidia,function = "rsvd1";
611                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
612                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
613                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
614                         };
615                         pbb3 {
616                                 nvidia,pins = "pbb3",
617                                                 "pbb5",
618                                                 "pbb6",
619                                                 "pbb7";
620                                 nvidia,function = "rsvd4";
621                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
622                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
623                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
624                         };
625                         pcc1 {
626                                 nvidia,pins = "pcc1",
627                                                 "pcc2";
628                                 nvidia,function = "rsvd4";
629                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
630                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
631                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
632                         };
633                         gmi_ad0_pg0 {
634                                 nvidia,pins = "gmi_ad0_pg0",
635                                                 "gmi_ad1_pg1";
636                                 nvidia,function = "gmi";
637                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
638                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
639                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
640                         };
641                         gmi_ad10_ph2 {
642                                 nvidia,pins = "gmi_ad10_ph2",
643                                                 "gmi_ad12_ph4",
644                                                 "gmi_ad15_ph7",
645                                                 "gmi_cs3_n_pk4";
646                                 nvidia,function = "gmi";
647                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
648                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
649                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
650                         };
651                         gmi_ad11_ph3 {
652                                 nvidia,pins = "gmi_ad11_ph3",
653                                                 "gmi_ad13_ph5",
654                                                 "gmi_ad8_ph0",
655                                                 "gmi_clk_pk1",
656                                                 "gmi_cs2_n_pk3";
657                                 nvidia,function = "gmi";
658                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
659                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
660                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
661                         };
662                         gmi_ad14_ph6 {
663                                 nvidia,pins = "gmi_ad14_ph6",
664                                                 "gmi_cs0_n_pj0",
665                                                 "gmi_cs4_n_pk2",
666                                                 "gmi_cs7_n_pi6",
667                                                 "gmi_dqs_p_pj3",
668                                                 "gmi_wp_n_pc7";
669                                 nvidia,function = "gmi";
670                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
671                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
672                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
673                         };
674                         gmi_ad2_pg2 {
675                                 nvidia,pins = "gmi_ad2_pg2",
676                                                 "gmi_ad3_pg3";
677                                 nvidia,function = "gmi";
678                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
679                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
680                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
681                         };
682                         sdmmc1_wp_n_pv3 {
683                                 nvidia,pins = "sdmmc1_wp_n_pv3";
684                                 nvidia,function = "spi4";
685                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
686                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
687                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
688                         };
689                         clk2_req_pcc5 {
690                                 nvidia,pins = "clk2_req_pcc5";
691                                 nvidia,function = "rsvd4";
692                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
693                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
694                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
695                         };
696                         kb_col3_pq3 {
697                                 nvidia,pins = "kb_col3_pq3";
698                                 nvidia,function = "pwm2";
699                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
700                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
701                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
702                         };
703                         kb_col5_pq5 {
704                                 nvidia,pins = "kb_col5_pq5";
705                                 nvidia,function = "kbc";
706                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
707                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
708                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
709                         };
710                         kb_col6_pq6 {
711                                 nvidia,pins = "kb_col6_pq6",
712                                                 "kb_col7_pq7";
713                                 nvidia,function = "kbc";
714                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
715                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
716                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
717                         };
718                         kb_row3_pr3 {
719                                 nvidia,pins = "kb_row3_pr3",
720                                                 "kb_row4_pr4",
721                                                 "kb_row6_pr6";
722                                 nvidia,function = "kbc";
723                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
724                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
725                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
726                         };
727                         clk3_req_pee1 {
728                                 nvidia,pins = "clk3_req_pee1";
729                                 nvidia,function = "rsvd4";
730                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
731                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
732                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
733                         };
734                         pu2 {
735                                 nvidia,pins = "pu2";
736                                 nvidia,function = "rsvd1";
737                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
738                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
739                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
740                         };
741                         hdmi_int_pn7 {
742                                 nvidia,pins = "hdmi_int_pn7";
743                                 nvidia,function = "rsvd1";
744                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
745                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
746                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
747                         };
748
749                         drive_sdio1 {
750                                 nvidia,pins = "drive_sdio1";
751                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
752                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
753                                 nvidia,pull-down-strength = <36>;
754                                 nvidia,pull-up-strength = <20>;
755                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
756                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
757                         };
758                         drive_sdio3 {
759                                 nvidia,pins = "drive_sdio3";
760                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
761                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
762                                 nvidia,pull-down-strength = <36>;
763                                 nvidia,pull-up-strength = <20>;
764                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
765                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
766                         };
767                         drive_gma {
768                                 nvidia,pins = "drive_gma";
769                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
770                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
771                                 nvidia,pull-down-strength = <2>;
772                                 nvidia,pull-up-strength = <2>;
773                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
774                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
775                         };
776                 };
777         };
778
779         /* Usable on reworked devices only */
780         serial@70006300 {
781                 status = "okay";
782         };
783
784         pwm@7000a000 {
785                 status = "okay";
786         };
787
788         i2c@7000d000 {
789                 status = "okay";
790                 clock-frequency = <400000>;
791
792                 regulator@43 {
793                         compatible = "ti,tps51632";
794                         reg = <0x43>;
795                         regulator-name = "vdd-cpu";
796                         regulator-min-microvolt = <500000>;
797                         regulator-max-microvolt = <1520000>;
798                         regulator-always-on;
799                         regulator-boot-on;
800                 };
801
802                 palmas: pmic@58 {
803                         compatible = "ti,palmas";
804                         reg = <0x58>;
805                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
806
807                         #interrupt-cells = <2>;
808                         interrupt-controller;
809
810                         ti,system-power-controller;
811
812                         palmas_gpio: gpio {
813                                 compatible = "ti,palmas-gpio";
814                                 gpio-controller;
815                                 #gpio-cells = <2>;
816                         };
817
818                         pmic {
819                                 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
820
821                                 regulators {
822                                         smps12 {
823                                                 regulator-name = "vdd-ddr";
824                                                 regulator-min-microvolt = <1200000>;
825                                                 regulator-max-microvolt = <1500000>;
826                                                 regulator-always-on;
827                                                 regulator-boot-on;
828                                         };
829
830                                         vdd_1v8: smps3 {
831                                                 regulator-name = "vdd-1v8";
832                                                 regulator-min-microvolt = <1800000>;
833                                                 regulator-max-microvolt = <1800000>;
834                                                 regulator-boot-on;
835                                         };
836
837                                         smps457 {
838                                                 regulator-name = "vdd-soc";
839                                                 regulator-min-microvolt = <900000>;
840                                                 regulator-max-microvolt = <1400000>;
841                                                 regulator-always-on;
842                                                 regulator-boot-on;
843                                         };
844
845                                         smps8 {
846                                                 regulator-name = "avdd-pll-1v05";
847                                                 regulator-min-microvolt = <1050000>;
848                                                 regulator-max-microvolt = <1050000>;
849                                                 regulator-always-on;
850                                                 regulator-boot-on;
851                                         };
852
853                                         smps9 {
854                                                 regulator-name = "vdd-2v85-emmc";
855                                                 regulator-min-microvolt = <2800000>;
856                                                 regulator-max-microvolt = <2800000>;
857                                                 regulator-always-on;
858                                         };
859
860                                         smps10_out1 {
861                                                 regulator-name = "vdd-fan";
862                                                 regulator-min-microvolt = <5000000>;
863                                                 regulator-max-microvolt = <5000000>;
864                                                 regulator-always-on;
865                                                 regulator-boot-on;
866                                         };
867
868                                         smps10_out2 {
869                                                 regulator-name = "vdd-5v0-sys";
870                                                 regulator-min-microvolt = <5000000>;
871                                                 regulator-max-microvolt = <5000000>;
872                                                 regulator-always-on;
873                                                 regulator-boot-on;
874                                         };
875
876                                         ldo2 {
877                                                 regulator-name = "vdd-2v8-display";
878                                                 regulator-min-microvolt = <2800000>;
879                                                 regulator-max-microvolt = <2800000>;
880                                                 regulator-always-on;
881                                                 regulator-boot-on;
882                                         };
883
884                                         vdd_1v2_ap: ldo3 {
885                                                 regulator-name = "avdd-1v2";
886                                                 regulator-min-microvolt = <1200000>;
887                                                 regulator-max-microvolt = <1200000>;
888                                                 regulator-always-on;
889                                                 regulator-boot-on;
890                                         };
891
892                                         ldo4 {
893                                                 regulator-name = "vpp-fuse";
894                                                 regulator-min-microvolt = <1800000>;
895                                                 regulator-max-microvolt = <1800000>;
896                                         };
897
898                                         ldo5 {
899                                                 regulator-name = "avdd-hdmi-pll";
900                                                 regulator-min-microvolt = <1200000>;
901                                                 regulator-max-microvolt = <1200000>;
902                                         };
903
904                                         ldo6 {
905                                                 regulator-name = "vdd-sensor-2v8";
906                                                 regulator-min-microvolt = <2850000>;
907                                                 regulator-max-microvolt = <2850000>;
908                                         };
909
910                                         ldo8 {
911                                                 regulator-name = "vdd-rtc";
912                                                 regulator-min-microvolt = <1100000>;
913                                                 regulator-max-microvolt = <1100000>;
914                                                 regulator-always-on;
915                                                 regulator-boot-on;
916                                                 ti,enable-ldo8-tracking;
917                                         };
918
919                                         vddio_sdmmc3: ldo9 {
920                                                 regulator-name = "vddio-sdmmc3";
921                                                 regulator-min-microvolt = <1800000>;
922                                                 regulator-max-microvolt = <3300000>;
923                                         };
924
925                                         ldousb {
926                                                 regulator-name = "avdd-usb-hdmi";
927                                                 regulator-min-microvolt = <3300000>;
928                                                 regulator-max-microvolt = <3300000>;
929                                                 regulator-always-on;
930                                                 regulator-boot-on;
931                                         };
932
933                                         vdd_3v3_sys: regen1 {
934                                                 regulator-name = "rail-3v3";
935                                                 regulator-max-microvolt = <3300000>;
936                                                 regulator-always-on;
937                                                 regulator-boot-on;
938                                         };
939
940                                         regen2 {
941                                                 regulator-name = "rail-5v0";
942                                                 regulator-max-microvolt = <5000000>;
943                                                 regulator-always-on;
944                                                 regulator-boot-on;
945                                         };
946
947                                 };
948                         };
949
950                         rtc {
951                                 compatible = "ti,palmas-rtc";
952                                 interrupt-parent = <&palmas>;
953                                 interrupts = <8 0>;
954                         };
955
956                 };
957         };
958
959         pmc@7000e400 {
960                 nvidia,invert-interrupt;
961         };
962
963         /* SD card */
964         sdhci@78000400 {
965                 status = "okay";
966                 bus-width = <4>;
967                 vqmmc-supply = <&vddio_sdmmc3>;
968                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
969                 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
970         };
971
972         /* eMMC */
973         sdhci@78000600 {
974                 status = "okay";
975                 bus-width = <8>;
976                 non-removable;
977         };
978
979         /* External USB port (must be powered) */
980         usb@7d000000 {
981                 status = "okay";
982         };
983
984         usb-phy@7d000000 {
985                 status = "okay";
986                 nvidia,xcvr-setup = <7>;
987                 nvidia,xcvr-lsfslew = <2>;
988                 nvidia,xcvr-lsrslew = <2>;
989                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
990                 /* Should be changed to "otg" once we have vbus_supply */
991                 /* As of now, USB devices need to be powered externally */
992                 dr_mode = "host";
993         };
994
995         /* SHIELD controller */
996         usb@7d008000 {
997                 status = "okay";
998         };
999
1000         usb-phy@7d008000 {
1001                 status = "okay";
1002                 nvidia,xcvr-setup = <7>;
1003                 nvidia,xcvr-lsfslew = <2>;
1004                 nvidia,xcvr-lsrslew = <2>;
1005         };
1006
1007         backlight: backlight {
1008                 compatible = "pwm-backlight";
1009                 pwms = <&pwm 1 40000>;
1010
1011                 brightness-levels = <0 4 8 16 32 64 128 255>;
1012                 default-brightness-level = <6>;
1013
1014                 power-supply = <&lcd_bl_en>;
1015                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1016         };
1017
1018         clocks {
1019                 compatible = "simple-bus";
1020                 #address-cells = <1>;
1021                 #size-cells = <0>;
1022
1023                 clk32k_in: clock {
1024                         compatible = "fixed-clock";
1025                         reg=<0>;
1026                         #clock-cells = <0>;
1027                         clock-frequency = <32768>;
1028                 };
1029         };
1030
1031         gpio-keys {
1032                 compatible = "gpio-keys";
1033
1034                 back {
1035                         label = "Back";
1036                         gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1037                         linux,code = <KEY_BACK>;
1038                 };
1039
1040                 home {
1041                         label = "Home";
1042                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1043                         linux,code = <KEY_HOME>;
1044                 };
1045
1046                 power {
1047                         label = "Power";
1048                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1049                         linux,code = <KEY_POWER>;
1050                         gpio-key,wakeup;
1051                 };
1052         };
1053
1054         regulators {
1055                 compatible = "simple-bus";
1056                 #address-cells = <1>;
1057                 #size-cells = <0>;
1058
1059                 lcd_bl_en: regulator@0 {
1060                         compatible = "regulator-fixed";
1061                         reg = <0>;
1062                         regulator-name = "lcd_bl_en";
1063                         regulator-min-microvolt = <5000000>;
1064                         regulator-max-microvolt = <5000000>;
1065                         regulator-boot-on;
1066                 };
1067
1068                 vdd_lcd: regulator@1 {
1069                         compatible = "regulator-fixed";
1070                         reg = <1>;
1071                         regulator-name = "vdd_lcd_1v8";
1072                         regulator-min-microvolt = <1800000>;
1073                         regulator-max-microvolt = <1800000>;
1074                         vin-supply = <&vdd_1v8>;
1075                         enable-active-high;
1076                         gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
1077                         regulator-boot-on;
1078                 };
1079
1080                 regulator@2 {
1081                         compatible = "regulator-fixed";
1082                         reg = <2>;
1083                         regulator-name = "vdd_1v8_ts";
1084                         regulator-min-microvolt = <1800000>;
1085                         regulator-max-microvolt = <1800000>;
1086                         gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>;
1087                         regulator-boot-on;
1088                 };
1089
1090                 regulator@3 {
1091                         compatible = "regulator-fixed";
1092                         reg = <3>;
1093                         regulator-name = "vdd_3v3_ts";
1094                         regulator-min-microvolt = <3300000>;
1095                         regulator-max-microvolt = <3300000>;
1096                         enable-active-high;
1097                         gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1098                         regulator-boot-on;
1099                 };
1100
1101                 regulator@4 {
1102                         compatible = "regulator-fixed";
1103                         reg = <4>;
1104                         regulator-name = "vdd_1v8_com";
1105                         regulator-min-microvolt = <1800000>;
1106                         regulator-max-microvolt = <1800000>;
1107                         vin-supply = <&vdd_1v8>;
1108                         enable-active-high;
1109                         gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
1110                         regulator-boot-on;
1111                 };
1112
1113                 regulator@5 {
1114                         compatible = "regulator-fixed";
1115                         reg = <5>;
1116                         regulator-name = "vdd_3v3_com";
1117                         regulator-min-microvolt = <3300000>;
1118                         regulator-max-microvolt = <3300000>;
1119                         vin-supply = <&vdd_3v3_sys>;
1120                         enable-active-high;
1121                         gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
1122                         regulator-always-on;
1123                         regulator-boot-on;
1124                 };
1125         };
1126 };