2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
5 #include <dt-bindings/gpio/gpio.h>
6 #include "skeleton.dtsi"
13 reg = <0x00000000 0x04000000>,
14 <0x08000000 0x04000000>;
18 compatible = "arm,l210-cache";
19 reg = <0x10210000 0x1000>;
20 interrupt-parent = <&vica>;
24 cache-size = <131072>;
26 cache-line-size = <32>;
27 /* At full speed latency must be >=2 */
28 arm,tag-latency = <2>;
29 arm,data-latency = <2 2>;
30 arm,dirty-latency = <2>;
34 /* Nomadik system timer */
35 compatible = "st,nomadik-mtu";
36 reg = <0x101e2000 0x1000>;
37 interrupt-parent = <&vica>;
39 clocks = <&timclk>, <&pclk>;
40 clock-names = "timclk", "apb_pclk";
45 reg = <0x101e3000 0x1000>;
46 interrupt-parent = <&vica>;
48 clocks = <&timclk>, <&pclk>;
49 clock-names = "timclk", "apb_pclk";
52 gpio0: gpio@101e4000 {
53 compatible = "st,nomadik-gpio";
54 reg = <0x101e4000 0x80>;
55 interrupt-parent = <&vica>;
58 #interrupt-cells = <2>;
65 gpio1: gpio@101e5000 {
66 compatible = "st,nomadik-gpio";
67 reg = <0x101e5000 0x80>;
68 interrupt-parent = <&vica>;
71 #interrupt-cells = <2>;
78 gpio2: gpio@101e6000 {
79 compatible = "st,nomadik-gpio";
80 reg = <0x101e6000 0x80>;
81 interrupt-parent = <&vica>;
84 #interrupt-cells = <2>;
91 gpio3: gpio@101e7000 {
92 compatible = "st,nomadik-gpio";
93 reg = <0x101e7000 0x80>;
94 interrupt-parent = <&vica>;
97 #interrupt-cells = <2>;
105 compatible = "stericsson,stn8815-pinctrl";
106 /* Pin configurations */
108 uart1_default_mux: uart1_mux {
116 mmcsd_default_mux: mmcsd_mux {
119 groups = "mmcsd_a_1", "mmcsd_b_1";
122 mmcsd_default_mode: mmcsd_default {
129 /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */
130 pins = "GPIO10_C11", "GPIO15_A12",
131 "GPIO16_C13", "GPIO23_D15";
135 /* MCCMD, MCDAT3-0, MCMSFBCLK */
136 pins = "GPIO9_A10", "GPIO11_B11",
137 "GPIO12_A11", "GPIO13_C12",
138 "GPIO14_B12", "GPIO24_C15";
144 i2c0_default_mux: i2c0_mux {
150 i2c0_default_mode: i2c0_default {
152 pins = "GPIO62_D3", "GPIO63_D2";
158 i2c1_default_mux: i2c1_mux {
164 i2c1_default_mode: i2c1_default {
166 pins = "GPIO53_L4", "GPIO54_L3";
174 compatible = "stericsson,nomadik-src";
175 reg = <0x101e0000 0x1000>;
178 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
179 * that is parent of TIMCLK, PLL1 and PLL2
183 compatible = "fixed-clock";
184 clock-frequency = <19200000>;
188 * The 2.4 MHz TIMCLK reference clock is active at
189 * boot time, this is actually the MXTALCLK @19.2 MHz
190 * divided by 8. This clock is used by the timers and
191 * watchdog. See page 105 ff.
193 timclk: timclk@2.4M {
195 compatible = "fixed-factor-clock";
201 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
204 compatible = "st,nomadik-pll-clock";
209 /* HCLK divides the PLL1 with 1,2,3 or 4 */
212 compatible = "st,nomadik-hclk-clock";
215 /* The PCLK domain uses HCLK right off */
218 compatible = "fixed-factor-clock";
224 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
227 compatible = "st,nomadik-pll-clock";
231 clk216: clk216@216M {
233 compatible = "fixed-factor-clock";
238 clk108: clk108@108M {
240 compatible = "fixed-factor-clock";
247 compatible = "fixed-factor-clock";
248 /* The data sheet does not say how this is derived */
255 compatible = "fixed-factor-clock";
256 /* The data sheet does not say how this is derived */
263 compatible = "fixed-factor-clock";
269 /* This apparently exists as well */
270 ulpiclk: ulpiclk@60M {
272 compatible = "fixed-clock";
273 clock-frequency = <60000000>;
277 * IP AMBA bus clocks, driving the bus side of the
278 * peripheral clocking, clock gates.
281 hclkdma0: hclkdma0@48M {
283 compatible = "st,nomadik-src-clock";
287 hclksmc: hclksmc@48M {
289 compatible = "st,nomadik-src-clock";
293 hclksdram: hclksdram@48M {
295 compatible = "st,nomadik-src-clock";
299 hclkdma1: hclkdma1@48M {
301 compatible = "st,nomadik-src-clock";
305 hclkclcd: hclkclcd@48M {
307 compatible = "st,nomadik-src-clock";
311 pclkirda: pclkirda@48M {
313 compatible = "st,nomadik-src-clock";
317 pclkssp: pclkssp@48M {
319 compatible = "st,nomadik-src-clock";
323 pclkuart0: pclkuart0@48M {
325 compatible = "st,nomadik-src-clock";
329 pclksdi: pclksdi@48M {
331 compatible = "st,nomadik-src-clock";
335 pclki2c0: pclki2c0@48M {
337 compatible = "st,nomadik-src-clock";
341 pclki2c1: pclki2c1@48M {
343 compatible = "st,nomadik-src-clock";
347 pclkuart1: pclkuart1@48M {
349 compatible = "st,nomadik-src-clock";
353 pclkmsp0: pclkmsp0@48M {
355 compatible = "st,nomadik-src-clock";
359 hclkusb: hclkusb@48M {
361 compatible = "st,nomadik-src-clock";
365 hclkdif: hclkdif@48M {
367 compatible = "st,nomadik-src-clock";
371 hclksaa: hclksaa@48M {
373 compatible = "st,nomadik-src-clock";
377 hclksva: hclksva@48M {
379 compatible = "st,nomadik-src-clock";
383 pclkhsi: pclkhsi@48M {
385 compatible = "st,nomadik-src-clock";
389 pclkxti: pclkxti@48M {
391 compatible = "st,nomadik-src-clock";
395 pclkuart2: pclkuart2@48M {
397 compatible = "st,nomadik-src-clock";
401 pclkmsp1: pclkmsp1@48M {
403 compatible = "st,nomadik-src-clock";
407 pclkmsp2: pclkmsp2@48M {
409 compatible = "st,nomadik-src-clock";
413 pclkowm: pclkowm@48M {
415 compatible = "st,nomadik-src-clock";
419 hclkhpi: hclkhpi@48M {
421 compatible = "st,nomadik-src-clock";
425 pclkske: pclkske@48M {
427 compatible = "st,nomadik-src-clock";
431 pclkhsem: pclkhsem@48M {
433 compatible = "st,nomadik-src-clock";
439 compatible = "st,nomadik-src-clock";
443 hclkhash: hclkhash@48M {
445 compatible = "st,nomadik-src-clock";
449 hclkcryp: hclkcryp@48M {
451 compatible = "st,nomadik-src-clock";
455 pclkmshc: pclkmshc@48M {
457 compatible = "st,nomadik-src-clock";
461 hclkusbm: hclkusbm@48M {
463 compatible = "st,nomadik-src-clock";
467 hclkrng: hclkrng@48M {
469 compatible = "st,nomadik-src-clock";
474 /* IP kernel clocks */
477 compatible = "st,nomadik-src-clock";
479 clocks = <&clk72 &clk48>;
481 irdaclk: irdaclk@48M {
483 compatible = "st,nomadik-src-clock";
487 sspiclk: sspiclk@48M {
489 compatible = "st,nomadik-src-clock";
493 uart0clk: uart0clk@48M {
495 compatible = "st,nomadik-src-clock";
500 /* Also called MCCLK in some documents */
502 compatible = "st,nomadik-src-clock";
506 i2c0clk: i2c0clk@48M {
508 compatible = "st,nomadik-src-clock";
512 i2c1clk: i2c1clk@48M {
514 compatible = "st,nomadik-src-clock";
518 uart1clk: uart1clk@48M {
520 compatible = "st,nomadik-src-clock";
524 mspclk0: mspclk0@48M {
526 compatible = "st,nomadik-src-clock";
532 compatible = "st,nomadik-src-clock";
534 clocks = <&clk48>; /* 48 MHz not ULPI */
538 compatible = "st,nomadik-src-clock";
542 ipi2cclk: ipi2cclk@48M {
544 compatible = "st,nomadik-src-clock";
546 clocks = <&clk48>; /* Guess */
548 ipbmcclk: ipbmcclk@48M {
550 compatible = "st,nomadik-src-clock";
552 clocks = <&clk48>; /* Guess */
554 hsiclkrx: hsiclkrx@216M {
556 compatible = "st,nomadik-src-clock";
560 hsiclktx: hsiclktx@108M {
562 compatible = "st,nomadik-src-clock";
566 uart2clk: uart2clk@48M {
568 compatible = "st,nomadik-src-clock";
572 mspclk1: mspclk1@48M {
574 compatible = "st,nomadik-src-clock";
578 mspclk2: mspclk2@48M {
580 compatible = "st,nomadik-src-clock";
586 compatible = "st,nomadik-src-clock";
588 clocks = <&clk48>; /* Guess */
592 compatible = "st,nomadik-src-clock";
594 clocks = <&clk48>; /* Guess */
598 compatible = "st,nomadik-src-clock";
600 clocks = <&clk48>; /* Guess */
602 pclkmsp3: pclkmsp3@48M {
604 compatible = "st,nomadik-src-clock";
608 mspclk3: mspclk3@48M {
610 compatible = "st,nomadik-src-clock";
614 mshcclk: mshcclk@48M {
616 compatible = "st,nomadik-src-clock";
618 clocks = <&clk48>; /* Guess */
620 usbmclk: usbmclk@48M {
622 compatible = "st,nomadik-src-clock";
624 /* Stated as "48 MHz not ULPI clock" */
627 rngcclk: rngcclk@48M {
629 compatible = "st,nomadik-src-clock";
631 clocks = <&clk48>; /* Guess */
635 /* A NAND flash of 128 MiB */
636 fsmc: flash@40000000 {
637 compatible = "stericsson,fsmc-nand";
638 #address-cells = <1>;
640 reg = <0x10100000 0x1000>, /* FSMC Register*/
641 <0x40000000 0x2000>, /* NAND Base DATA */
642 <0x41000000 0x2000>, /* NAND Base ADDR */
643 <0x40800000 0x2000>; /* NAND Base CMD */
644 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
647 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>;
650 label = "X-Loader(NAND)";
654 label = "MemInit(NAND)";
655 reg = <0x40000 0x40000>;
658 label = "BootLoader(NAND)";
659 reg = <0x80000 0x200000>;
662 label = "Kernel zImage(NAND)";
663 reg = <0x280000 0x300000>;
666 label = "Root Filesystem(NAND)";
667 reg = <0x580000 0x1600000>;
670 label = "User Filesystem(NAND)";
671 reg = <0x1b80000 0x6480000>;
675 /* I2C0 connected to the STw4811 power management chip */
677 compatible = "st,nomadik-i2c", "arm,primecell";
678 reg = <0x101f8000 0x1000>;
679 interrupt-parent = <&vica>;
681 clock-frequency = <100000>;
682 #address-cells = <1>;
684 clocks = <&i2c0clk>, <&pclki2c0>;
685 clock-names = "mclk", "apb_pclk";
686 pinctrl-names = "default";
687 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
690 compatible = "st,stw4811";
692 vmmc_regulator: vmmc {
693 compatible = "st,stw481x-vmmc";
694 regulator-name = "VMMC";
695 regulator-min-microvolt = <1800000>;
696 regulator-max-microvolt = <3300000>;
701 /* I2C1 connected to various sensors */
703 compatible = "st,nomadik-i2c", "arm,primecell";
704 reg = <0x101f7000 0x1000>;
705 interrupt-parent = <&vica>;
707 clock-frequency = <100000>;
708 #address-cells = <1>;
710 clocks = <&i2c1clk>, <&pclki2c1>;
711 clock-names = "mclk", "apb_pclk";
712 pinctrl-names = "default";
713 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
716 compatible = "st,camera";
720 compatible = "st,stw5095";
726 compatible = "arm,amba-bus";
727 #address-cells = <1>;
731 vica: intc@10140000 {
732 compatible = "arm,versatile-vic";
733 interrupt-controller;
734 #interrupt-cells = <1>;
735 reg = <0x10140000 0x20>;
738 vicb: intc@10140020 {
739 compatible = "arm,versatile-vic";
740 interrupt-controller;
741 #interrupt-cells = <1>;
742 reg = <0x10140020 0x20>;
745 uart0: uart@101fd000 {
746 compatible = "arm,pl011", "arm,primecell";
747 reg = <0x101fd000 0x1000>;
748 interrupt-parent = <&vica>;
750 clocks = <&uart0clk>, <&pclkuart0>;
751 clock-names = "uartclk", "apb_pclk";
755 uart1: uart@101fb000 {
756 compatible = "arm,pl011", "arm,primecell";
757 reg = <0x101fb000 0x1000>;
758 interrupt-parent = <&vica>;
760 clocks = <&uart1clk>, <&pclkuart1>;
761 clock-names = "uartclk", "apb_pclk";
762 pinctrl-names = "default";
763 pinctrl-0 = <&uart1_default_mux>;
766 uart2: uart@101f2000 {
767 compatible = "arm,pl011", "arm,primecell";
768 reg = <0x101f2000 0x1000>;
769 interrupt-parent = <&vica>;
771 clocks = <&uart2clk>, <&pclkuart2>;
772 clock-names = "uartclk", "apb_pclk";
777 compatible = "arm,primecell";
778 reg = <0x101b0000 0x1000>;
779 clocks = <&rngcclk>, <&hclkrng>;
780 clock-names = "rng", "apb_pclk";
784 compatible = "arm,pl031", "arm,primecell";
785 reg = <0x101e8000 0x1000>;
787 clock-names = "apb_pclk";
788 interrupt-parent = <&vica>;
792 mmcsd: sdi@101f6000 {
793 compatible = "arm,pl18x", "arm,primecell";
794 reg = <0x101f6000 0x1000>;
795 clocks = <&sdiclk>, <&pclksdi>;
796 clock-names = "mclk", "apb_pclk";
797 interrupt-parent = <&vica>;
799 max-frequency = <48000000>;
803 pinctrl-names = "default";
804 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
805 vmmc-supply = <&vmmc_regulator>;