arch/arm/boot/dts/ste-hrefv60plus.dtsi

   1 /*
   2  * Copyright 2012 ST-Ericsson AB
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "ste-dbx5x0.dtsi"
  13 #include "ste-href.dtsi"
  14
  15 / {
  16         model = "ST-Ericsson HREF (v60+) platform with Device Tree";
  17         compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
  18
  19         soc {
  20                 // External Micro SD slot
  21                 sdi0_per1@80126000 {
  22                         arm,primecell-periphid = <0x10480180>;
  23                         max-frequency = <100000000>;
  24                         bus-width = <4>;
  25                         mmc-cap-sd-highspeed;
  26                         mmc-cap-mmc-highspeed;
  27                         vmmc-supply = <&ab8500_ldo_aux3_reg>;
  28
  29                         cd-gpios  = <&gpio2 31 0x4>; // 95
  30
  31                         status = "okay";
  32                 };
  33
  34                 // WLAN SDIO channel
  35                 sdi1_per2@80118000 {
  36                         arm,primecell-periphid = <0x10480180>;
  37                         max-frequency = <100000000>;
  38                         bus-width = <4>;
  39
  40                         status = "okay";
  41                 };
  42
  43                 // PoP:ed eMMC
  44                 sdi2_per3@80005000 {
  45                         arm,primecell-periphid = <0x10480180>;
  46                         max-frequency = <100000000>;
  47                         bus-width = <8>;
  48                         mmc-cap-mmc-highspeed;
  49
  50                         status = "okay";
  51                 };
  52
  53                 // On-board eMMC
  54                 sdi4_per2@80114000 {
  55                         arm,primecell-periphid = <0x10480180>;
  56                         max-frequency = <100000000>;
  57                         bus-width = <8>;
  58                         mmc-cap-mmc-highspeed;
  59                         vmmc-supply = <&ab8500_ldo_aux2_reg>;
  60
  61                         status = "okay";
  62                 };
  63
  64                 pinctrl {
  65                         /*
  66                          * Set this up using hogs, as time goes by and as seems fit, these
  67                          * can be moved over to being controlled by respective device.
  68                          */
  69                         pinctrl-names = "default";
  70                         pinctrl-0 = <&ipgpio_hrefv60_mode>,
  71                                   <&accel_hrefv60_mode>,
  72                                   <&magneto_hrefv60_mode>,
  73                                   <&etm_hrefv60_mode>,
  74                                   <&nahj_hrefv60_mode>,
  75                                   <&nfc_hrefv60_mode>,
  76                                   <&force_hrefv60_mode>,
  77                                   <&dipro_hrefv60_mode>,
  78                                   <&vaudio_hf_hrefv60_mode>,
  79                                   <&gbf_hrefv60_mode>,
  80                                   <&hdtv_hrefv60_mode>,
  81                                   <&touch_hrefv60_mode>;
  82
  83                         sdi0 {
  84                                 /* SD card detect GPIO pin, extend default state */
  85                                 sdi0_default_mode: sdi0_default {
  86                                         default_hrefv60_cfg1 {
  87                                                 ste,pins = "GPIO95_E8";
  88                                                 ste,config = <&gpio_in_pu>;
  89                                         };
  90                                 };
  91                         };
  92                         ipgpio {
  93                                 /*
  94                                  * XENON Flashgun on image processor GPIO (controlled from image
  95                                  * processor firmware), mux in these image processor GPIO lines 0
  96                                  * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
  97                                  * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
  98                                  * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
  99                                  */
 100                                 ipgpio_hrefv60_mode: ipgpio_hrefv60 {
 101                                         hrefv60_mux {
 102                                                 ste,function = "ipgpio";
 103                                                 ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
 104                                         };
 105                                         hrefv60_cfg1 {
 106                                                 ste,pins = "GPIO6_AF6", "GPIO7_AG5";
 107                                                 ste,config = <&in_pu>;
 108                                         };
 109                                         hrefv60_cfg2 {
 110                                                 ste,pins = "GPIO21_AB3";
 111                                                 ste,config = <&gpio_out_lo>;
 112                                         };
 113                                         hrefv60_cfg3 {
 114                                                 ste,pins = "GPIO64_F3";
 115                                                 ste,config = <&out_lo>;
 116                                         };
 117                                 };
 118                         };
 119                         accelerometer {
 120                                 accel_hrefv60_mode: accel_hrefv60 {
 121                                         /* Accelerometer interrupt lines 1 & 2 */
 122                                         hrefv60_cfg1 {
 123                                                 ste,pins = "GPIO82_C1", "GPIO83_D3";
 124                                                 ste,config = <&gpio_in_pu>;
 125                                         };
 126                                 };
 127                         };
 128                         magnetometer {
 129                                 magneto_hrefv60_mode: magneto_hrefv60 {
 130                                         /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
 131                                         hrefv60_cfg1 {
 132                                                 ste,pins = "GPIO31_V3";
 133                                                 ste,config = <&gpio_in_pu>;
 134                                         };
 135                                         hrefv60_cfg2 {
 136                                                 ste,pins = "GPIO32_V2";
 137                                                 ste,config = <&gpio_in_pd>;
 138                                         };
 139                                 };
 140                         };
 141                         etm {
 142                                 /*
 143                                  * Drive D19-D23 for the ETM PTM trace interface low,
 144                                  * (presumably pins are unconnected therefore grounded here,
 145                                  * the "other alt C1" setting enables these pins)
 146                                  */
 147                                 etm_hrefv60_mode: etm_hrefv60 {
 148                                         hrefv60_cfg1 {
 149                                                 ste,pins =
 150                                                 "GPIO70_G5",
 151                                                 "GPIO71_G4",
 152                                                 "GPIO72_H4",
 153                                                 "GPIO73_H3",
 154                                                 "GPIO74_J3";
 155                                                 ste,config = <&gpio_out_lo>;
 156                                         };
 157                                  };
 158                         };
 159                         nahj {
 160                                 nahj_hrefv60_mode: nahj_hrefv60 {
 161                                         /* NAHJ CTRL on GPIO76 to low, CTRL_INV on GPIO216 to high */
 162                                         hrefv60_cfg1 {
 163                                                 ste,pins = "GPIO76_J2";
 164                                                 ste,config = <&gpio_out_lo>;
 165                                         };
 166                                         hrefv60_cfg2 {
 167                                                 ste,pins = "GPIO216_AG12";
 168                                                 ste,config = <&gpio_out_hi>;
 169                                         };
 170                                  };
 171                         };
 172                         nfc {
 173                                 nfc_hrefv60_mode: nfc_hrefv60 {
 174                                         /* NFC ENA and RESET to low, pulldown IRQ line */
 175                                         hrefv60_cfg1 {
 176                                                 ste,pins =
 177                                                 "GPIO77_H1", /* NFC_ENA */
 178                                                 "GPIO142_C11"; /* NFC_RESET */
 179                                                 ste,config = <&gpio_out_lo>;
 180                                         };
 181                                         hrefv60_cfg2 {
 182                                                 ste,pins = "GPIO144_B13"; /* NFC_IRQ */
 183                                                 ste,config = <&gpio_in_pd>;
 184                                         };
 185                                  };
 186                         };
 187                         force {
 188                                 force_hrefv60_mode: force_hrefv60 {
 189                                         hrefv60_cfg1 {
 190                                                 ste,pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
 191                                                 ste,config = <&gpio_in_pu>;
 192                                         };
 193                                         hrefv60_cfg2 {
 194                                                 ste,pins =
 195                                                 "GPIO92_D6", /* FORCE_SENSING_RST */
 196                                                 "GPIO97_D9"; /* FORCE_SENSING_WU */
 197                                                 ste,config = <&gpio_out_lo>;
 198                                         };
 199                                  };
 200                         };
 201                         dipro {
 202                                 dipro_hrefv60_mode: dipro_hrefv60 {
 203                                         hrefv60_cfg1 {
 204                                                 ste,pins = "GPIO139_C9"; /* DIPRO_INT */
 205                                                 ste,config = <&gpio_in_pu>;
 206                                         };
 207                                  };
 208                         };
 209                         vaudio_hf {
 210                                 vaudio_hf_hrefv60_mode: vaudio_hf_hrefv60 {
 211                                         /* Audio Amplifier HF enable GPIO */
 212                                         hrefv60_cfg1 {
 213                                                 ste,pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
 214                                                 ste,config = <&gpio_out_hi>;
 215                                         };
 216                                  };
 217                         };
 218                         gbf {
 219                                 gbf_hrefv60_mode: gbf_hrefv60 {
 220                                         /*
 221                                          * GBF (GPS, Bluetooth, FM-radio) interface,
 222                                          * pull low to reset state
 223                                          */
 224                                         hrefv60_cfg1 {
 225                                                 ste,pins = "GPIO171_D23"; /* GBF_ENA_RESET */
 226                                                 ste,config = <&gpio_out_lo>;
 227                                         };
 228                                  };
 229                         };
 230                         hdtv {
 231                                 hdtv_hrefv60_mode: hdtv_hrefv60 {
 232                                         /* MSP : HDTV INTERFACE GPIO line */
 233                                         hrefv60_cfg1 {
 234                                                 ste,pins = "GPIO192_AJ27";
 235                                                 ste,config = <&gpio_in_pd>;
 236                                         };
 237                                  };
 238                         };
 239                         touch {
 240                                 touch_hrefv60_mode: touch_hrefv60 {
 241                                         /*
 242                                          * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
 243                                          * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
 244                                          * reset signals low.
 245                                          */
 246                                         hrefv60_cfg1 {
 247                                                 ste,pins = "GPIO143_D12", "GPIO146_D13";
 248                                                 ste,config = <&gpio_out_lo>;
 249                                         };
 250                                         hrefv60_cfg2 {
 251                                                 ste,pins = "GPIO67_G2";
 252                                                 ste,config = <&gpio_in_pu>;
 253                                         };
 254                                 };
 255                         };
 256                         mcde {
 257                                 lcd_hrefv60_mode: lcd_hrefv60 {
 258                                         /*
 259                                          * Display Interface 1 uses GPIO 65 for RST (reset).
 260                                          * Display Interface 2 uses GPIO 66 for RST (reset).
 261                                          * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
 262                                          */
 263                                         hrefv60_cfg1 {
 264                                                 ste,pins ="GPIO65_F1";
 265                                                 ste,config = <&gpio_out_hi>;
 266                                         };
 267                                         hrefv60_cfg2 {
 268                                                 ste,pins ="GPIO66_G3";
 269                                                 ste,config = <&gpio_out_lo>;
 270                                         };
 271                                 };
 272                         };
 273                 };
 274         };
 275 };