arch/arm/boot/dts/ste-dbx5x0.dtsi

   1 /*
   2  * Copyright 2012 Linaro Ltd
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/mfd/dbx500-prcmu.h>
  14 #include <dt-bindings/arm/ux500_pm_domains.h>
  15 #include "skeleton.dtsi"
  16
  17 / {
  18         soc {
  19                 #address-cells = <1>;
  20                 #size-cells = <1>;
  21                 compatible = "stericsson,db8500";
  22                 interrupt-parent = <&intc>;
  23                 ranges;
  24
  25                 cpus {
  26                         #address-cells = <1>;
  27                         #size-cells = <0>;
  28
  29                         cpu-map {
  30                                 cluster0 {
  31                                         core0 {
  32                                                 cpu = <&CPU0>;
  33                                         };
  34                                         core1 {
  35                                                 cpu = <&CPU1>;
  36                                         };
  37                                 };
  38                         };
  39                         CPU0: cpu@0 {
  40                                 device_type = "cpu";
  41                                 compatible = "arm,cortex-a9";
  42                                 reg = <0>;
  43                         };
  44                         CPU1: cpu@1 {
  45                                 device_type = "cpu";
  46                                 compatible = "arm,cortex-a9";
  47                                 reg = <1>;
  48                         };
  49                 };
  50
  51                 ptm@801ae000 {
  52                         compatible = "arm,coresight-etm3x", "arm,primecell";
  53                         reg = <0x801ae000 0x1000>;
  54
  55                         clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
  56                         clock-names = "apb_pclk", "atclk";
  57                         cpu = <&CPU0>;
  58                         port {
  59                                 ptm0_out_port: endpoint {
  60                                         remote-endpoint = <&funnel_in_port0>;
  61                                 };
  62                         };
  63                 };
  64
  65                 ptm@801af000 {
  66                         compatible = "arm,coresight-etm3x", "arm,primecell";
  67                         reg = <0x801af000 0x1000>;
  68
  69                         clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
  70                         clock-names = "apb_pclk", "atclk";
  71                         cpu = <&CPU1>;
  72                         port {
  73                                 ptm1_out_port: endpoint {
  74                                         remote-endpoint = <&funnel_in_port1>;
  75                                 };
  76                         };
  77                 };
  78
  79                 funnel@801a6000 {
  80                         compatible = "arm,coresight-funnel", "arm,primecell";
  81                         reg = <0x801a6000 0x1000>;
  82
  83                         clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
  84                         clock-names = "apb_pclk", "atclk";
  85                         ports {
  86                                 #address-cells = <1>;
  87                                 #size-cells = <0>;
  88
  89                                 /* funnel output ports */
  90                                 port@0 {
  91                                         reg = <0>;
  92                                         funnel_out_port: endpoint {
  93                                                 remote-endpoint =
  94                                                         <&replicator_in_port0>;
  95                                         };
  96                                 };
  97
  98                                 /* funnel input ports */
  99                                 port@1 {
 100                                         reg = <0>;
 101                                         funnel_in_port0: endpoint {
 102                                                 slave-mode;
 103                                                 remote-endpoint = <&ptm0_out_port>;
 104                                         };
 105                                 };
 106
 107                                 port@2 {
 108                                         reg = <1>;
 109                                         funnel_in_port1: endpoint {
 110                                                 slave-mode;
 111                                                 remote-endpoint = <&ptm1_out_port>;
 112                                         };
 113                                 };
 114                         };
 115                 };
 116
 117                 replicator {
 118                         compatible = "arm,coresight-replicator";
 119                         clocks = <&prcmu_clk PRCMU_APEATCLK>;
 120                         clock-names = "atclk";
 121
 122                         ports {
 123                                 #address-cells = <1>;
 124                                 #size-cells = <0>;
 125
 126                                 /* replicator output ports */
 127                                 port@0 {
 128                                         reg = <0>;
 129                                         replicator_out_port0: endpoint {
 130                                                 remote-endpoint = <&tpiu_in_port>;
 131                                         };
 132                                 };
 133                                 port@1 {
 134                                         reg = <1>;
 135                                         replicator_out_port1: endpoint {
 136                                                 remote-endpoint = <&etb_in_port>;
 137                                         };
 138                                 };
 139
 140                                 /* replicator input port */
 141                                 port@2 {
 142                                         reg = <0>;
 143                                         replicator_in_port0: endpoint {
 144                                                 slave-mode;
 145                                                 remote-endpoint = <&funnel_out_port>;
 146                                         };
 147                                 };
 148                         };
 149                 };
 150
 151                 tpiu@80190000 {
 152                         compatible = "arm,coresight-tpiu", "arm,primecell";
 153                         reg = <0x80190000 0x1000>;
 154
 155                         clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
 156                         clock-names = "apb_pclk", "atclk";
 157                         port {
 158                                 tpiu_in_port: endpoint {
 159                                         slave-mode;
 160                                         remote-endpoint = <&replicator_out_port0>;
 161                                 };
 162                         };
 163                 };
 164
 165                 etb@801a4000 {
 166                         compatible = "arm,coresight-etb10", "arm,primecell";
 167                         reg = <0x801a4000 0x1000>;
 168
 169                         clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
 170                         clock-names = "apb_pclk", "atclk";
 171                         port {
 172                                 etb_in_port: endpoint {
 173                                         slave-mode;
 174                                         remote-endpoint = <&replicator_out_port1>;
 175                                 };
 176                         };
 177                 };
 178
 179                 intc: interrupt-controller@a0411000 {
 180                         compatible = "arm,cortex-a9-gic";
 181                         #interrupt-cells = <3>;
 182                         #address-cells = <1>;
 183                         interrupt-controller;
 184                         reg = <0xa0411000 0x1000>,
 185                               <0xa0410100 0x100>;
 186                 };
 187
 188                 L2: l2-cache {
 189                         compatible = "arm,pl310-cache";
 190                         reg = <0xa0412000 0x1000>;
 191                         interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
 192                         cache-unified;
 193                         cache-level = <2>;
 194                 };
 195
 196                 pmu {
 197                         compatible = "arm,cortex-a9-pmu";
 198                         interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
 199                 };
 200
 201                 pm_domains: pm_domains0 {
 202                         compatible = "stericsson,ux500-pm-domains";
 203                         #power-domain-cells = <1>;
 204                 };
 205
 206                 clocks {
 207                         compatible = "stericsson,u8500-clks";
 208
 209                         prcmu_clk: prcmu-clock {
 210                                 #clock-cells = <1>;
 211                         };
 212
 213                         prcc_pclk: prcc-periph-clock {
 214                                 #clock-cells = <2>;
 215                         };
 216
 217                         prcc_kclk: prcc-kernel-clock {
 218                                 #clock-cells = <2>;
 219                         };
 220
 221                         rtc_clk: rtc32k-clock {
 222                                 #clock-cells = <0>;
 223                         };
 224
 225                         smp_twd_clk: smp-twd-clock {
 226                                 #clock-cells = <0>;
 227                         };
 228                 };
 229
 230                 mtu@a03c6000 {
 231                         /* Nomadik System Timer */
 232                         compatible = "st,nomadik-mtu";
 233                         reg = <0xa03c6000 0x1000>;
 234                         interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
 235
 236                         clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;
 237                         clock-names = "timclk", "apb_pclk";
 238                 };
 239
 240                 timer@a0410600 {
 241                         compatible = "arm,cortex-a9-twd-timer";
 242                         reg = <0xa0410600 0x20>;
 243                         interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
 244
 245                         clocks = <&smp_twd_clk>;
 246                 };
 247
 248                 rtc@80154000 {
 249                         compatible = "arm,rtc-pl031", "arm,primecell";
 250                         reg = <0x80154000 0x1000>;
 251                         interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
 252
 253                         clocks = <&rtc_clk>;
 254                         clock-names = "apb_pclk";
 255                 };
 256
 257                 gpio0: gpio@8012e000 {
 258                         compatible = "stericsson,db8500-gpio",
 259                                 "st,nomadik-gpio";
 260                         reg =  <0x8012e000 0x80>;
 261                         interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
 262                         interrupt-controller;
 263                         #interrupt-cells = <2>;
 264                         st,supports-sleepmode;
 265                         gpio-controller;
 266                         #gpio-cells = <2>;
 267                         gpio-bank = <0>;
 268
 269                         clocks = <&prcc_pclk 1 9>;
 270                 };
 271
 272                 gpio1: gpio@8012e080 {
 273                         compatible = "stericsson,db8500-gpio",
 274                                 "st,nomadik-gpio";
 275                         reg =  <0x8012e080 0x80>;
 276                         interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
 277                         interrupt-controller;
 278                         #interrupt-cells = <2>;
 279                         st,supports-sleepmode;
 280                         gpio-controller;
 281                         #gpio-cells = <2>;
 282                         gpio-bank = <1>;
 283
 284                         clocks = <&prcc_pclk 1 9>;
 285                 };
 286
 287                 gpio2: gpio@8000e000 {
 288                         compatible = "stericsson,db8500-gpio",
 289                                 "st,nomadik-gpio";
 290                         reg =  <0x8000e000 0x80>;
 291                         interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH>;
 292                         interrupt-controller;
 293                         #interrupt-cells = <2>;
 294                         st,supports-sleepmode;
 295                         gpio-controller;
 296                         #gpio-cells = <2>;
 297                         gpio-bank = <2>;
 298
 299                         clocks = <&prcc_pclk 3 8>;
 300                 };
 301
 302                 gpio3: gpio@8000e080 {
 303                         compatible = "stericsson,db8500-gpio",
 304                                 "st,nomadik-gpio";
 305                         reg =  <0x8000e080 0x80>;
 306                         interrupts = <0 122 IRQ_TYPE_LEVEL_HIGH>;
 307                         interrupt-controller;
 308                         #interrupt-cells = <2>;
 309                         st,supports-sleepmode;
 310                         gpio-controller;
 311                         #gpio-cells = <2>;
 312                         gpio-bank = <3>;
 313
 314                         clocks = <&prcc_pclk 3 8>;
 315                 };
 316
 317                 gpio4: gpio@8000e100 {
 318                         compatible = "stericsson,db8500-gpio",
 319                                 "st,nomadik-gpio";
 320                         reg =  <0x8000e100 0x80>;
 321                         interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
 322                         interrupt-controller;
 323                         #interrupt-cells = <2>;
 324                         st,supports-sleepmode;
 325                         gpio-controller;
 326                         #gpio-cells = <2>;
 327                         gpio-bank = <4>;
 328
 329                         clocks = <&prcc_pclk 3 8>;
 330                 };
 331
 332                 gpio5: gpio@8000e180 {
 333                         compatible = "stericsson,db8500-gpio",
 334                                 "st,nomadik-gpio";
 335                         reg =  <0x8000e180 0x80>;
 336                         interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
 337                         interrupt-controller;
 338                         #interrupt-cells = <2>;
 339                         st,supports-sleepmode;
 340                         gpio-controller;
 341                         #gpio-cells = <2>;
 342                         gpio-bank = <5>;
 343
 344                         clocks = <&prcc_pclk 3 8>;
 345                 };
 346
 347                 gpio6: gpio@8011e000 {
 348                         compatible = "stericsson,db8500-gpio",
 349                                 "st,nomadik-gpio";
 350                         reg =  <0x8011e000 0x80>;
 351                         interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
 352                         interrupt-controller;
 353                         #interrupt-cells = <2>;
 354                         st,supports-sleepmode;
 355                         gpio-controller;
 356                         #gpio-cells = <2>;
 357                         gpio-bank = <6>;
 358
 359                         clocks = <&prcc_pclk 2 11>;
 360                 };
 361
 362                 gpio7: gpio@8011e080 {
 363                         compatible = "stericsson,db8500-gpio",
 364                                 "st,nomadik-gpio";
 365                         reg =  <0x8011e080 0x80>;
 366                         interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
 367                         interrupt-controller;
 368                         #interrupt-cells = <2>;
 369                         st,supports-sleepmode;
 370                         gpio-controller;
 371                         #gpio-cells = <2>;
 372                         gpio-bank = <7>;
 373
 374                         clocks = <&prcc_pclk 2 11>;
 375                 };
 376
 377                 gpio8: gpio@a03fe000 {
 378                         compatible = "stericsson,db8500-gpio",
 379                                 "st,nomadik-gpio";
 380                         reg =  <0xa03fe000 0x80>;
 381                         interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>;
 382                         interrupt-controller;
 383                         #interrupt-cells = <2>;
 384                         st,supports-sleepmode;
 385                         gpio-controller;
 386                         #gpio-cells = <2>;
 387                         gpio-bank = <8>;
 388
 389                         clocks = <&prcc_pclk 5 1>;
 390                 };
 391
 392                 pinctrl {
 393                         compatible = "stericsson,db8500-pinctrl";
 394                         prcm = <&prcmu>;
 395                 };
 396
 397                 usb_per5@a03e0000 {
 398                         compatible = "stericsson,db8500-musb";
 399                         reg = <0xa03e0000 0x10000>;
 400                         interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
 401                         interrupt-names = "mc";
 402
 403                         dr_mode = "otg";
 404
 405                         dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
 406                                <&dma 38 0 0x0>, /* Logical - MemToDev */
 407                                <&dma 37 0 0x2>, /* Logical - DevToMem */
 408                                <&dma 37 0 0x0>, /* Logical - MemToDev */
 409                                <&dma 36 0 0x2>, /* Logical - DevToMem */
 410                                <&dma 36 0 0x0>, /* Logical - MemToDev */
 411                                <&dma 19 0 0x2>, /* Logical - DevToMem */
 412                                <&dma 19 0 0x0>, /* Logical - MemToDev */
 413                                <&dma 18 0 0x2>, /* Logical - DevToMem */
 414                                <&dma 18 0 0x0>, /* Logical - MemToDev */
 415                                <&dma 17 0 0x2>, /* Logical - DevToMem */
 416                                <&dma 17 0 0x0>, /* Logical - MemToDev */
 417                                <&dma 16 0 0x2>, /* Logical - DevToMem */
 418                                <&dma 16 0 0x0>, /* Logical - MemToDev */
 419                                <&dma 39 0 0x2>, /* Logical - DevToMem */
 420                                <&dma 39 0 0x0>; /* Logical - MemToDev */
 421
 422                         dma-names = "iep_1_9",  "oep_1_9",
 423                                     "iep_2_10", "oep_2_10",
 424                                     "iep_3_11", "oep_3_11",
 425                                     "iep_4_12", "oep_4_12",
 426                                     "iep_5_13", "oep_5_13",
 427                                     "iep_6_14", "oep_6_14",
 428                                     "iep_7_15", "oep_7_15",
 429                                     "iep_8",    "oep_8";
 430
 431                         clocks = <&prcc_pclk 5 0>;
 432                 };
 433
 434                 dma: dma-controller@801C0000 {
 435                         compatible = "stericsson,db8500-dma40", "stericsson,dma40";
 436                         reg = <0x801C0000 0x1000 0x40010000 0x800>;
 437                         reg-names = "base", "lcpa";
 438                         interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
 439
 440                         #dma-cells = <3>;
 441                         memcpy-channels = <56 57 58 59 60>;
 442
 443                         clocks = <&prcmu_clk PRCMU_DMACLK>;
 444                 };
 445
 446                 prcmu: prcmu@80157000 {
 447                         compatible = "stericsson,db8500-prcmu";
 448                         reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
 449                         reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
 450                         interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
 451                         #address-cells = <1>;
 452                         #size-cells = <1>;
 453                         interrupt-controller;
 454                         #interrupt-cells = <2>;
 455                         ranges;
 456
 457                         prcmu-timer-4@80157450 {
 458                                 compatible = "stericsson,db8500-prcmu-timer-4";
 459                                 reg = <0x80157450 0xC>;
 460                         };
 461
 462                         cpufreq {
 463                                 compatible = "stericsson,cpufreq-ux500";
 464                                 clocks = <&prcmu_clk PRCMU_ARMSS>;
 465                                 clock-names = "armss";
 466                                 status = "disabled";
 467                         };
 468
 469                         thermal@801573c0 {
 470                                 compatible = "stericsson,db8500-thermal";
 471                                 reg = <0x801573c0 0x40>;
 472                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
 473                                              <22 IRQ_TYPE_LEVEL_HIGH>;
 474                                 interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
 475                                 status = "disabled";
 476                         };
 477
 478                         db8500-prcmu-regulators {
 479                                 compatible = "stericsson,db8500-prcmu-regulator";
 480
 481                                 // DB8500_REGULATOR_VAPE
 482                                 db8500_vape_reg: db8500_vape {
 483                                         regulator-compatible = "db8500_vape";
 484                                         regulator-always-on;
 485                                 };
 486
 487                                 // DB8500_REGULATOR_VARM
 488                                 db8500_varm_reg: db8500_varm {
 489                                         regulator-compatible = "db8500_varm";
 490                                 };
 491
 492                                 // DB8500_REGULATOR_VMODEM
 493                                 db8500_vmodem_reg: db8500_vmodem {
 494                                         regulator-compatible = "db8500_vmodem";
 495                                 };
 496
 497                                 // DB8500_REGULATOR_VPLL
 498                                 db8500_vpll_reg: db8500_vpll {
 499                                         regulator-compatible = "db8500_vpll";
 500                                 };
 501
 502                                 // DB8500_REGULATOR_VSMPS1
 503                                 db8500_vsmps1_reg: db8500_vsmps1 {
 504                                         regulator-compatible = "db8500_vsmps1";
 505                                 };
 506
 507                                 // DB8500_REGULATOR_VSMPS2
 508                                 db8500_vsmps2_reg: db8500_vsmps2 {
 509                                         regulator-compatible = "db8500_vsmps2";
 510                                 };
 511
 512                                 // DB8500_REGULATOR_VSMPS3
 513                                 db8500_vsmps3_reg: db8500_vsmps3 {
 514                                         regulator-compatible = "db8500_vsmps3";
 515                                 };
 516
 517                                 // DB8500_REGULATOR_VRF1
 518                                 db8500_vrf1_reg: db8500_vrf1 {
 519                                         regulator-compatible = "db8500_vrf1";
 520                                 };
 521
 522                                 // DB8500_REGULATOR_SWITCH_SVAMMDSP
 523                                 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
 524                                         regulator-compatible = "db8500_sva_mmdsp";
 525                                 };
 526
 527                                 // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
 528                                 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
 529                                         regulator-compatible = "db8500_sva_mmdsp_ret";
 530                                 };
 531
 532                                 // DB8500_REGULATOR_SWITCH_SVAPIPE
 533                                 db8500_sva_pipe_reg: db8500_sva_pipe {
 534                                         regulator-compatible = "db8500_sva_pipe";
 535                                 };
 536
 537                                 // DB8500_REGULATOR_SWITCH_SIAMMDSP
 538                                 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
 539                                         regulator-compatible = "db8500_sia_mmdsp";
 540                                 };
 541
 542                                 // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
 543                                 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
 544                                 };
 545
 546                                 // DB8500_REGULATOR_SWITCH_SIAPIPE
 547                                 db8500_sia_pipe_reg: db8500_sia_pipe {
 548                                         regulator-compatible = "db8500_sia_pipe";
 549                                 };
 550
 551                                 // DB8500_REGULATOR_SWITCH_SGA
 552                                 db8500_sga_reg: db8500_sga {
 553                                         regulator-compatible = "db8500_sga";
 554                                         vin-supply = <&db8500_vape_reg>;
 555                                 };
 556
 557                                 // DB8500_REGULATOR_SWITCH_B2R2_MCDE
 558                                 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
 559                                         regulator-compatible = "db8500_b2r2_mcde";
 560                                         vin-supply = <&db8500_vape_reg>;
 561                                 };
 562
 563                                 // DB8500_REGULATOR_SWITCH_ESRAM12
 564                                 db8500_esram12_reg: db8500_esram12 {
 565                                         regulator-compatible = "db8500_esram12";
 566                                 };
 567
 568                                 // DB8500_REGULATOR_SWITCH_ESRAM12RET
 569                                 db8500_esram12_ret_reg: db8500_esram12_ret {
 570                                         regulator-compatible = "db8500_esram12_ret";
 571                                 };
 572
 573                                 // DB8500_REGULATOR_SWITCH_ESRAM34
 574                                 db8500_esram34_reg: db8500_esram34 {
 575                                         regulator-compatible = "db8500_esram34";
 576                                 };
 577
 578                                 // DB8500_REGULATOR_SWITCH_ESRAM34RET
 579                                 db8500_esram34_ret_reg: db8500_esram34_ret {
 580                                         regulator-compatible = "db8500_esram34_ret";
 581                                 };
 582                         };
 583
 584                         ab8500 {
 585                                 compatible = "stericsson,ab8500";
 586                                 interrupt-parent = <&intc>;
 587                                 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
 588                                 interrupt-controller;
 589                                 #interrupt-cells = <2>;
 590
 591                                 ab8500_gpio: ab8500-gpio {
 592                                         gpio-controller;
 593                                         #gpio-cells = <2>;
 594                                 };
 595
 596                                 ab8500-rtc {
 597                                         compatible = "stericsson,ab8500-rtc";
 598                                         interrupts = <17 IRQ_TYPE_LEVEL_HIGH
 599                                                       18 IRQ_TYPE_LEVEL_HIGH>;
 600                                         interrupt-names = "60S", "ALARM";
 601                                 };
 602
 603                                 ab8500-gpadc {
 604                                         compatible = "stericsson,ab8500-gpadc";
 605                                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH
 606                                                       39 IRQ_TYPE_LEVEL_HIGH>;
 607                                         interrupt-names = "HW_CONV_END", "SW_CONV_END";
 608                                         vddadc-supply = <&ab8500_ldo_tvout_reg>;
 609                                 };
 610
 611                                 ab8500_battery: ab8500_battery {
 612                                         stericsson,battery-type = "LIPO";
 613                                         thermistor-on-batctrl;
 614                                 };
 615
 616                                 ab8500_fg {
 617                                         compatible = "stericsson,ab8500-fg";
 618                                         battery    = <&ab8500_battery>;
 619                                 };
 620
 621                                 ab8500_btemp {
 622                                         compatible = "stericsson,ab8500-btemp";
 623                                         battery    = <&ab8500_battery>;
 624                                 };
 625
 626                                 ab8500_charger {
 627                                         compatible      = "stericsson,ab8500-charger";
 628                                         battery         = <&ab8500_battery>;
 629                                         vddadc-supply   = <&ab8500_ldo_tvout_reg>;
 630                                 };
 631
 632                                 ab8500_chargalg {
 633                                         compatible      = "stericsson,ab8500-chargalg";
 634                                         battery         = <&ab8500_battery>;
 635                                 };
 636
 637                                 ab8500_usb {
 638                                         compatible = "stericsson,ab8500-usb";
 639                                         interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
 640                                                        96 IRQ_TYPE_LEVEL_HIGH
 641                                                        14 IRQ_TYPE_LEVEL_HIGH
 642                                                        15 IRQ_TYPE_LEVEL_HIGH
 643                                                        79 IRQ_TYPE_LEVEL_HIGH
 644                                                        74 IRQ_TYPE_LEVEL_HIGH
 645                                                        75 IRQ_TYPE_LEVEL_HIGH>;
 646                                         interrupt-names = "ID_WAKEUP_R",
 647                                                           "ID_WAKEUP_F",
 648                                                           "VBUS_DET_F",
 649                                                           "VBUS_DET_R",
 650                                                           "USB_LINK_STATUS",
 651                                                           "USB_ADP_PROBE_PLUG",
 652                                                           "USB_ADP_PROBE_UNPLUG";
 653                                         vddulpivio18-supply = <&ab8500_ldo_intcore_reg>;
 654                                         v-ape-supply = <&db8500_vape_reg>;
 655                                         musb_1v8-supply = <&db8500_vsmps2_reg>;
 656                                 };
 657
 658                                 ab8500-ponkey {
 659                                         compatible = "stericsson,ab8500-poweron-key";
 660                                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH
 661                                                       7 IRQ_TYPE_LEVEL_HIGH>;
 662                                         interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
 663                                 };
 664
 665                                 ab8500-sysctrl {
 666                                         compatible = "stericsson,ab8500-sysctrl";
 667                                 };
 668
 669                                 ab8500-pwm {
 670                                         compatible = "stericsson,ab8500-pwm";
 671                                 };
 672
 673                                 ab8500-debugfs {
 674                                         compatible = "stericsson,ab8500-debug";
 675                                 };
 676
 677                                 codec: ab8500-codec {
 678                                         compatible = "stericsson,ab8500-codec";
 679
 680                                         V-AUD-supply = <&ab8500_ldo_audio_reg>;
 681                                         V-AMIC1-supply = <&ab8500_ldo_anamic1_reg>;
 682                                         V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>;
 683                                         V-DMIC-supply = <&ab8500_ldo_dmic_reg>;
 684
 685                                         stericsson,earpeice-cmv = <950>; /* Units in mV. */
 686                                 };
 687
 688                                 ext_regulators: ab8500-ext-regulators {
 689                                         compatible = "stericsson,ab8500-ext-regulator";
 690
 691                                         ab8500_ext1_reg: ab8500_ext1 {
 692                                                 regulator-compatible = "ab8500_ext1";
 693                                                 regulator-min-microvolt = <1800000>;
 694                                                 regulator-max-microvolt = <1800000>;
 695                                                 regulator-boot-on;
 696                                                 regulator-always-on;
 697                                         };
 698
 699                                         ab8500_ext2_reg: ab8500_ext2 {
 700                                                 regulator-compatible = "ab8500_ext2";
 701                                                 regulator-min-microvolt = <1360000>;
 702                                                 regulator-max-microvolt = <1360000>;
 703                                                 regulator-boot-on;
 704                                                 regulator-always-on;
 705                                         };
 706
 707                                         ab8500_ext3_reg: ab8500_ext3 {
 708                                                 regulator-compatible = "ab8500_ext3";
 709                                                 regulator-min-microvolt = <3400000>;
 710                                                 regulator-max-microvolt = <3400000>;
 711                                                 regulator-boot-on;
 712                                         };
 713                                 };
 714
 715                                 ab8500-regulators {
 716                                         compatible = "stericsson,ab8500-regulator";
 717                                         vin-supply = <&ab8500_ext3_reg>;
 718
 719                                         // supplies to the display/camera
 720                                         ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
 721                                                 regulator-compatible = "ab8500_ldo_aux1";
 722                                                 regulator-min-microvolt = <2500000>;
 723                                                 regulator-max-microvolt = <2900000>;
 724                                                 regulator-boot-on;
 725                                                 /* BUG: If turned off MMC will be affected. */
 726                                                 regulator-always-on;
 727                                         };
 728
 729                                         // supplies to the on-board eMMC
 730                                         ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
 731                                                 regulator-compatible = "ab8500_ldo_aux2";
 732                                                 regulator-min-microvolt = <1100000>;
 733                                                 regulator-max-microvolt = <3300000>;
 734                                         };
 735
 736                                         // supply for VAUX3; SDcard slots
 737                                         ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
 738                                                 regulator-compatible = "ab8500_ldo_aux3";
 739                                                 regulator-min-microvolt = <1100000>;
 740                                                 regulator-max-microvolt = <3300000>;
 741                                         };
 742
 743                                         // supply for v-intcore12; VINTCORE12 LDO
 744                                         ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
 745                                                 regulator-compatible = "ab8500_ldo_intcore";
 746                                         };
 747
 748                                         // supply for tvout; gpadc; TVOUT LDO
 749                                         ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
 750                                                 regulator-compatible = "ab8500_ldo_tvout";
 751                                         };
 752
 753                                         // supply for ab8500-usb; USB LDO
 754                                         ab8500_ldo_usb_reg: ab8500_ldo_usb {
 755                                                 regulator-compatible = "ab8500_ldo_usb";
 756                                         };
 757
 758                                         // supply for ab8500-vaudio; VAUDIO LDO
 759                                         ab8500_ldo_audio_reg: ab8500_ldo_audio {
 760                                                 regulator-compatible = "ab8500_ldo_audio";
 761                                         };
 762
 763                                         // supply for v-anamic1 VAMIC1 LDO
 764                                         ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
 765                                                 regulator-compatible = "ab8500_ldo_anamic1";
 766                                         };
 767
 768                                         // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
 769                                         ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
 770                                                 regulator-compatible = "ab8500_ldo_anamic2";
 771                                         };
 772
 773                                         // supply for v-dmic; VDMIC LDO
 774                                         ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
 775                                                 regulator-compatible = "ab8500_ldo_dmic";
 776                                         };
 777
 778                                         // supply for U8500 CSI/DSI; VANA LDO
 779                                         ab8500_ldo_ana_reg: ab8500_ldo_ana {
 780                                                 regulator-compatible = "ab8500_ldo_ana";
 781                                         };
 782                                 };
 783                         };
 784                 };
 785
 786                 i2c@80004000 {
 787                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
 788                         reg = <0x80004000 0x1000>;
 789                         interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
 790
 791                         #address-cells = <1>;
 792                         #size-cells = <0>;
 793                         v-i2c-supply = <&db8500_vape_reg>;
 794
 795                         clock-frequency = <400000>;
 796                         clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
 797                         clock-names = "i2cclk", "apb_pclk";
 798                         power-domains = <&pm_domains DOMAIN_VAPE>;
 799                 };
 800
 801                 i2c@80122000 {
 802                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
 803                         reg = <0x80122000 0x1000>;
 804                         interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
 805
 806                         #address-cells = <1>;
 807                         #size-cells = <0>;
 808                         v-i2c-supply = <&db8500_vape_reg>;
 809
 810                         clock-frequency = <400000>;
 811
 812                         clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
 813                         clock-names = "i2cclk", "apb_pclk";
 814                         power-domains = <&pm_domains DOMAIN_VAPE>;
 815                 };
 816
 817                 i2c@80128000 {
 818                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
 819                         reg = <0x80128000 0x1000>;
 820                         interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
 821
 822                         #address-cells = <1>;
 823                         #size-cells = <0>;
 824                         v-i2c-supply = <&db8500_vape_reg>;
 825
 826                         clock-frequency = <400000>;
 827
 828                         clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
 829                         clock-names = "i2cclk", "apb_pclk";
 830                         power-domains = <&pm_domains DOMAIN_VAPE>;
 831                 };
 832
 833                 i2c@80110000 {
 834                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
 835                         reg = <0x80110000 0x1000>;
 836                         interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
 837
 838                         #address-cells = <1>;
 839                         #size-cells = <0>;
 840                         v-i2c-supply = <&db8500_vape_reg>;
 841
 842                         clock-frequency = <400000>;
 843
 844                         clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
 845                         clock-names = "i2cclk", "apb_pclk";
 846                         power-domains = <&pm_domains DOMAIN_VAPE>;
 847                 };
 848
 849                 i2c@8012a000 {
 850                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
 851                         reg = <0x8012a000 0x1000>;
 852                         interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
 853
 854                         #address-cells = <1>;
 855                         #size-cells = <0>;
 856                         v-i2c-supply = <&db8500_vape_reg>;
 857
 858                         clock-frequency = <400000>;
 859
 860                         clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>;
 861                         clock-names = "i2cclk", "apb_pclk";
 862                         power-domains = <&pm_domains DOMAIN_VAPE>;
 863                 };
 864
 865                 ssp@80002000 {
 866                         compatible = "arm,pl022", "arm,primecell";
 867                         reg = <0x80002000 0x1000>;
 868                         interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
 869                         #address-cells = <1>;
 870                         #size-cells = <0>;
 871                         clocks = <&prcc_kclk 3 1>, <&prcc_pclk 3 1>;
 872                         clock-names = "SSPCLK", "apb_pclk";
 873                         dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */
 874                                <&dma 8 0 0x0>; /* Logical - MemToDev */
 875                         dma-names = "rx", "tx";
 876                         power-domains = <&pm_domains DOMAIN_VAPE>;
 877                 };
 878
 879                 ssp@80003000 {
 880                         compatible = "arm,pl022", "arm,primecell";
 881                         reg = <0x80003000 0x1000>;
 882                         interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
 883                         #address-cells = <1>;
 884                         #size-cells = <0>;
 885                         clocks = <&prcc_kclk 3 2>, <&prcc_pclk 3 2>;
 886                         clock-names = "SSPCLK", "apb_pclk";
 887                         dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */
 888                                <&dma 9 0 0x0>; /* Logical - MemToDev */
 889                         dma-names = "rx", "tx";
 890                         power-domains = <&pm_domains DOMAIN_VAPE>;
 891                 };
 892
 893                 spi@8011a000 {
 894                         compatible = "arm,pl022", "arm,primecell";
 895                         reg = <0x8011a000 0x1000>;
 896                         interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
 897                         #address-cells = <1>;
 898                         #size-cells = <0>;
 899                         /* Same clock wired to kernel and pclk */
 900                         clocks = <&prcc_pclk 2 8>, <&prcc_pclk 2 8>;
 901                         clock-names = "SSPCLK", "apb_pclk";
 902                         dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */
 903                                <&dma 0 0 0x0>; /* Logical - MemToDev */
 904                         dma-names = "rx", "tx";
 905                         power-domains = <&pm_domains DOMAIN_VAPE>;
 906                 };
 907
 908                 spi@80112000 {
 909                         compatible = "arm,pl022", "arm,primecell";
 910                         reg = <0x80112000 0x1000>;
 911                         interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
 912                         #address-cells = <1>;
 913                         #size-cells = <0>;
 914                         /* Same clock wired to kernel and pclk */
 915                         clocks = <&prcc_pclk 2 2>, <&prcc_pclk 2 2>;
 916                         clock-names = "SSPCLK", "apb_pclk";
 917                         dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */
 918                                <&dma 35 0 0x0>; /* Logical - MemToDev */
 919                         dma-names = "rx", "tx";
 920                         power-domains = <&pm_domains DOMAIN_VAPE>;
 921                 };
 922
 923                 spi@80111000 {
 924                         compatible = "arm,pl022", "arm,primecell";
 925                         reg = <0x80111000 0x1000>;
 926                         interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
 927                         #address-cells = <1>;
 928                         #size-cells = <0>;
 929                         /* Same clock wired to kernel and pclk */
 930                         clocks = <&prcc_pclk 2 1>, <&prcc_pclk 2 1>;
 931                         clock-names = "SSPCLK", "apb_pclk";
 932                         dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */
 933                                <&dma 33 0 0x0>; /* Logical - MemToDev */
 934                         dma-names = "rx", "tx";
 935                         power-domains = <&pm_domains DOMAIN_VAPE>;
 936                 };
 937
 938                 spi@80129000 {
 939                         compatible = "arm,pl022", "arm,primecell";
 940                         reg = <0x80129000 0x1000>;
 941                         interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
 942                         #address-cells = <1>;
 943                         #size-cells = <0>;
 944                         /* Same clock wired to kernel and pclk */
 945                         clocks = <&prcc_pclk 1 7>, <&prcc_pclk 1 7>;
 946                         clock-names = "SSPCLK", "apb_pclk";
 947                         dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */
 948                                <&dma 40 0 0x0>; /* Logical - MemToDev */
 949                         dma-names = "rx", "tx";
 950                         power-domains = <&pm_domains DOMAIN_VAPE>;
 951                 };
 952
 953                 uart@80120000 {
 954                         compatible = "arm,pl011", "arm,primecell";
 955                         reg = <0x80120000 0x1000>;
 956                         interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
 957
 958                         dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
 959                                <&dma 13 0 0x0>; /* Logical - MemToDev */
 960                         dma-names = "rx", "tx";
 961
 962                         clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
 963                         clock-names = "uart", "apb_pclk";
 964
 965                         status = "disabled";
 966                 };
 967
 968                 uart@80121000 {
 969                         compatible = "arm,pl011", "arm,primecell";
 970                         reg = <0x80121000 0x1000>;
 971                         interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
 972
 973                         dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
 974                                <&dma 12 0 0x0>; /* Logical - MemToDev */
 975                         dma-names = "rx", "tx";
 976
 977                         clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;
 978                         clock-names = "uart", "apb_pclk";
 979
 980                         status = "disabled";
 981                 };
 982
 983                 uart@80007000 {
 984                         compatible = "arm,pl011", "arm,primecell";
 985                         reg = <0x80007000 0x1000>;
 986                         interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
 987
 988                         dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
 989                                <&dma 11 0 0x0>; /* Logical - MemToDev */
 990                         dma-names = "rx", "tx";
 991
 992                         clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;
 993                         clock-names = "uart", "apb_pclk";
 994
 995                         status = "disabled";
 996                 };
 997
 998                 sdi0_per1@80126000 {
 999                         compatible = "arm,pl18x", "arm,primecell";
1000                         reg = <0x80126000 0x1000>;
1001                         interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
1002
1003                         dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
1004                                <&dma 29 0 0x0>; /* Logical - MemToDev */
1005                         dma-names = "rx", "tx";
1006
1007                         clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
1008                         clock-names = "sdi", "apb_pclk";
1009                         power-domains = <&pm_domains DOMAIN_VAPE>;
1010
1011                         status = "disabled";
1012                 };
1013
1014                 sdi1_per2@80118000 {
1015                         compatible = "arm,pl18x", "arm,primecell";
1016                         reg = <0x80118000 0x1000>;
1017                         interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
1018
1019                         dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */
1020                                <&dma 32 0 0x0>; /* Logical - MemToDev */
1021                         dma-names = "rx", "tx";
1022
1023                         clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;
1024                         clock-names = "sdi", "apb_pclk";
1025                         power-domains = <&pm_domains DOMAIN_VAPE>;
1026
1027                         status = "disabled";
1028                 };
1029
1030                 sdi2_per3@80005000 {
1031                         compatible = "arm,pl18x", "arm,primecell";
1032                         reg = <0x80005000 0x1000>;
1033                         interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
1034
1035                         dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */
1036                                <&dma 28 0 0x0>; /* Logical - MemToDev */
1037                         dma-names = "rx", "tx";
1038
1039                         clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;
1040                         clock-names = "sdi", "apb_pclk";
1041                         power-domains = <&pm_domains DOMAIN_VAPE>;
1042
1043                         status = "disabled";
1044                 };
1045
1046                 sdi3_per2@80119000 {
1047                         compatible = "arm,pl18x", "arm,primecell";
1048                         reg = <0x80119000 0x1000>;
1049                         interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
1050
1051                         dmas = <&dma 41 0 0x2>, /* Logical - DevToMem */
1052                                <&dma 41 0 0x0>; /* Logical - MemToDev */
1053                         dma-names = "rx", "tx";
1054
1055                         clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;
1056                         clock-names = "sdi", "apb_pclk";
1057                         power-domains = <&pm_domains DOMAIN_VAPE>;
1058
1059                         status = "disabled";
1060                 };
1061
1062                 sdi4_per2@80114000 {
1063                         compatible = "arm,pl18x", "arm,primecell";
1064                         reg = <0x80114000 0x1000>;
1065                         interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1066
1067                         dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */
1068                                <&dma 42 0 0x0>; /* Logical - MemToDev */
1069                         dma-names = "rx", "tx";
1070
1071                         clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;
1072                         clock-names = "sdi", "apb_pclk";
1073                         power-domains = <&pm_domains DOMAIN_VAPE>;
1074
1075                         status = "disabled";
1076                 };
1077
1078                 sdi5_per3@80008000 {
1079                         compatible = "arm,pl18x", "arm,primecell";
1080                         reg = <0x80008000 0x1000>;
1081                         interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
1082
1083                         dmas = <&dma 43 0 0x2>, /* Logical - DevToMem */
1084                                <&dma 43 0 0x0>; /* Logical - MemToDev */
1085                         dma-names = "rx", "tx";
1086
1087                         clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;
1088                         clock-names = "sdi", "apb_pclk";
1089                         power-domains = <&pm_domains DOMAIN_VAPE>;
1090
1091                         status = "disabled";
1092                 };
1093
1094                 msp0: msp@80123000 {
1095                         compatible = "stericsson,ux500-msp-i2s";
1096                         reg = <0x80123000 0x1000>;
1097                         interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
1098                         v-ape-supply = <&db8500_vape_reg>;
1099
1100                         dmas = <&dma 31 0 0x12>, /* Logical - DevToMem - HighPrio */
1101                                <&dma 31 0 0x10>; /* Logical - MemToDev - HighPrio */
1102                         dma-names = "rx", "tx";
1103
1104                         clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
1105                         clock-names = "msp", "apb_pclk";
1106
1107                         status = "disabled";
1108                 };
1109
1110                 msp1: msp@80124000 {
1111                         compatible = "stericsson,ux500-msp-i2s";
1112                         reg = <0x80124000 0x1000>;
1113                         interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
1114                         v-ape-supply = <&db8500_vape_reg>;
1115
1116                         /* This DMA channel only exist on DB8500 v1 */
1117                         dmas = <&dma 30 0 0x10>; /* Logical - MemToDev - HighPrio */
1118                         dma-names = "tx";
1119
1120                         clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
1121                         clock-names = "msp", "apb_pclk";
1122
1123                         status = "disabled";
1124                 };
1125
1126                 // HDMI sound
1127                 msp2: msp@80117000 {
1128                         compatible = "stericsson,ux500-msp-i2s";
1129                         reg = <0x80117000 0x1000>;
1130                         interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
1131                         v-ape-supply = <&db8500_vape_reg>;
1132
1133                         dmas = <&dma 14 0 0x12>, /* Logical  - DevToMem - HighPrio */
1134                                <&dma 14 1 0x19>; /* Physical Chan 1 - MemToDev
1135                                                     HighPrio - Fixed */
1136                         dma-names = "rx", "tx";
1137
1138                         clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
1139                         clock-names = "msp", "apb_pclk";
1140
1141                         status = "disabled";
1142                 };
1143
1144                 msp3: msp@80125000 {
1145                         compatible = "stericsson,ux500-msp-i2s";
1146                         reg = <0x80125000 0x1000>;
1147                         interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
1148                         v-ape-supply = <&db8500_vape_reg>;
1149
1150                         /* This DMA channel only exist on DB8500 v2 */
1151                         dmas = <&dma 30 0 0x12>; /* Logical - DevToMem - HighPrio */
1152                         dma-names = "rx";
1153
1154                         clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
1155                         clock-names = "msp", "apb_pclk";
1156
1157                         status = "disabled";
1158                 };
1159
1160                 external-bus@50000000 {
1161                         compatible = "simple-bus";
1162                         reg = <0x50000000 0x4000000>;
1163                         #address-cells = <1>;
1164                         #size-cells = <1>;
1165                         ranges = <0 0x50000000 0x4000000>;
1166                         status = "disabled";
1167                 };
1168
1169                 cpufreq-cooling {
1170                         compatible = "stericsson,db8500-cpufreq-cooling";
1171                         status = "disabled";
1172                 };
1173
1174                 mcde@a0350000 {
1175                         compatible = "stericsson,mcde";
1176                         reg = <0xa0350000 0x1000>, /* MCDE */
1177                               <0xa0351000 0x1000>, /* DSI link 1 */
1178                               <0xa0352000 0x1000>, /* DSI link 2 */
1179                               <0xa0353000 0x1000>; /* DSI link 3 */
1180                         interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
1181                         clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
1182                                  <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
1183                                  <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */
1184                                  <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
1185                                  <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */
1186                                  <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
1187                                  <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */
1188                                  <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */
1189                 };
1190
1191                 cryp@a03cb000 {
1192                         compatible = "stericsson,ux500-cryp";
1193                         reg = <0xa03cb000 0x1000>;
1194                         interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
1195
1196                         v-ape-supply = <&db8500_vape_reg>;
1197                         clocks = <&prcc_pclk 6 1>;
1198                 };
1199
1200                 hash@a03c2000 {
1201                         compatible = "stericsson,ux500-hash";
1202                         reg = <0xa03c2000 0x1000>;
1203
1204                         v-ape-supply = <&db8500_vape_reg>;
1205                         clocks = <&prcc_pclk 6 2>;
1206                 };
1207         };
1208 };