2 * Copyright Altera Corporation (C) 2014. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
17 #include "skeleton.dtsi"
18 #include <dt-bindings/interrupt-controller/arm-gic.h>
41 compatible = "arm,cortex-a9";
44 next-level-cache = <&L2>;
47 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
55 compatible = "arm,cortex-a9-gic";
56 #interrupt-cells = <3>;
58 reg = <0xffffd000 0x1000>,
65 compatible = "simple-bus";
67 interrupt-parent = <&intc>;
71 compatible = "arm,amba-bus";
77 compatible = "arm,pl330", "arm,primecell";
78 reg = <0xffda1000 0x1000>;
79 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
80 <0 84 IRQ_TYPE_LEVEL_HIGH>,
81 <0 85 IRQ_TYPE_LEVEL_HIGH>,
82 <0 86 IRQ_TYPE_LEVEL_HIGH>,
83 <0 87 IRQ_TYPE_LEVEL_HIGH>,
84 <0 88 IRQ_TYPE_LEVEL_HIGH>,
85 <0 89 IRQ_TYPE_LEVEL_HIGH>,
86 <0 90 IRQ_TYPE_LEVEL_HIGH>;
94 compatible = "altr,clk-mgr";
95 reg = <0xffd04000 0x1000>;
103 compatible = "fixed-clock";
107 #address-cells = <1>;
110 compatible = "altr,socfpga-pll-clock";
114 periph_pll: periph_pll {
115 #address-cells = <1>;
118 compatible = "altr,socfpga-pll-clock";
124 gmac0: ethernet@ff800000 {
125 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
126 reg = <0xff800000 0x2000>;
127 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
128 interrupt-names = "macirq";
129 /* Filled in by bootloader */
130 mac-address = [00 00 00 00 00 00];
134 gmac1: ethernet@ff802000 {
135 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
136 reg = <0xff802000 0x2000>;
137 interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
138 interrupt-names = "macirq";
139 /* Filled in by bootloader */
140 mac-address = [00 00 00 00 00 00];
144 gmac2: ethernet@ff804000 {
145 compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
146 reg = <0xff804000 0x2000>;
147 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
148 interrupt-names = "macirq";
149 /* Filled in by bootloader */
150 mac-address = [00 00 00 00 00 00];
154 gpio0: gpio@ffc02900 {
155 #address-cells = <1>;
157 compatible = "snps,dw-apb-gpio";
158 reg = <0xffc02900 0x100>;
161 porta: gpio-controller@0 {
162 compatible = "snps,dw-apb-gpio-port";
165 snps,nr-gpios = <29>;
167 interrupt-controller;
168 #interrupt-cells = <2>;
169 interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
173 gpio1: gpio@ffc02a00 {
174 #address-cells = <1>;
176 compatible = "snps,dw-apb-gpio";
177 reg = <0xffc02a00 0x100>;
180 portb: gpio-controller@0 {
181 compatible = "snps,dw-apb-gpio-port";
184 snps,nr-gpios = <29>;
186 interrupt-controller;
187 #interrupt-cells = <2>;
188 interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
192 gpio2: gpio@ffc02b00 {
193 #address-cells = <1>;
195 compatible = "snps,dw-apb-gpio";
196 reg = <0xffc02b00 0x100>;
199 portc: gpio-controller@0 {
200 compatible = "snps,dw-apb-gpio-port";
203 snps,nr-gpios = <27>;
205 interrupt-controller;
206 #interrupt-cells = <2>;
207 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
212 #address-cells = <1>;
214 compatible = "snps,designware-i2c";
215 reg = <0xffc02200 0x100>;
216 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
221 #address-cells = <1>;
223 compatible = "snps,designware-i2c";
224 reg = <0xffc02300 0x100>;
225 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
230 #address-cells = <1>;
232 compatible = "snps,designware-i2c";
233 reg = <0xffc02400 0x100>;
234 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
239 #address-cells = <1>;
241 compatible = "snps,designware-i2c";
242 reg = <0xffc02500 0x100>;
243 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
248 #address-cells = <1>;
250 compatible = "snps,designware-i2c";
251 reg = <0xffc02600 0x100>;
252 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
256 L2: l2-cache@fffff000 {
257 compatible = "arm,pl310-cache";
258 reg = <0xfffff000 0x1000>;
259 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
264 mmc: dwmmc0@ff808000 {
265 #address-cells = <1>;
267 compatible = "altr,socfpga-dw-mshc";
268 reg = <0xff808000 0x1000>;
269 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
270 fifo-depth = <0x400>;
273 ocram: sram@ffe00000 {
274 compatible = "mmio-sram";
275 reg = <0xffe00000 0x40000>;
278 rst: rstmgr@ffd05000 {
280 compatible = "altr,rst-mgr";
281 reg = <0xffd05000 0x100>;
284 sysmgr: sysmgr@ffd06000 {
285 compatible = "altr,sys-mgr", "syscon";
286 reg = <0xffd06000 0x300>;
291 compatible = "arm,cortex-a9-twd-timer";
292 reg = <0xffffc600 0x100>;
293 interrupts = <1 13 0xf04>;
296 timer0: timer0@ffc02700 {
297 compatible = "snps,dw-apb-timer";
298 interrupts = <0 115 IRQ_TYPE_LEVEL_HIGH>;
299 reg = <0xffc02700 0x100>;
302 timer1: timer1@ffc02800 {
303 compatible = "snps,dw-apb-timer";
304 interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>;
305 reg = <0xffc02800 0x100>;
308 timer2: timer2@ffd00000 {
309 compatible = "snps,dw-apb-timer";
310 interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>;
311 reg = <0xffd00000 0x100>;
314 timer3: timer3@ffd00100 {
315 compatible = "snps,dw-apb-timer";
316 interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
317 reg = <0xffd01000 0x100>;
320 uart0: serial0@ffc02000 {
321 compatible = "snps,dw-apb-uart";
322 reg = <0xffc02000 0x100>;
323 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
328 uart1: serial1@ffc02100 {
329 compatible = "snps,dw-apb-uart";
330 reg = <0xffc02100 0x100>;
331 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
338 compatible = "usb-nop-xceiv";
343 compatible = "snps,dwc2";
344 reg = <0xffb00000 0xffff>;
345 interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
347 phy-names = "usb2-phy";
352 compatible = "snps,dwc2";
353 reg = <0xffb40000 0xffff>;
354 interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
356 phy-names = "usb2-phy";
360 watchdog0: watchdog@ffd00200 {
361 compatible = "snps,dw-wdt";
362 reg = <0xffd00200 0x100>;
363 interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
367 watchdog1: watchdog@ffd00300 {
368 compatible = "snps,dw-wdt";
369 reg = <0xffd00300 0x100>;
370 interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;