arch/arm/boot/dts/sama5d3.dtsi

   1 /*
   2  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
   3  *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC
   4  *
   5  *  Copyright (C) 2013 Atmel,
   6  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
   7  *
   8  * Licensed under GPLv2 or later.
   9  */
  10
  11 #include "skeleton.dtsi"
  12 #include <dt-bindings/dma/at91.h>
  13 #include <dt-bindings/pinctrl/at91.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/clk/at91.h>
  17
  18 / {
  19         model = "Atmel SAMA5D3 family SoC";
  20         compatible = "atmel,sama5d3", "atmel,sama5";
  21         interrupt-parent = <&aic>;
  22
  23         aliases {
  24                 serial0 = &dbgu;
  25                 serial1 = &usart0;
  26                 serial2 = &usart1;
  27                 serial3 = &usart2;
  28                 serial4 = &usart3;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 gpio4 = &pioE;
  34                 tcb0 = &tcb0;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 ssc1 = &ssc1;
  40         };
  41         cpus {
  42                 #address-cells = <1>;
  43                 #size-cells = <0>;
  44                 cpu@0 {
  45                         device_type = "cpu";
  46                         compatible = "arm,cortex-a5";
  47                         reg = <0x0>;
  48                 };
  49         };
  50
  51         pmu {
  52                 compatible = "arm,cortex-a5-pmu";
  53                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
  54         };
  55
  56         memory {
  57                 reg = <0x20000000 0x8000000>;
  58         };
  59
  60         clocks {
  61                 adc_op_clk: adc_op_clk{
  62                         compatible = "fixed-clock";
  63                         #clock-cells = <0>;
  64                         clock-frequency = <20000000>;
  65                 };
  66         };
  67
  68         ahb {
  69                 compatible = "simple-bus";
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72                 ranges;
  73
  74                 apb {
  75                         compatible = "simple-bus";
  76                         #address-cells = <1>;
  77                         #size-cells = <1>;
  78                         ranges;
  79
  80                         mmc0: mmc@f0000000 {
  81                                 compatible = "atmel,hsmci";
  82                                 reg = <0xf0000000 0x600>;
  83                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
  84                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
  85                                 dma-names = "rxtx";
  86                                 pinctrl-names = "default";
  87                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
  88                                 status = "disabled";
  89                                 #address-cells = <1>;
  90                                 #size-cells = <0>;
  91                                 clocks = <&mci0_clk>;
  92                                 clock-names = "mci_clk";
  93                         };
  94
  95                         spi0: spi@f0004000 {
  96                                 #address-cells = <1>;
  97                                 #size-cells = <0>;
  98                                 compatible = "atmel,at91rm9200-spi";
  99                                 reg = <0xf0004000 0x100>;
 100                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
 101                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
 102                                        <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
 103                                 dma-names = "tx", "rx";
 104                                 pinctrl-names = "default";
 105                                 pinctrl-0 = <&pinctrl_spi0>;
 106                                 clocks = <&spi0_clk>;
 107                                 clock-names = "spi_clk";
 108                                 status = "disabled";
 109                         };
 110
 111                         ssc0: ssc@f0008000 {
 112                                 compatible = "atmel,at91sam9g45-ssc";
 113                                 reg = <0xf0008000 0x4000>;
 114                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
 115                                 pinctrl-names = "default";
 116                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 117                                 clocks = <&ssc0_clk>;
 118                                 clock-names = "pclk";
 119                                 status = "disabled";
 120                         };
 121
 122                         tcb0: timer@f0010000 {
 123                                 compatible = "atmel,at91sam9x5-tcb";
 124                                 reg = <0xf0010000 0x100>;
 125                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 126                                 clocks = <&tcb0_clk>;
 127                                 clock-names = "t0_clk";
 128                         };
 129
 130                         i2c0: i2c@f0014000 {
 131                                 compatible = "atmel,at91sam9x5-i2c";
 132                                 reg = <0xf0014000 0x4000>;
 133                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
 134                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
 135                                        <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
 136                                 dma-names = "tx", "rx";
 137                                 pinctrl-names = "default";
 138                                 pinctrl-0 = <&pinctrl_i2c0>;
 139                                 #address-cells = <1>;
 140                                 #size-cells = <0>;
 141                                 clocks = <&twi0_clk>;
 142                                 status = "disabled";
 143                         };
 144
 145                         i2c1: i2c@f0018000 {
 146                                 compatible = "atmel,at91sam9x5-i2c";
 147                                 reg = <0xf0018000 0x4000>;
 148                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
 149                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
 150                                        <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
 151                                 dma-names = "tx", "rx";
 152                                 pinctrl-names = "default";
 153                                 pinctrl-0 = <&pinctrl_i2c1>;
 154                                 #address-cells = <1>;
 155                                 #size-cells = <0>;
 156                                 clocks = <&twi1_clk>;
 157                                 status = "disabled";
 158                         };
 159
 160                         usart0: serial@f001c000 {
 161                                 compatible = "atmel,at91sam9260-usart";
 162                                 reg = <0xf001c000 0x100>;
 163                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 164                                 pinctrl-names = "default";
 165                                 pinctrl-0 = <&pinctrl_usart0>;
 166                                 clocks = <&usart0_clk>;
 167                                 clock-names = "usart";
 168                                 status = "disabled";
 169                         };
 170
 171                         usart1: serial@f0020000 {
 172                                 compatible = "atmel,at91sam9260-usart";
 173                                 reg = <0xf0020000 0x100>;
 174                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
 175                                 pinctrl-names = "default";
 176                                 pinctrl-0 = <&pinctrl_usart1>;
 177                                 clocks = <&usart1_clk>;
 178                                 clock-names = "usart";
 179                                 status = "disabled";
 180                         };
 181
 182                         isi: isi@f0034000 {
 183                                 compatible = "atmel,at91sam9g45-isi";
 184                                 reg = <0xf0034000 0x4000>;
 185                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
 186                                 status = "disabled";
 187                         };
 188
 189                         mmc1: mmc@f8000000 {
 190                                 compatible = "atmel,hsmci";
 191                                 reg = <0xf8000000 0x600>;
 192                                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
 193                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
 194                                 dma-names = "rxtx";
 195                                 pinctrl-names = "default";
 196                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
 197                                 status = "disabled";
 198                                 #address-cells = <1>;
 199                                 #size-cells = <0>;
 200                                 clocks = <&mci1_clk>;
 201                                 clock-names = "mci_clk";
 202                         };
 203
 204                         spi1: spi@f8008000 {
 205                                 #address-cells = <1>;
 206                                 #size-cells = <0>;
 207                                 compatible = "atmel,at91rm9200-spi";
 208                                 reg = <0xf8008000 0x100>;
 209                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
 210                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
 211                                        <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
 212                                 dma-names = "tx", "rx";
 213                                 pinctrl-names = "default";
 214                                 pinctrl-0 = <&pinctrl_spi1>;
 215                                 clocks = <&spi1_clk>;
 216                                 clock-names = "spi_clk";
 217                                 status = "disabled";
 218                         };
 219
 220                         ssc1: ssc@f800c000 {
 221                                 compatible = "atmel,at91sam9g45-ssc";
 222                                 reg = <0xf800c000 0x4000>;
 223                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
 224                                 pinctrl-names = "default";
 225                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 226                                 clocks = <&ssc1_clk>;
 227                                 clock-names = "pclk";
 228                                 status = "disabled";
 229                         };
 230
 231                         adc0: adc@f8018000 {
 232                                 compatible = "atmel,at91sam9260-adc";
 233                                 reg = <0xf8018000 0x100>;
 234                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 235                                 pinctrl-names = "default";
 236                                 pinctrl-0 = <
 237                                         &pinctrl_adc0_adtrg
 238                                         &pinctrl_adc0_ad0
 239                                         &pinctrl_adc0_ad1
 240                                         &pinctrl_adc0_ad2
 241                                         &pinctrl_adc0_ad3
 242                                         &pinctrl_adc0_ad4
 243                                         &pinctrl_adc0_ad5
 244                                         &pinctrl_adc0_ad6
 245                                         &pinctrl_adc0_ad7
 246                                         &pinctrl_adc0_ad8
 247                                         &pinctrl_adc0_ad9
 248                                         &pinctrl_adc0_ad10
 249                                         &pinctrl_adc0_ad11
 250                                         >;
 251                                 clocks = <&adc_clk>,
 252                                          <&adc_op_clk>;
 253                                 clock-names = "adc_clk", "adc_op_clk";
 254                                 atmel,adc-channel-base = <0x50>;
 255                                 atmel,adc-channels-used = <0xfff>;
 256                                 atmel,adc-drdy-mask = <0x1000000>;
 257                                 atmel,adc-num-channels = <12>;
 258                                 atmel,adc-startup-time = <40>;
 259                                 atmel,adc-status-register = <0x30>;
 260                                 atmel,adc-trigger-register = <0xc0>;
 261                                 atmel,adc-use-external;
 262                                 atmel,adc-vref = <3000>;
 263                                 atmel,adc-res = <10 12>;
 264                                 atmel,adc-res-names = "lowres", "highres";
 265                                 status = "disabled";
 266
 267                                 trigger@0 {
 268                                         trigger-name = "external-rising";
 269                                         trigger-value = <0x1>;
 270                                         trigger-external;
 271                                 };
 272                                 trigger@1 {
 273                                         trigger-name = "external-falling";
 274                                         trigger-value = <0x2>;
 275                                         trigger-external;
 276                                 };
 277                                 trigger@2 {
 278                                         trigger-name = "external-any";
 279                                         trigger-value = <0x3>;
 280                                         trigger-external;
 281                                 };
 282                                 trigger@3 {
 283                                         trigger-name = "continuous";
 284                                         trigger-value = <0x6>;
 285                                 };
 286                         };
 287
 288                         tsadcc: tsadcc@f8018000 {
 289                                 compatible = "atmel,at91sam9x5-tsadcc";
 290                                 reg = <0xf8018000 0x4000>;
 291                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 292                                 atmel,tsadcc_clock = <300000>;
 293                                 atmel,filtering_average = <0x03>;
 294                                 atmel,pendet_debounce = <0x08>;
 295                                 atmel,pendet_sensitivity = <0x02>;
 296                                 atmel,ts_sample_hold_time = <0x0a>;
 297                                 status = "disabled";
 298                         };
 299
 300                         i2c2: i2c@f801c000 {
 301                                 compatible = "atmel,at91sam9x5-i2c";
 302                                 reg = <0xf801c000 0x4000>;
 303                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
 304                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
 305                                        <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
 306                                 dma-names = "tx", "rx";
 307                                 pinctrl-names = "default";
 308                                 pinctrl-0 = <&pinctrl_i2c2>;
 309                                 #address-cells = <1>;
 310                                 #size-cells = <0>;
 311                                 clocks = <&twi2_clk>;
 312                                 status = "disabled";
 313                         };
 314
 315                         usart2: serial@f8020000 {
 316                                 compatible = "atmel,at91sam9260-usart";
 317                                 reg = <0xf8020000 0x100>;
 318                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 319                                 pinctrl-names = "default";
 320                                 pinctrl-0 = <&pinctrl_usart2>;
 321                                 clocks = <&usart2_clk>;
 322                                 clock-names = "usart";
 323                                 status = "disabled";
 324                         };
 325
 326                         usart3: serial@f8024000 {
 327                                 compatible = "atmel,at91sam9260-usart";
 328                                 reg = <0xf8024000 0x100>;
 329                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 330                                 pinctrl-names = "default";
 331                                 pinctrl-0 = <&pinctrl_usart3>;
 332                                 clocks = <&usart3_clk>;
 333                                 clock-names = "usart";
 334                                 status = "disabled";
 335                         };
 336
 337                         sha@f8034000 {
 338                                 compatible = "atmel,at91sam9g46-sha";
 339                                 reg = <0xf8034000 0x100>;
 340                                 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
 341                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
 342                                 dma-names = "tx";
 343                         };
 344
 345                         aes@f8038000 {
 346                                 compatible = "atmel,at91sam9g46-aes";
 347                                 reg = <0xf8038000 0x100>;
 348                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
 349                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
 350                                        <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
 351                                 dma-names = "tx", "rx";
 352                         };
 353
 354                         tdes@f803c000 {
 355                                 compatible = "atmel,at91sam9g46-tdes";
 356                                 reg = <0xf803c000 0x100>;
 357                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
 358                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
 359                                        <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
 360                                 dma-names = "tx", "rx";
 361                         };
 362
 363                         dma0: dma-controller@ffffe600 {
 364                                 compatible = "atmel,at91sam9g45-dma";
 365                                 reg = <0xffffe600 0x200>;
 366                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
 367                                 #dma-cells = <2>;
 368                                 clocks = <&dma0_clk>;
 369                                 clock-names = "dma_clk";
 370                         };
 371
 372                         dma1: dma-controller@ffffe800 {
 373                                 compatible = "atmel,at91sam9g45-dma";
 374                                 reg = <0xffffe800 0x200>;
 375                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
 376                                 #dma-cells = <2>;
 377                                 clocks = <&dma1_clk>;
 378                                 clock-names = "dma_clk";
 379                         };
 380
 381                         ramc0: ramc@ffffea00 {
 382                                 compatible = "atmel,at91sam9g45-ddramc";
 383                                 reg = <0xffffea00 0x200>;
 384                         };
 385
 386                         dbgu: serial@ffffee00 {
 387                                 compatible = "atmel,at91sam9260-usart";
 388                                 reg = <0xffffee00 0x200>;
 389                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
 390                                 pinctrl-names = "default";
 391                                 pinctrl-0 = <&pinctrl_dbgu>;
 392                                 clocks = <&dbgu_clk>;
 393                                 clock-names = "usart";
 394                                 status = "disabled";
 395                         };
 396
 397                         aic: interrupt-controller@fffff000 {
 398                                 #interrupt-cells = <3>;
 399                                 compatible = "atmel,sama5d3-aic";
 400                                 interrupt-controller;
 401                                 reg = <0xfffff000 0x200>;
 402                                 atmel,external-irqs = <47>;
 403                         };
 404
 405                         pinctrl@fffff200 {
 406                                 #address-cells = <1>;
 407                                 #size-cells = <1>;
 408                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 409                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 410                                 atmel,mux-mask = <
 411                                         /*   A          B          C  */
 412                                         0xffffffff 0xc0fc0000 0xc0ff0000        /* pioA */
 413                                         0xffffffff 0x0ff8ffff 0x00000000        /* pioB */
 414                                         0xffffffff 0xbc00f1ff 0x7c00fc00        /* pioC */
 415                                         0xffffffff 0xc001c0e0 0x0001c1e0        /* pioD */
 416                                         0xffffffff 0xbf9f8000 0x18000000        /* pioE */
 417                                         >;
 418
 419                                 /* shared pinctrl settings */
 420                                 adc0 {
 421                                         pinctrl_adc0_adtrg: adc0_adtrg {
 422                                                 atmel,pins =
 423                                                         <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
 424                                         };
 425                                         pinctrl_adc0_ad0: adc0_ad0 {
 426                                                 atmel,pins =
 427                                                         <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
 428                                         };
 429                                         pinctrl_adc0_ad1: adc0_ad1 {
 430                                                 atmel,pins =
 431                                                         <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
 432                                         };
 433                                         pinctrl_adc0_ad2: adc0_ad2 {
 434                                                 atmel,pins =
 435                                                         <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
 436                                         };
 437                                         pinctrl_adc0_ad3: adc0_ad3 {
 438                                                 atmel,pins =
 439                                                         <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
 440                                         };
 441                                         pinctrl_adc0_ad4: adc0_ad4 {
 442                                                 atmel,pins =
 443                                                         <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
 444                                         };
 445                                         pinctrl_adc0_ad5: adc0_ad5 {
 446                                                 atmel,pins =
 447                                                         <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
 448                                         };
 449                                         pinctrl_adc0_ad6: adc0_ad6 {
 450                                                 atmel,pins =
 451                                                         <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
 452                                         };
 453                                         pinctrl_adc0_ad7: adc0_ad7 {
 454                                                 atmel,pins =
 455                                                         <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
 456                                         };
 457                                         pinctrl_adc0_ad8: adc0_ad8 {
 458                                                 atmel,pins =
 459                                                         <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
 460                                         };
 461                                         pinctrl_adc0_ad9: adc0_ad9 {
 462                                                 atmel,pins =
 463                                                         <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
 464                                         };
 465                                         pinctrl_adc0_ad10: adc0_ad10 {
 466                                                 atmel,pins =
 467                                                         <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
 468                                         };
 469                                         pinctrl_adc0_ad11: adc0_ad11 {
 470                                                 atmel,pins =
 471                                                         <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
 472                                         };
 473                                 };
 474
 475                                 dbgu {
 476                                         pinctrl_dbgu: dbgu-0 {
 477                                                 atmel,pins =
 478                                                         <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB30 periph A */
 479                                                          AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB31 periph A with pullup */
 480                                         };
 481                                 };
 482
 483                                 i2c0 {
 484                                         pinctrl_i2c0: i2c0-0 {
 485                                                 atmel,pins =
 486                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
 487                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
 488                                         };
 489                                 };
 490
 491                                 i2c1 {
 492                                         pinctrl_i2c1: i2c1-0 {
 493                                                 atmel,pins =
 494                                                         <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
 495                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
 496                                         };
 497                                 };
 498
 499                                 i2c2 {
 500                                         pinctrl_i2c2: i2c2-0 {
 501                                                 atmel,pins =
 502                                                         <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
 503                                                          AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
 504                                         };
 505                                 };
 506
 507                                 isi {
 508                                         pinctrl_isi: isi-0 {
 509                                                 atmel,pins =
 510                                                         <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
 511                                                          AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
 512                                                          AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
 513                                                          AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
 514                                                          AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
 515                                                          AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
 516                                                          AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
 517                                                          AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
 518                                                          AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
 519                                                          AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
 520                                                          AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
 521                                                          AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
 522                                                          AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
 523                                         };
 524                                         pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
 525                                                 atmel,pins =
 526                                                         <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
 527                                         };
 528                                 };
 529
 530                                 mmc0 {
 531                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
 532                                                 atmel,pins =
 533                                                         <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A MCI0_CK */
 534                                                          AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
 535                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD1 periph A MCI0_DA0 with pullup */
 536                                         };
 537                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
 538                                                 atmel,pins =
 539                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
 540                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
 541                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD4 periph A MCI0_DA3 with pullup */
 542                                         };
 543                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
 544                                                 atmel,pins =
 545                                                         <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
 546                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
 547                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
 548                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
 549                                         };
 550                                 };
 551
 552                                 mmc1 {
 553                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
 554                                                 atmel,pins =
 555                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A MCI1_CK, conflicts with GRX5 */
 556                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
 557                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
 558                                         };
 559                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
 560                                                 atmel,pins =
 561                                                         <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
 562                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
 563                                                          AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
 564                                         };
 565                                 };
 566
 567                                 nand0 {
 568                                         pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
 569                                                 atmel,pins =
 570                                                         <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PE21 periph A with pullup */
 571                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PE22 periph A with pullup */
 572                                         };
 573                                 };
 574
 575                                 spi0 {
 576                                         pinctrl_spi0: spi0-0 {
 577                                                 atmel,pins =
 578                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A SPI0_MISO pin */
 579                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A SPI0_MOSI pin */
 580                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
 581                                         };
 582                                 };
 583
 584                                 spi1 {
 585                                         pinctrl_spi1: spi1-0 {
 586                                                 atmel,pins =
 587                                                         <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A SPI1_MISO pin */
 588                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A SPI1_MOSI pin */
 589                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
 590                                         };
 591                                 };
 592
 593                                 ssc0 {
 594                                         pinctrl_ssc0_tx: ssc0_tx {
 595                                                 atmel,pins =
 596                                                         <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A TK0 */
 597                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC17 periph A TF0 */
 598                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
 599                                         };
 600
 601                                         pinctrl_ssc0_rx: ssc0_rx {
 602                                                 atmel,pins =
 603                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A RK0 */
 604                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC20 periph A RF0 */
 605                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
 606                                         };
 607                                 };
 608
 609                                 ssc1 {
 610                                         pinctrl_ssc1_tx: ssc1_tx {
 611                                                 atmel,pins =
 612                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB2 periph B TK1, conflicts with GTX2 */
 613                                                          AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B TF1, conflicts with GTX3 */
 614                                                          AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB6 periph B TD1, conflicts with TD1 */
 615                                         };
 616
 617                                         pinctrl_ssc1_rx: ssc1_rx {
 618                                                 atmel,pins =
 619                                                         <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB7 periph B RK1, conflicts with EREFCK */
 620                                                          AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB10 periph B RF1, conflicts with GTXER */
 621                                                          AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
 622                                         };
 623                                 };
 624
 625                                 usart0 {
 626                                         pinctrl_usart0: usart0-0 {
 627                                                 atmel,pins =
 628                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A */
 629                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PD18 periph A with pullup */
 630                                         };
 631
 632                                         pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
 633                                                 atmel,pins =
 634                                                         <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
 635                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
 636                                         };
 637                                 };
 638
 639                                 usart1 {
 640                                         pinctrl_usart1: usart1-0 {
 641                                                 atmel,pins =
 642                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB28 periph A */
 643                                                          AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB29 periph A with pullup */
 644                                         };
 645
 646                                         pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
 647                                                 atmel,pins =
 648                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB26 periph A, conflicts with GRX7 */
 649                                                          AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
 650                                         };
 651                                 };
 652
 653                                 usart2 {
 654                                         pinctrl_usart2: usart2-0 {
 655                                                 atmel,pins =
 656                                                         <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE25 periph B, conflicts with A25 */
 657                                                          AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE26 periph B with pullup, conflicts NCS0 */
 658                                         };
 659
 660                                         pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
 661                                                 atmel,pins =
 662                                                         <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE23 periph B, conflicts with A23 */
 663                                                          AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
 664                                         };
 665                                 };
 666
 667                                 usart3 {
 668                                         pinctrl_usart3: usart3-0 {
 669                                                 atmel,pins =
 670                                                         <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE18 periph B, conflicts with A18 */
 671                                                          AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE19 periph B with pullup, conflicts with A19 */
 672                                         };
 673
 674                                         pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
 675                                                 atmel,pins =
 676                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE16 periph B, conflicts with A16 */
 677                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
 678                                         };
 679                                 };
 680
 681
 682                                 pioA: gpio@fffff200 {
 683                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 684                                         reg = <0xfffff200 0x100>;
 685                                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
 686                                         #gpio-cells = <2>;
 687                                         gpio-controller;
 688                                         interrupt-controller;
 689                                         #interrupt-cells = <2>;
 690                                         clocks = <&pioA_clk>;
 691                                 };
 692
 693                                 pioB: gpio@fffff400 {
 694                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 695                                         reg = <0xfffff400 0x100>;
 696                                         interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
 697                                         #gpio-cells = <2>;
 698                                         gpio-controller;
 699                                         interrupt-controller;
 700                                         #interrupt-cells = <2>;
 701                                         clocks = <&pioB_clk>;
 702                                 };
 703
 704                                 pioC: gpio@fffff600 {
 705                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 706                                         reg = <0xfffff600 0x100>;
 707                                         interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
 708                                         #gpio-cells = <2>;
 709                                         gpio-controller;
 710                                         interrupt-controller;
 711                                         #interrupt-cells = <2>;
 712                                         clocks = <&pioC_clk>;
 713                                 };
 714
 715                                 pioD: gpio@fffff800 {
 716                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 717                                         reg = <0xfffff800 0x100>;
 718                                         interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
 719                                         #gpio-cells = <2>;
 720                                         gpio-controller;
 721                                         interrupt-controller;
 722                                         #interrupt-cells = <2>;
 723                                         clocks = <&pioD_clk>;
 724                                 };
 725
 726                                 pioE: gpio@fffffa00 {
 727                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 728                                         reg = <0xfffffa00 0x100>;
 729                                         interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
 730                                         #gpio-cells = <2>;
 731                                         gpio-controller;
 732                                         interrupt-controller;
 733                                         #interrupt-cells = <2>;
 734                                         clocks = <&pioE_clk>;
 735                                 };
 736                         };
 737
 738                         pmc: pmc@fffffc00 {
 739                                 compatible = "atmel,sama5d3-pmc";
 740                                 reg = <0xfffffc00 0x120>;
 741                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 742                                 interrupt-controller;
 743                                 #address-cells = <1>;
 744                                 #size-cells = <0>;
 745                                 #interrupt-cells = <1>;
 746
 747                                 clk32k: slck {
 748                                         compatible = "fixed-clock";
 749                                         #clock-cells = <0>;
 750                                         clock-frequency = <32768>;
 751                                 };
 752
 753                                 main: mainck {
 754                                         compatible = "atmel,at91rm9200-clk-main";
 755                                         #clock-cells = <0>;
 756                                         interrupt-parent = <&pmc>;
 757                                         interrupts = <AT91_PMC_MOSCS>;
 758                                         clocks = <&clk32k>;
 759                                 };
 760
 761                                 plla: pllack {
 762                                         compatible = "atmel,sama5d3-clk-pll";
 763                                         #clock-cells = <0>;
 764                                         interrupt-parent = <&pmc>;
 765                                         interrupts = <AT91_PMC_LOCKA>;
 766                                         clocks = <&main>;
 767                                         reg = <0>;
 768                                         atmel,clk-input-range = <8000000 50000000>;
 769                                         #atmel,pll-clk-output-range-cells = <4>;
 770                                         atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
 771                                 };
 772
 773                                 plladiv: plladivck {
 774                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 775                                         #clock-cells = <0>;
 776                                         clocks = <&plla>;
 777                                 };
 778
 779                                 utmi: utmick {
 780                                         compatible = "atmel,at91sam9x5-clk-utmi";
 781                                         #clock-cells = <0>;
 782                                         interrupt-parent = <&pmc>;
 783                                         interrupts = <AT91_PMC_LOCKU>;
 784                                         clocks = <&main>;
 785                                 };
 786
 787                                 mck: masterck {
 788                                         compatible = "atmel,at91sam9x5-clk-master";
 789                                         #clock-cells = <0>;
 790                                         interrupt-parent = <&pmc>;
 791                                         interrupts = <AT91_PMC_MCKRDY>;
 792                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 793                                         atmel,clk-output-range = <0 166000000>;
 794                                         atmel,clk-divisors = <1 2 4 3>;
 795                                 };
 796
 797                                 usb: usbck {
 798                                         compatible = "atmel,at91sam9x5-clk-usb";
 799                                         #clock-cells = <0>;
 800                                         clocks = <&plladiv>, <&utmi>;
 801                                 };
 802
 803                                 prog: progck {
 804                                         compatible = "atmel,at91sam9x5-clk-programmable";
 805                                         #address-cells = <1>;
 806                                         #size-cells = <0>;
 807                                         interrupt-parent = <&pmc>;
 808                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 809
 810                                         prog0: prog0 {
 811                                                 #clock-cells = <0>;
 812                                                 reg = <0>;
 813                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 814                                         };
 815
 816                                         prog1: prog1 {
 817                                                 #clock-cells = <0>;
 818                                                 reg = <1>;
 819                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 820                                         };
 821
 822                                         prog2: prog2 {
 823                                                 #clock-cells = <0>;
 824                                                 reg = <2>;
 825                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
 826                                         };
 827                                 };
 828
 829                                 smd: smdclk {
 830                                         compatible = "atmel,at91sam9x5-clk-smd";
 831                                         #clock-cells = <0>;
 832                                         clocks = <&plladiv>, <&utmi>;
 833                                 };
 834
 835                                 systemck {
 836                                         compatible = "atmel,at91rm9200-clk-system";
 837                                         #address-cells = <1>;
 838                                         #size-cells = <0>;
 839
 840                                         ddrck: ddrck {
 841                                                 #clock-cells = <0>;
 842                                                 reg = <2>;
 843                                                 clocks = <&mck>;
 844                                         };
 845
 846                                         smdck: smdck {
 847                                                 #clock-cells = <0>;
 848                                                 reg = <4>;
 849                                                 clocks = <&smd>;
 850                                         };
 851
 852                                         uhpck: uhpck {
 853                                                 #clock-cells = <0>;
 854                                                 reg = <6>;
 855                                                 clocks = <&usb>;
 856                                         };
 857
 858                                         udpck: udpck {
 859                                                 #clock-cells = <0>;
 860                                                 reg = <7>;
 861                                                 clocks = <&usb>;
 862                                         };
 863
 864                                         pck0: pck0 {
 865                                                 #clock-cells = <0>;
 866                                                 reg = <8>;
 867                                                 clocks = <&prog0>;
 868                                         };
 869
 870                                         pck1: pck1 {
 871                                                 #clock-cells = <0>;
 872                                                 reg = <9>;
 873                                                 clocks = <&prog1>;
 874                                         };
 875
 876                                         pck2: pck2 {
 877                                                 #clock-cells = <0>;
 878                                                 reg = <10>;
 879                                                 clocks = <&prog2>;
 880                                         };
 881                                 };
 882
 883                                 periphck {
 884                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 885                                         #address-cells = <1>;
 886                                         #size-cells = <0>;
 887                                         clocks = <&mck>;
 888
 889                                         dbgu_clk: dbgu_clk {
 890                                                 #clock-cells = <0>;
 891                                                 reg = <2>;
 892                                         };
 893
 894                                         pioA_clk: pioA_clk {
 895                                                 #clock-cells = <0>;
 896                                                 reg = <6>;
 897                                         };
 898
 899                                         pioB_clk: pioB_clk {
 900                                                 #clock-cells = <0>;
 901                                                 reg = <7>;
 902                                         };
 903
 904                                         pioC_clk: pioC_clk {
 905                                                 #clock-cells = <0>;
 906                                                 reg = <8>;
 907                                         };
 908
 909                                         pioD_clk: pioD_clk {
 910                                                 #clock-cells = <0>;
 911                                                 reg = <9>;
 912                                         };
 913
 914                                         pioE_clk: pioE_clk {
 915                                                 #clock-cells = <0>;
 916                                                 reg = <10>;
 917                                         };
 918
 919                                         usart0_clk: usart0_clk {
 920                                                 #clock-cells = <0>;
 921                                                 reg = <12>;
 922                                                 atmel,clk-output-range = <0 66000000>;
 923                                         };
 924
 925                                         usart1_clk: usart1_clk {
 926                                                 #clock-cells = <0>;
 927                                                 reg = <13>;
 928                                                 atmel,clk-output-range = <0 66000000>;
 929                                         };
 930
 931                                         usart2_clk: usart2_clk {
 932                                                 #clock-cells = <0>;
 933                                                 reg = <14>;
 934                                                 atmel,clk-output-range = <0 66000000>;
 935                                         };
 936
 937                                         usart3_clk: usart3_clk {
 938                                                 #clock-cells = <0>;
 939                                                 reg = <15>;
 940                                                 atmel,clk-output-range = <0 66000000>;
 941                                         };
 942
 943                                         twi0_clk: twi0_clk {
 944                                                 reg = <18>;
 945                                                 #clock-cells = <0>;
 946                                                 atmel,clk-output-range = <0 16625000>;
 947                                         };
 948
 949                                         twi1_clk: twi1_clk {
 950                                                 #clock-cells = <0>;
 951                                                 reg = <19>;
 952                                                 atmel,clk-output-range = <0 16625000>;
 953                                         };
 954
 955                                         twi2_clk: twi2_clk {
 956                                                 #clock-cells = <0>;
 957                                                 reg = <20>;
 958                                                 atmel,clk-output-range = <0 16625000>;
 959                                         };
 960
 961                                         mci0_clk: mci0_clk {
 962                                                 #clock-cells = <0>;
 963                                                 reg = <21>;
 964                                         };
 965
 966                                         mci1_clk: mci1_clk {
 967                                                 #clock-cells = <0>;
 968                                                 reg = <22>;
 969                                         };
 970
 971                                         spi0_clk: spi0_clk {
 972                                                 #clock-cells = <0>;
 973                                                 reg = <24>;
 974                                                 atmel,clk-output-range = <0 133000000>;
 975                                         };
 976
 977                                         spi1_clk: spi1_clk {
 978                                                 #clock-cells = <0>;
 979                                                 reg = <25>;
 980                                                 atmel,clk-output-range = <0 133000000>;
 981                                         };
 982
 983                                         tcb0_clk: tcb0_clk {
 984                                                 #clock-cells = <0>;
 985                                                 reg = <26>;
 986                                                 atmel,clk-output-range = <0 133000000>;
 987                                         };
 988
 989                                         pwm_clk: pwm_clk {
 990                                                 #clock-cells = <0>;
 991                                                 reg = <28>;
 992                                         };
 993
 994                                         adc_clk: adc_clk {
 995                                                 #clock-cells = <0>;
 996                                                 reg = <29>;
 997                                                 atmel,clk-output-range = <0 66000000>;
 998                                         };
 999
1000                                         dma0_clk: dma0_clk {
1001                                                 #clock-cells = <0>;
1002                                                 reg = <30>;
1003                                         };
1004
1005                                         dma1_clk: dma1_clk {
1006                                                 #clock-cells = <0>;
1007                                                 reg = <31>;
1008                                         };
1009
1010                                         uhphs_clk: uhphs_clk {
1011                                                 #clock-cells = <0>;
1012                                                 reg = <32>;
1013                                         };
1014
1015                                         udphs_clk: udphs_clk {
1016                                                 #clock-cells = <0>;
1017                                                 reg = <33>;
1018                                         };
1019
1020                                         isi_clk: isi_clk {
1021                                                 #clock-cells = <0>;
1022                                                 reg = <37>;
1023                                         };
1024
1025                                         ssc0_clk: ssc0_clk {
1026                                                 #clock-cells = <0>;
1027                                                 reg = <38>;
1028                                                 atmel,clk-output-range = <0 66000000>;
1029                                         };
1030
1031                                         ssc1_clk: ssc1_clk {
1032                                                 #clock-cells = <0>;
1033                                                 reg = <39>;
1034                                                 atmel,clk-output-range = <0 66000000>;
1035                                         };
1036
1037                                         sha_clk: sha_clk {
1038                                                 #clock-cells = <0>;
1039                                                 reg = <42>;
1040                                         };
1041
1042                                         aes_clk: aes_clk {
1043                                                 #clock-cells = <0>;
1044                                                 reg = <43>;
1045                                         };
1046
1047                                         tdes_clk: tdes_clk {
1048                                                 #clock-cells = <0>;
1049                                                 reg = <44>;
1050                                         };
1051
1052                                         trng_clk: trng_clk {
1053                                                 #clock-cells = <0>;
1054                                                 reg = <45>;
1055                                         };
1056
1057                                         fuse_clk: fuse_clk {
1058                                                 #clock-cells = <0>;
1059                                                 reg = <48>;
1060                                         };
1061                                 };
1062                         };
1063
1064                         rstc@fffffe00 {
1065                                 compatible = "atmel,at91sam9g45-rstc";
1066                                 reg = <0xfffffe00 0x10>;
1067                         };
1068
1069                         pit: timer@fffffe30 {
1070                                 compatible = "atmel,at91sam9260-pit";
1071                                 reg = <0xfffffe30 0xf>;
1072                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1073                                 clocks = <&mck>;
1074                         };
1075
1076                         watchdog@fffffe40 {
1077                                 compatible = "atmel,at91sam9260-wdt";
1078                                 reg = <0xfffffe40 0x10>;
1079                                 status = "disabled";
1080                         };
1081
1082                         rtc@fffffeb0 {
1083                                 compatible = "atmel,at91rm9200-rtc";
1084                                 reg = <0xfffffeb0 0x30>;
1085                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1086                         };
1087                 };
1088
1089                 usb0: gadget@00500000 {
1090                         #address-cells = <1>;
1091                         #size-cells = <0>;
1092                         compatible = "atmel,at91sam9rl-udc";
1093                         reg = <0x00500000 0x100000
1094                                0xf8030000 0x4000>;
1095                         interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1096                         clocks = <&udphs_clk>, <&utmi>;
1097                         clock-names = "pclk", "hclk";
1098                         status = "disabled";
1099
1100                         ep0 {
1101                                 reg = <0>;
1102                                 atmel,fifo-size = <64>;
1103                                 atmel,nb-banks = <1>;
1104                         };
1105
1106                         ep1 {
1107                                 reg = <1>;
1108                                 atmel,fifo-size = <1024>;
1109                                 atmel,nb-banks = <3>;
1110                                 atmel,can-dma;
1111                                 atmel,can-isoc;
1112                         };
1113
1114                         ep2 {
1115                                 reg = <2>;
1116                                 atmel,fifo-size = <1024>;
1117                                 atmel,nb-banks = <3>;
1118                                 atmel,can-dma;
1119                                 atmel,can-isoc;
1120                         };
1121
1122                         ep3 {
1123                                 reg = <3>;
1124                                 atmel,fifo-size = <1024>;
1125                                 atmel,nb-banks = <2>;
1126                                 atmel,can-dma;
1127                         };
1128
1129                         ep4 {
1130                                 reg = <4>;
1131                                 atmel,fifo-size = <1024>;
1132                                 atmel,nb-banks = <2>;
1133                                 atmel,can-dma;
1134                         };
1135
1136                         ep5 {
1137                                 reg = <5>;
1138                                 atmel,fifo-size = <1024>;
1139                                 atmel,nb-banks = <2>;
1140                                 atmel,can-dma;
1141                         };
1142
1143                         ep6 {
1144                                 reg = <6>;
1145                                 atmel,fifo-size = <1024>;
1146                                 atmel,nb-banks = <2>;
1147                                 atmel,can-dma;
1148                         };
1149
1150                         ep7 {
1151                                 reg = <7>;
1152                                 atmel,fifo-size = <1024>;
1153                                 atmel,nb-banks = <2>;
1154                                 atmel,can-dma;
1155                         };
1156
1157                         ep8 {
1158                                 reg = <8>;
1159                                 atmel,fifo-size = <1024>;
1160                                 atmel,nb-banks = <2>;
1161                         };
1162
1163                         ep9 {
1164                                 reg = <9>;
1165                                 atmel,fifo-size = <1024>;
1166                                 atmel,nb-banks = <2>;
1167                         };
1168
1169                         ep10 {
1170                                 reg = <10>;
1171                                 atmel,fifo-size = <1024>;
1172                                 atmel,nb-banks = <2>;
1173                         };
1174
1175                         ep11 {
1176                                 reg = <11>;
1177                                 atmel,fifo-size = <1024>;
1178                                 atmel,nb-banks = <2>;
1179                         };
1180
1181                         ep12 {
1182                                 reg = <12>;
1183                                 atmel,fifo-size = <1024>;
1184                                 atmel,nb-banks = <2>;
1185                         };
1186
1187                         ep13 {
1188                                 reg = <13>;
1189                                 atmel,fifo-size = <1024>;
1190                                 atmel,nb-banks = <2>;
1191                         };
1192
1193                         ep14 {
1194                                 reg = <14>;
1195                                 atmel,fifo-size = <1024>;
1196                                 atmel,nb-banks = <2>;
1197                         };
1198
1199                         ep15 {
1200                                 reg = <15>;
1201                                 atmel,fifo-size = <1024>;
1202                                 atmel,nb-banks = <2>;
1203                         };
1204                 };
1205
1206                 usb1: ohci@00600000 {
1207                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1208                         reg = <0x00600000 0x100000>;
1209                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1210                         clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
1211                                  <&uhpck>;
1212                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1213                         status = "disabled";
1214                 };
1215
1216                 usb2: ehci@00700000 {
1217                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1218                         reg = <0x00700000 0x100000>;
1219                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1220                         clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1221                         clock-names = "usb_clk", "ehci_clk", "uhpck";
1222                         status = "disabled";
1223                 };
1224
1225                 nand0: nand@60000000 {
1226                         compatible = "atmel,at91rm9200-nand";
1227                         #address-cells = <1>;
1228                         #size-cells = <1>;
1229                         ranges;
1230                         reg = < 0x60000000 0x01000000   /* EBI CS3 */
1231                                 0xffffc070 0x00000490   /* SMC PMECC regs */
1232                                 0xffffc500 0x00000100   /* SMC PMECC Error Location regs */
1233                                 0x00110000 0x00018000   /* ROM code */
1234                                 >;
1235                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1236                         atmel,nand-addr-offset = <21>;
1237                         atmel,nand-cmd-offset = <22>;
1238                         pinctrl-names = "default";
1239                         pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1240                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1241                         status = "disabled";
1242
1243                         nfc@70000000 {
1244                                 compatible = "atmel,sama5d3-nfc";
1245                                 #address-cells = <1>;
1246                                 #size-cells = <1>;
1247                                 reg = <
1248                                         0x70000000 0x10000000   /* NFC Command Registers */
1249                                         0xffffc000 0x00000070   /* NFC HSMC regs */
1250                                         0x00200000 0x00100000   /* NFC SRAM banks */
1251                                         >;
1252                         };
1253                 };
1254         };
1255 };