4 * Versatile Express (VE) system model
7 * RTSM_VE_Cortex_A15x4_A7x4.lisa
12 /memreserve/ 0xff000000 0x01000000;
15 model = "RTSM_VE_CortexA15x4-A7x4";
16 arm,vexpress,site = <0xf>;
17 compatible = "arm,rtsm_ve,cortex_a15x4_a7x4", "arm,vexpress";
18 interrupt-parent = <&gic>;
25 serial0 = &v2m_serial0;
26 serial1 = &v2m_serial1;
27 serial2 = &v2m_serial2;
28 serial3 = &v2m_serial3;
37 // freqs = <500000000 600000000 700000000 800000000 900000000 1000000000 1100000000 1200000000>;
63 // freqs = <350000000 400000000 500000000 600000000 700000000 800000000 900000000 1000000000>;
94 compatible = "arm,cortex-a15";
96 cluster = <&cluster0>;
98 // clock-frequency = <1000000000>;
99 cci-control-port = <&cci_control1>;
104 compatible = "arm,cortex-a15";
106 cluster = <&cluster0>;
108 // clock-frequency = <1000000000>;
109 cci-control-port = <&cci_control1>;
114 compatible = "arm,cortex-a15";
116 cluster = <&cluster0>;
118 // clock-frequency = <1000000000>;
119 cci-control-port = <&cci_control1>;
124 compatible = "arm,cortex-a15";
126 cluster = <&cluster0>;
128 // clock-frequency = <1000000000>;
129 cci-control-port = <&cci_control1>;
134 compatible = "arm,cortex-a7";
136 cluster = <&cluster1>;
138 // clock-frequency = <800000000>;
139 cci-control-port = <&cci_control2>;
144 compatible = "arm,cortex-a7";
146 cluster = <&cluster1>;
148 // clock-frequency = <800000000>;
149 cci-control-port = <&cci_control2>;
154 compatible = "arm,cortex-a7";
156 cluster = <&cluster1>;
158 // clock-frequency = <800000000>;
159 cci-control-port = <&cci_control2>;
164 compatible = "arm,cortex-a7";
166 cluster = <&cluster1>;
168 // clock-frequency = <800000000>;
169 cci-control-port = <&cci_control2>;
174 device_type = "memory";
175 reg = <0 0x80000000 0 0x80000000>;
179 compatible = "arm,cci-400", "arm,cci";
180 #address-cells = <1>;
182 reg = <0 0x2c090000 0 0x1000>;
183 ranges = <0x0 0x0 0x2c090000 0x10000>;
185 cci_control1: slave-if@4000 {
186 compatible = "arm,cci-400-ctrl-if";
187 interface-type = "ace";
188 reg = <0x4000 0x1000>;
191 cci_control2: slave-if@5000 {
192 compatible = "arm,cci-400-ctrl-if";
193 interface-type = "ace";
194 reg = <0x5000 0x1000>;
199 compatible = "arm,rtsm,dcscb";
200 reg = <0 0x60000000 0 0x1000>;
203 gic: interrupt-controller@2c001000 {
204 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
205 #interrupt-cells = <3>;
206 #address-cells = <0>;
207 interrupt-controller;
208 reg = <0 0x2c001000 0 0x1000>,
209 <0 0x2c002000 0 0x1000>,
210 <0 0x2c004000 0 0x2000>,
211 <0 0x2c006000 0 0x2000>;
212 interrupts = <1 9 0xf04>;
215 compatible = "arm,gic-cpuif";
220 compatible = "arm,gic-cpuif";
225 compatible = "arm,gic-cpuif";
230 compatible = "arm,gic-cpuif";
235 compatible = "arm,gic-cpuif";
240 compatible = "arm,gic-cpuif";
245 compatible = "arm,gic-cpuif";
250 compatible = "arm,gic-cpuif";
257 compatible = "arm,armv7-timer";
258 interrupts = <1 13 0xf08>,
265 compatible = "arm,vexpress,config-bus";
266 arm,vexpress,config-bridge = <&v2m_sysreg>;
269 /* ACLK clock to the AXI master port on the test chip */
270 compatible = "arm,vexpress-osc";
271 arm,vexpress-sysreg,func = <1 0>;
272 freq-range = <30000000 50000000>;
274 clock-output-names = "extsaxiclk";
278 /* Reference clock for the CLCD */
279 compatible = "arm,vexpress-osc";
280 arm,vexpress-sysreg,func = <1 1>;
281 freq-range = <10000000 80000000>;
283 clock-output-names = "clcdclk";
286 smbclk: oscclk2: osc@2 {
287 /* Reference clock for the test chip internal PLLs */
288 compatible = "arm,vexpress-osc";
289 arm,vexpress-sysreg,func = <1 2>;
290 freq-range = <33000000 100000000>;
292 clock-output-names = "tcrefclk";
297 compatible = "simple-bus";
299 #address-cells = <2>;
301 ranges = <0 0 0 0x08000000 0x04000000>,
302 <1 0 0 0x14000000 0x04000000>,
303 <2 0 0 0x18000000 0x04000000>,
304 <3 0 0 0x1c000000 0x04000000>,
305 <4 0 0 0x0c000000 0x04000000>,
306 <5 0 0 0x10000000 0x04000000>;
308 #interrupt-cells = <1>;
309 interrupt-map-mask = <0 0 63>;
310 interrupt-map = <0 0 0 &gic 0 0 4>,
320 <0 0 10 &gic 0 10 4>,
321 <0 0 11 &gic 0 11 4>,
322 <0 0 12 &gic 0 12 4>,
323 <0 0 13 &gic 0 13 4>,
324 <0 0 14 &gic 0 14 4>,
325 <0 0 15 &gic 0 15 4>,
326 <0 0 16 &gic 0 16 4>,
327 <0 0 17 &gic 0 17 4>,
328 <0 0 18 &gic 0 18 4>,
329 <0 0 19 &gic 0 19 4>,
330 <0 0 20 &gic 0 20 4>,
331 <0 0 21 &gic 0 21 4>,
332 <0 0 22 &gic 0 22 4>,
333 <0 0 23 &gic 0 23 4>,
334 <0 0 24 &gic 0 24 4>,
335 <0 0 25 &gic 0 25 4>,
336 <0 0 26 &gic 0 26 4>,
337 <0 0 27 &gic 0 27 4>,
338 <0 0 28 &gic 0 28 4>,
339 <0 0 29 &gic 0 29 4>,
340 <0 0 30 &gic 0 30 4>,
341 <0 0 31 &gic 0 31 4>,
342 <0 0 32 &gic 0 32 4>,
343 <0 0 33 &gic 0 33 4>,
344 <0 0 34 &gic 0 34 4>,
345 <0 0 35 &gic 0 35 4>,
346 <0 0 36 &gic 0 36 4>,
347 <0 0 37 &gic 0 37 4>,
348 <0 0 38 &gic 0 38 4>,
349 <0 0 39 &gic 0 39 4>,
350 <0 0 40 &gic 0 40 4>,
351 <0 0 41 &gic 0 41 4>,
352 <0 0 42 &gic 0 42 4>;
354 /include/ "rtsm_ve-motherboard.dtsi"
358 /include/ "clcd-panels.dtsi"