4 * Versatile Express (VE) system model
7 * RTSM_VE_Cortex_A9x4.lisa
13 model = "RTSM_VE_CortexA9x4";
14 arm,vexpress,site = <0xf>;
15 compatible = "arm,rtsm_ve,cortex_a9x4", "arm,vexpress";
16 interrupt-parent = <&gic>;
23 serial0 = &v2m_serial0;
24 serial1 = &v2m_serial1;
25 serial2 = &v2m_serial2;
26 serial3 = &v2m_serial3;
35 compatible = "arm,cortex-a9";
41 compatible = "arm,cortex-a9";
47 compatible = "arm,cortex-a9";
53 compatible = "arm,cortex-a9";
59 device_type = "memory";
60 reg = <0x80000000 0x80000000>;
64 compatible = "arm,cortex-a9-scu";
65 reg = <0x2c000000 0x58>;
69 compatible = "arm,cortex-a9-twd-timer";
70 reg = <0x2c000600 0x20>;
71 interrupts = <1 13 0xf04>;
75 compatible = "arm,cortex-a9-twd-wdt";
76 reg = <0x2c000620 0x20>;
77 interrupts = <1 14 0xf04>;
80 gic: interrupt-controller@2c001000 {
81 compatible = "arm,cortex-a9-gic";
82 #interrupt-cells = <3>;
85 reg = <0x2c001000 0x1000>,
90 compatible = "arm,vexpress,config-bus";
91 arm,vexpress,config-bridge = <&v2m_sysreg>;
94 /* ACLK clock to the AXI master port on the test chip */
95 compatible = "arm,vexpress-osc";
96 arm,vexpress-sysreg,func = <1 0>;
97 freq-range = <30000000 50000000>;
99 clock-output-names = "extsaxiclk";
103 /* Reference clock for the CLCD */
104 compatible = "arm,vexpress-osc";
105 arm,vexpress-sysreg,func = <1 1>;
106 freq-range = <10000000 80000000>;
108 clock-output-names = "clcdclk";
111 smbclk: oscclk2: osc@2 {
112 /* Reference clock for the test chip internal PLLs */
113 compatible = "arm,vexpress-osc";
114 arm,vexpress-sysreg,func = <1 2>;
115 freq-range = <33000000 100000000>;
117 clock-output-names = "tcrefclk";
122 compatible = "simple-bus";
124 #address-cells = <2>;
126 ranges = <0 0 0x08000000 0x04000000>,
127 <1 0 0x14000000 0x04000000>,
128 <2 0 0x18000000 0x04000000>,
129 <3 0 0x1c000000 0x04000000>,
130 <4 0 0x0c000000 0x04000000>,
131 <5 0 0x10000000 0x04000000>;
133 #interrupt-cells = <1>;
134 interrupt-map-mask = <0 0 63>;
135 interrupt-map = <0 0 0 &gic 0 0 4>,
145 <0 0 10 &gic 0 10 4>,
146 <0 0 11 &gic 0 11 4>,
147 <0 0 12 &gic 0 12 4>,
148 <0 0 13 &gic 0 13 4>,
149 <0 0 14 &gic 0 14 4>,
150 <0 0 15 &gic 0 15 4>,
151 <0 0 16 &gic 0 16 4>,
152 <0 0 17 &gic 0 17 4>,
153 <0 0 18 &gic 0 18 4>,
154 <0 0 19 &gic 0 19 4>,
155 <0 0 20 &gic 0 20 4>,
156 <0 0 21 &gic 0 21 4>,
157 <0 0 22 &gic 0 22 4>,
158 <0 0 23 &gic 0 23 4>,
159 <0 0 24 &gic 0 24 4>,
160 <0 0 25 &gic 0 25 4>,
161 <0 0 26 &gic 0 26 4>,
162 <0 0 27 &gic 0 27 4>,
163 <0 0 28 &gic 0 28 4>,
164 <0 0 29 &gic 0 29 4>,
165 <0 0 30 &gic 0 30 4>,
166 <0 0 31 &gic 0 31 4>,
167 <0 0 32 &gic 0 32 4>,
168 <0 0 33 &gic 0 33 4>,
169 <0 0 34 &gic 0 34 4>,
170 <0 0 35 &gic 0 35 4>,
171 <0 0 36 &gic 0 36 4>,
172 <0 0 37 &gic 0 37 4>,
173 <0 0 38 &gic 0 38 4>,
174 <0 0 39 &gic 0 39 4>,
175 <0 0 40 &gic 0 40 4>,
176 <0 0 41 &gic 0 41 4>,
177 <0 0 42 &gic 0 42 4>;
179 /include/ "rtsm_ve-motherboard.dtsi"
183 /include/ "clcd-panels.dtsi"