1 #include <dt-bindings/interrupt-controller/arm-gic.h>
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/pinctrl/rockchip.h>
4 #include <dt-bindings/pinctrl/rockchip-rk3288.h>
8 compatible = "rockchip,rk3288-pinctrl";
9 reg = <0xff770000 0x140>,
12 reg-names = "base", "pull", "drv";
17 gpio0: gpio0@ff750000 {
18 compatible = "rockchip,rk3288-gpio-bank0";
19 reg = <0xff750000 0x100>,
23 reg-names = "base", "mux_bank0", "pull_bank0", "drv_bank0";
24 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
25 //clocks = <&clk_gates8 9>;
31 #interrupt-cells = <2>;
34 gpio1: gpio1@ff780000 {
35 compatible = "rockchip,gpio-bank";
36 reg = <0xff780000 0x100>;
37 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
38 //clocks = <&clk_gates8 10>;
44 #interrupt-cells = <2>;
47 gpio2: gpio2@ff790000 {
48 compatible = "rockchip,gpio-bank";
49 reg = <0xff790000 0x100>;
50 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
51 //clocks = <&clk_gates8 11>;
57 #interrupt-cells = <2>;
60 gpio3: gpio3@ff7a0000 {
61 compatible = "rockchip,gpio-bank";
62 reg = <0xff7a0000 0x100>;
63 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
64 //clocks = <&clk_gates8 12>;
70 #interrupt-cells = <2>;
73 gpio4: gpio4@ff7b0000 {
74 compatible = "rockchip,gpio-bank";
75 reg = <0xff7b0000 0x100>;
76 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
77 //clocks = <&clk_gates8 12>;
83 #interrupt-cells = <2>;
86 gpio5: gpio5@ff7c0000 {
87 compatible = "rockchip,gpio-bank";
88 reg = <0xff7c0000 0x100>;
89 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
90 //clocks = <&clk_gates8 12>;
96 #interrupt-cells = <2>;
99 gpio6: gpio6@ff7d0000 {
100 compatible = "rockchip,gpio-bank";
101 reg = <0xff7d0000 0x100>;
102 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
103 //clocks = <&clk_gates8 12>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
112 gpio7: gpio7@ff7e0000 {
113 compatible = "rockchip,gpio-bank";
114 reg = <0xff7e0000 0x100>;
115 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
116 //clocks = <&clk_gates8 12>;
121 interrupt-controller;
122 #interrupt-cells = <2>;
125 gpio8: gpio8@ff7f0000 {
126 compatible = "rockchip,gpio-bank";
127 reg = <0xff7f0000 0x100>;
128 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
129 //clocks = <&clk_gates8 12>;
134 interrupt-controller;
135 #interrupt-cells = <2>;
138 gpio15: gpio15@ff7f2000 {
139 compatible = "rockchip,gpio-bank";
140 reg = <0xff7f2000 0x100>;
141 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
146 interrupt-controller;
147 #interrupt-cells = <2>;
150 pcfg_pull_up: pcfg_pull_up {
154 pcfg_pull_down: pcfg_pull_down {
158 pcfg_pull_none: pcfg_pull_none {
163 uart0_xfer: uart0-xfer {
164 rockchip,pins = <UART0BT_SIN>,
166 rockchip,pull = <VALUE_PULL_DISABLE>;
167 rockchip,voltage = <VALUE_VOL_DEFAULT>;
168 rockchip,drive = <VALUE_DRV_DEFAULT>;
169 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
172 uart0_cts: uart0-cts {
173 rockchip,pins = <UART0BT_CTSN>;
174 rockchip,pull = <VALUE_PULL_DISABLE>;
175 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
176 rockchip,drive = <VALUE_DRV_DEFAULT>;
177 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
180 uart0_rts: uart0-rts {
181 rockchip,pins = <UART0BT_RTSN>;
182 rockchip,pull = <VALUE_PULL_DISABLE>;
183 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
184 rockchip,drive = <VALUE_DRV_DEFAULT>;
185 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
190 uart1_xfer: uart1-xfer {
191 rockchip,pins = <UART1BB_SIN>,
193 rockchip,pull = <VALUE_PULL_DISABLE>;
194 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
195 rockchip,drive = <VALUE_DRV_DEFAULT>;
196 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
199 uart1_cts: uart1-cts {
200 rockchip,pins = <UART1BB_CTSN>;
201 rockchip,pull = <VALUE_PULL_DISABLE>;
202 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
203 rockchip,drive = <VALUE_DRV_DEFAULT>;
204 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
207 uart1_rts: uart1-rts {
208 rockchip,pins = <UART1BB_RTSN>;
209 rockchip,pull = <VALUE_PULL_DISABLE>;
210 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
211 rockchip,drive = <VALUE_DRV_DEFAULT>;
212 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
217 uart2_xfer: uart2-xfer {
218 rockchip,pins = <UART2DBG_SIN>,
220 rockchip,pull = <VALUE_PULL_DISABLE>;
221 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
222 rockchip,drive = <VALUE_DRV_DEFAULT>;
223 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
225 /* no rts / cts for uart2 */
229 uart3_xfer: uart3-xfer {
230 rockchip,pins = <UART3GPS_SIN>,
232 rockchip,pull = <VALUE_PULL_DISABLE>;
233 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
234 rockchip,drive = <VALUE_DRV_DEFAULT>;
235 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
238 uart3_cts: uart3-cts {
239 rockchip,pins = <UART3GPS_CTSN>;
240 rockchip,pull = <VALUE_PULL_DISABLE>;
241 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
242 rockchip,drive = <VALUE_DRV_DEFAULT>;
243 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
246 uart3_rts: uart3-rts {
247 rockchip,pins = <UART3GPS_RTSN>;
248 rockchip,pull = <VALUE_PULL_DISABLE>;
249 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
250 rockchip,drive = <VALUE_DRV_DEFAULT>;
251 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
257 rockchip,pins = <I2C0PMU_SDA>;
258 rockchip,pull = <VALUE_PULL_DISABLE>;
259 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
260 rockchip,drive = <VALUE_DRV_DEFAULT>;
261 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
265 rockchip,pins = <I2C0PMU_SCL>;
266 rockchip,pull = <VALUE_PULL_DISABLE>;
267 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
268 rockchip,drive = <VALUE_DRV_DEFAULT>;
269 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
272 i2c0_gpio: i2c0-gpio {
273 rockchip,pins = <FUNC_TO_GPIO(I2C0PMU_SDA)>, <FUNC_TO_GPIO(I2C0PMU_SCL)>;
274 rockchip,drive = <VALUE_DRV_DEFAULT>;
280 rockchip,pins = <I2C1SENSOR_SDA>;
281 rockchip,pull = <VALUE_PULL_DISABLE>;
282 rockchip,voltage = <VALUE_VOL_DEFAULT>;
283 rockchip,drive = <VALUE_DRV_DEFAULT>;
284 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
288 rockchip,pins = <I2C1SENSOR_SCL>;
289 rockchip,pull = <VALUE_PULL_DISABLE>;
290 rockchip,voltage = <VALUE_VOL_DEFAULT>;
291 rockchip,drive = <VALUE_DRV_DEFAULT>;
292 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
295 i2c1_gpio: i2c1-gpio {
296 rockchip,pins = <FUNC_TO_GPIO(I2C1SENSOR_SDA)>, <FUNC_TO_GPIO(I2C1SENSOR_SCL)>;
297 rockchip,drive = <VALUE_DRV_DEFAULT>;
303 rockchip,pins = <I2C2AUDIO_SDA>;
304 rockchip,pull = <VALUE_PULL_DISABLE>;
305 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
306 rockchip,drive = <VALUE_DRV_DEFAULT>;
307 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
311 rockchip,pins = <I2C2AUDIO_SCL>;
312 rockchip,pull = <VALUE_PULL_DISABLE>;
313 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
314 rockchip,drive = <VALUE_DRV_DEFAULT>;
315 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
318 i2c2_gpio: i2c2-gpio {
319 rockchip,pins = <FUNC_TO_GPIO(I2C2AUDIO_SDA)>, <FUNC_TO_GPIO(I2C2AUDIO_SCL)>;
320 rockchip,drive = <VALUE_DRV_DEFAULT>;
326 rockchip,pins = <I2C3CAM_SDA>;
327 rockchip,pull = <VALUE_PULL_DISABLE>;
328 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
329 rockchip,drive = <VALUE_DRV_DEFAULT>;
330 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
334 rockchip,pins = <I2C3CAM_SCL>;
335 rockchip,pull = <VALUE_PULL_DISABLE>;
336 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
337 rockchip,drive = <VALUE_DRV_DEFAULT>;
338 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
341 i2c3_gpio: i2c3-gpio {
342 rockchip,pins = <FUNC_TO_GPIO(I2C3CAM_SDA)>, <FUNC_TO_GPIO(I2C3CAM_SCL)>;
343 rockchip,drive = <VALUE_DRV_DEFAULT>;
349 rockchip,pins = <I2C4TP_SDA>;
350 rockchip,pull = <VALUE_PULL_DISABLE>;
351 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
352 rockchip,drive = <VALUE_DRV_DEFAULT>;
353 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
357 rockchip,pins = <I2C4TP_SCL>;
358 rockchip,pull = <VALUE_PULL_DISABLE>;
359 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
360 rockchip,drive = <VALUE_DRV_DEFAULT>;
361 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
364 i2c4_gpio: i2c4-gpio {
365 rockchip,pins = <FUNC_TO_GPIO(I2C4TP_SDA)>, <FUNC_TO_GPIO(I2C4TP_SCL)>;
366 rockchip,drive = <VALUE_DRV_DEFAULT>;
372 rockchip,pins = <I2C5HDMI_SDA>;
373 rockchip,pull = <VALUE_PULL_DISABLE>;
374 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
375 rockchip,drive = <VALUE_DRV_DEFAULT>;
376 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
380 rockchip,pins = <I2C5HDMI_SCL>;
381 rockchip,pull = <VALUE_PULL_DISABLE>;
382 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
383 rockchip,drive = <VALUE_DRV_DEFAULT>;
384 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
387 i2c5_gpio: i2c5-gpio {
388 rockchip,pins = <FUNC_TO_GPIO(I2C5HDMI_SDA)>, <FUNC_TO_GPIO(I2C5HDMI_SCL)>;
389 rockchip,drive = <VALUE_DRV_DEFAULT>;
395 rockchip,pins = <SPI0_TXD>;
396 rockchip,pull = <VALUE_PULL_DISABLE>;
397 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
398 rockchip,drive = <VALUE_DRV_DEFAULT>;
399 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
403 rockchip,pins = <SPI0_RXD>;
404 rockchip,pull = <VALUE_PULL_DISABLE>;
405 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
406 rockchip,drive = <VALUE_DRV_DEFAULT>;
407 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
411 rockchip,pins = <SPI0_CLK>;
412 rockchip,pull = <VALUE_PULL_DISABLE>;
413 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
414 rockchip,drive = <VALUE_DRV_DEFAULT>;
415 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
419 rockchip,pins = <SPI0_CS0>;
420 rockchip,pull = <VALUE_PULL_DISABLE>;
421 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
422 rockchip,drive = <VALUE_DRV_DEFAULT>;
423 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
427 rockchip,pins = <SPI0_CS1>;
428 rockchip,pull = <VALUE_PULL_DISABLE>;
429 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
430 rockchip,drive = <VALUE_DRV_DEFAULT>;
431 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
438 rockchip,pins = <SPI1_TXD>;
439 rockchip,pull = <VALUE_PULL_DISABLE>;
440 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
441 rockchip,drive = <VALUE_DRV_DEFAULT>;
442 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
446 rockchip,pins = <SPI1_RXD>;
447 rockchip,pull = <VALUE_PULL_DISABLE>;
448 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
449 rockchip,drive = <VALUE_DRV_DEFAULT>;
450 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
454 rockchip,pins = <SPI1_CLK>;
455 rockchip,pull = <VALUE_PULL_DISABLE>;
456 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
457 rockchip,drive = <VALUE_DRV_DEFAULT>;
458 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
462 rockchip,pins = <SPI1_CS0>;
463 rockchip,pull = <VALUE_PULL_DISABLE>;
464 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
465 rockchip,drive = <VALUE_DRV_DEFAULT>;
466 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
474 rockchip,pins = <I2S_CLK>;
475 rockchip,pull = <VALUE_PULL_DISABLE>;
476 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
477 rockchip,drive = <VALUE_DRV_DEFAULT>;
478 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
483 rockchip,pins = <I2S_SCLK>;
484 rockchip,pull = <VALUE_PULL_DISABLE>;
485 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
486 rockchip,drive = <VALUE_DRV_DEFAULT>;
487 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
491 i2s_lrckrx:i2s-lrckrx {
492 rockchip,pins = <I2S_LRCKRX>;
493 rockchip,pull = <VALUE_PULL_DISABLE>;
494 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
495 rockchip,drive = <VALUE_DRV_DEFAULT>;
496 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
500 i2s_lrcktx:i2s-lrcktx {
501 rockchip,pins = <I2S_LRCKTX>;
502 rockchip,pull = <VALUE_PULL_DISABLE>;
503 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
504 rockchip,drive = <VALUE_DRV_DEFAULT>;
505 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
510 rockchip,pins = <I2S_SDO0>;
511 rockchip,pull = <VALUE_PULL_DISABLE>;
512 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
513 rockchip,drive = <VALUE_DRV_DEFAULT>;
514 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
519 rockchip,pins = <I2S_SDO1>;
520 rockchip,pull = <VALUE_PULL_DISABLE>;
521 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
522 rockchip,drive = <VALUE_DRV_DEFAULT>;
523 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
528 rockchip,pins = <I2S_SDO2>;
529 rockchip,pull = <VALUE_PULL_DISABLE>;
530 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
531 rockchip,drive = <VALUE_DRV_DEFAULT>;
532 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
537 rockchip,pins = <I2S_SDO3>;
538 rockchip,pull = <VALUE_PULL_DISABLE>;
539 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
540 rockchip,drive = <VALUE_DRV_DEFAULT>;
541 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
546 rockchip,pins = <I2S_SDI>;
547 rockchip,pull = <VALUE_PULL_DISABLE>;
548 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
549 rockchip,drive = <VALUE_DRV_DEFAULT>;
550 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
555 rockchip,pins = <FUNC_TO_GPIO(I2S_CLK)>,
556 <FUNC_TO_GPIO(I2S_SCLK)>,
557 <FUNC_TO_GPIO(I2S_LRCKRX)>,
558 <FUNC_TO_GPIO(I2S_LRCKTX)>,
559 <FUNC_TO_GPIO(I2S_SDO0)>,
560 <FUNC_TO_GPIO(I2S_SDO1)>,
561 <FUNC_TO_GPIO(I2S_SDO2)>,
562 <FUNC_TO_GPIO(I2S_SDO3)>,
563 <FUNC_TO_GPIO(I2S_SDI)>;
565 rockchip,drive = <VALUE_DRV_DEFAULT>;
570 lcdc0_lcdc:lcdc0-lcdc {
574 <LCDC0_HSYNC_GPIO1D>,
575 <LCDC0_VSYNC_GPIO1D>;
576 rockchip,pull = <VALUE_PULL_DISABLE>;
577 rockchip,drive = <VALUE_DRV_DEFAULT>;
580 lcdc0_gpio:lcdc0-gpio {
582 <FUNC_TO_GPIO(LCDC0_DCLK_GPIO1D)>,
583 <FUNC_TO_GPIO(LCDC0_DEN_GPIO1D)>,
584 <FUNC_TO_GPIO(LCDC0_HSYNC_GPIO1D)>,
585 <FUNC_TO_GPIO(LCDC0_VSYNC_GPIO1D)>;
586 rockchip,pull = <VALUE_PULL_DISABLE>;
587 rockchip,drive = <VALUE_DRV_DEFAULT>;
595 rockchip,pins = <SPDIF_TX>;
596 rockchip,pull = <VALUE_PULL_DISABLE>;
597 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
598 rockchip,drive = <VALUE_DRV_DEFAULT>;
599 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
606 rockchip,pins = <PWM0>;
607 rockchip,pull = <VALUE_PULL_DISABLE>;
608 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
609 rockchip,drive = <VALUE_DRV_DEFAULT>;
610 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
616 rockchip,pins = <PWM1>;
617 rockchip,pull = <VALUE_PULL_DISABLE>;
618 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
619 rockchip,drive = <VALUE_DRV_DEFAULT>;
620 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
625 rockchip,pins = <PWM2>;
626 rockchip,pull = <VALUE_PULL_DISABLE>;
627 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
628 rockchip,drive = <VALUE_DRV_DEFAULT>;
629 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
634 rockchip,pins = <PWM3>;
635 rockchip,pull = <VALUE_PULL_DISABLE>;
636 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
637 rockchip,drive = <VALUE_DRV_DEFAULT>;
638 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
644 emmc0_clk: emmc0-clk {
645 rockchip,pins = <EMMC_CLKOUT>;
646 rockchip,pull = <VALUE_PULL_DISABLE>;
647 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
648 rockchip,drive = <VALUE_DRV_DEFAULT>;
649 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
652 emmc0_cmd: emmc0-cmd {
653 rockchip,pins = <EMMC_CMD>;
654 rockchip,pull = <VALUE_PULL_UP>;
655 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
656 rockchip,drive = <VALUE_DRV_DEFAULT>;
657 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
660 emmc0_rstnout: emmc0-rstnout {
661 rockchip,pins = <EMMC_RSTNOUT>;
662 rockchip,pull = <VALUE_PULL_UP>;
663 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
664 rockchip,drive = <VALUE_DRV_DEFAULT>;
665 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
669 emmc0_pwr: emmc0-pwr {
670 rockchip,pins = <EMMC_PWREN>;
671 rockchip,pull = <VALUE_PULL_DISABLE>;
672 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
673 rockchip,drive = <VALUE_DRV_DEFAULT>;
674 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
677 emmc0_bus1: emmc0-bus-width1 {
678 rockchip,pins = <EMMC_DATA0>;
679 rockchip,pull = <VALUE_PULL_UP>;
680 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
681 rockchip,drive = <VALUE_DRV_DEFAULT>;
682 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
685 emmc0_bus4: emmc0-bus-width4 {
686 rockchip,pins = <EMMC_DATA0>,
690 rockchip,pull = <VALUE_PULL_UP>;
691 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
692 rockchip,drive = <VALUE_DRV_DEFAULT>;
693 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
699 sdmmc0_clk: sdmmc0-clk {
700 rockchip,pins = <SDMMC0_CLKOUT>;
701 rockchip,pull = <VALUE_PULL_DISABLE>;
702 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
703 rockchip,drive = <VALUE_DRV_DEFAULT>;
704 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
707 sdmmc0_cmd: sdmmc0-cmd {
708 rockchip,pins = <SDMMC0_CMD>;
709 rockchip,pull = <VALUE_PULL_UP>;
710 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
711 rockchip,drive = <VALUE_DRV_DEFAULT>;
712 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
715 sdmmc0_dectn: sdmmc0-dectn{
716 rockchip,pins = <SDMMC0_DECTN>;
717 rockchip,pull = <VALUE_PULL_UP>;
718 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
719 rockchip,drive = <VALUE_DRV_DEFAULT>;
720 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
724 sdmmc0_bus1: sdmmc0-bus-width1 {
725 rockchip,pins = <SDMMC0_DATA0>;
726 rockchip,pull = <VALUE_PULL_UP>;
727 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
728 rockchip,drive = <VALUE_DRV_DEFAULT>;
729 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
732 sdmmc0_bus4: sdmmc0-bus-width4 {
733 rockchip,pins = <SDMMC0_DATA0>,
737 rockchip,pull = <VALUE_PULL_UP>;
738 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
739 rockchip,drive = <VALUE_DRV_DEFAULT>;
740 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
746 rockchip,pins = <GPS_MAG>;
747 rockchip,pull = <VALUE_PULL_DISABLE>;
748 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
749 rockchip,drive = <VALUE_DRV_DEFAULT>;
750 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
755 rockchip,pins = <GPS_SIG>;
756 rockchip,pull = <VALUE_PULL_DISABLE>;
757 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
758 rockchip,drive = <VALUE_DRV_DEFAULT>;
759 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
764 gps_rfclk:gps-rfclk {
765 rockchip,pins = <GPS_RFCLK>;
766 rockchip,pull = <VALUE_PULL_DISABLE>;
767 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
768 rockchip,drive = <VALUE_DRV_DEFAULT>;
769 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
777 rockchip,pins = <MAC_CLK>;
778 rockchip,pull = <VALUE_PULL_DISABLE>;
779 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
780 rockchip,drive = <VALUE_DRV_DEFAULT>;
781 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
784 mac_txpins: mac-txpins {
785 rockchip,pins = <MAC_TXD0>, <MAC_TXD1>, <MAC_TXD2>, <MAC_TXD3>, <MAC_TXEN>, <MAC_TXCLK>;
786 rockchip,pull = <VALUE_PULL_DISABLE>;
787 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
788 rockchip,drive = <VALUE_DRV_DEFAULT>;
789 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
792 mac_rxpins: mac-rxpins {
793 rockchip,pins = <MAC_RXD0>, <MAC_RXD1>, <MAC_RXD2>, <MAC_RXD3>, <MAC_RXDV>, <MAC_RXER>, <MAC_RXCLK>, <MAC_CRS>, <MAC_COL>;
794 rockchip,pull = <VALUE_PULL_DISABLE>;
795 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
796 rockchip,drive = <VALUE_DRV_DEFAULT>;
797 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
800 mac_mdpins: mac-mdpins {
801 rockchip,pins = <MAC_MDIO>, <MAC_MDC>;
802 rockchip,pull = <VALUE_PULL_DISABLE>;
803 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
804 rockchip,drive = <VALUE_DRV_DEFAULT>;
805 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
821 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_LCDC_VCC>;
822 rockchip,voltage = <VALUE_VOL_DEFAULT>;
826 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_DVP_VCC>;
827 rockchip,voltage = <VALUE_VOL_DEFAULT>;
830 flash0_vcc:flash0-vcc {
831 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH0_VCC>;
832 rockchip,voltage = <VALUE_VOL_DEFAULT>;
835 flash1_vcc:flash1-vcc {
836 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH1_VCC>;
837 rockchip,voltage = <VALUE_VOL_DEFAULT>;
841 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_WIFI_VCC>;
842 rockchip,voltage = <VALUE_VOL_DEFAULT>;
846 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_BB_VCC>;
847 rockchip,voltage = <VALUE_VOL_DEFAULT>;
850 audio_vcc:audio-vcc {
851 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_AUDIO_VCC>;
852 rockchip,voltage = <VALUE_VOL_DEFAULT>;
855 sdcard_vcc:sdcard-vcc {
856 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_SDCARD_VCC>;
857 rockchip,voltage = <VALUE_VOL_DEFAULT>;
860 gpio30_vcc:gpio30-vcc {
861 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO30_VCC>;
862 rockchip,voltage = <VALUE_VOL_DEFAULT>;
865 gpio1830_vcc:gpio1830-vcc {
866 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO1830_VCC>;
867 rockchip,voltage = <VALUE_VOL_DEFAULT>;
873 lcdc_vcc_18:lcdc-vcc-18 {
874 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_LCDC_VCC>;
875 rockchip,voltage = <VALUE_VOL_1V8>;
878 dvp_vcc_18:dvp-vcc-18 {
879 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_DVP_VCC>;
880 rockchip,voltage = <VALUE_VOL_1V8>;
883 flash0_vcc_18:flash0-vcc-18 {
884 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH0_VCC>;
885 rockchip,voltage = <VALUE_VOL_1V8>;
888 flash1_vcc_18:flash1-vcc-18 {
889 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH1_VCC>;
890 rockchip,voltage = <VALUE_VOL_1V8>;
893 wifi_vcc_18:wifi-vcc-18 {
894 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_WIFI_VCC>;
895 rockchip,voltage = <VALUE_VOL_1V8>;
898 bb_vcc_18:bb-vcc-18 {
899 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_BB_VCC>;
900 rockchip,voltage = <VALUE_VOL_1V8>;
903 audio_vcc_18:audio-vcc-18 {
904 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_AUDIO_VCC>;
905 rockchip,voltage = <VALUE_VOL_1V8>;
908 sdcard_vcc_18:sdcard-vcc-18 {
909 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_SDCARD_VCC>;
910 rockchip,voltage = <VALUE_VOL_1V8>;
913 gpio30_vcc_18:gpio30-vcc-18 {
914 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO30_VCC>;
915 rockchip,voltage = <VALUE_VOL_1V8>;
918 gpio1830_vcc_18:gpio1830-vcc-18 {
919 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO1830_VCC>;
920 rockchip,voltage = <VALUE_VOL_1V8>;
927 lcdc_vcc_33:lcdc-vcc-33 {
928 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_LCDC_VCC>;
929 rockchip,voltage = <VALUE_VOL_3V3>;
932 dvp_vcc_33:dvp-vcc-33 {
933 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_DVP_VCC>;
934 rockchip,voltage = <VALUE_VOL_3V3>;
937 flash0_vcc_33:flash0-vcc-33 {
938 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH0_VCC>;
939 rockchip,voltage = <VALUE_VOL_3V3>;
942 flash1_vcc_33:flash1-vcc-33 {
943 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_FLASH1_VCC>;
944 rockchip,voltage = <VALUE_VOL_3V3>;
947 wifi_vcc_33:wifi-vcc-33 {
948 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_WIFI_VCC>;
949 rockchip,voltage = <VALUE_VOL_3V3>;
952 bb_vcc_33:bb-vcc-33 {
953 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_BB_VCC>;
954 rockchip,voltage = <VALUE_VOL_3V3>;
957 audio_vcc_33:audio-vcc-33 {
958 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_AUDIO_VCC>;
959 rockchip,voltage = <VALUE_VOL_3V3>;
962 sdcard_vcc_33:sdcard-vcc-33 {
963 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_SDCARD_VCC>;
964 rockchip,voltage = <VALUE_VOL_3V3>;
967 gpio30_vcc_33:gpio30-vcc-33 {
968 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO30_VCC>;
969 rockchip,voltage = <VALUE_VOL_3V3>;
972 gpio1830_vcc_33:gpio1830-vcc-33 {
973 rockchip,pins = <RK32_VIRTUAL_PIN_FOR_GPIO1830_VCC>;
974 rockchip,voltage = <VALUE_VOL_3V3>;