2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
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12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
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24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
28 * The above copyright notice and this permission notice shall be
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38 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/clock/rockchip,rk808.h>
44 #include "rk3288.dtsi"
47 model = "Rockchip RK3288 Fennec Board";
48 compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
51 reg = <0x0 0x80000000>;
52 device_type = "memory";
55 ext_gmac: external-gmac-clock {
56 compatible = "fixed-clock";
58 clock-frequency = <125000000>;
59 clock-output-names = "ext_gmac";
63 compatible = "rockchip,rk3288-io-voltage-domain";
64 rockchip,grf = <&grf>;
65 wifi-supply = <&vcc_wl>;
68 sdio_pwrseq: sdio-pwrseq {
69 compatible = "mmc-pwrseq-simple";
70 clocks = <&rk808 RK808_CLKOUT1>;
71 clock-names = "ext_clock";
72 pinctrl-names = "default";
73 pinctrl-0 = <&wifi_enable_h>;
76 * On the module itself this is one of these (depending
77 * on the actual card populated):
78 * - SDIO_RESET_L_WL_REG_ON
79 * - PDN (power down when low)
81 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
85 compatible = "simple-audio-card";
86 simple-audio-card,format = "i2s";
87 simple-audio-card,name = "rockchip,fennec-codec";
88 simple-audio-card,mclk-fs = <512>;
90 simple-audio-card,dai-link@0 {
101 simple-audio-card,dai-link@1 {
108 sound-dai = <&es8323>;
113 vcc_sys: vsys-regulator {
114 compatible = "regulator-fixed";
115 regulator-name = "vcc_sys";
116 regulator-min-microvolt = <5000000>;
117 regulator-max-microvolt = <5000000>;
122 vcc_host: usb-host-regulator {
123 compatible = "regulator-fixed";
125 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
126 pinctrl-names = "default";
127 pinctrl-0 = <&host_drv>;
128 regulator-name = "vcc_host_5v";
129 regulator-min-microvolt = <5000000>;
130 regulator-max-microvolt = <5000000>;
134 vcc_otg: usb-otg-regulator {
135 compatible = "regulator-fixed";
137 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&otg_drv>;
140 regulator-name = "vcc_otg_5v";
141 regulator-min-microvolt = <5000000>;
142 regulator-max-microvolt = <5000000>;
147 compatible = "bluetooth-platdata";
148 uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
149 pinctrl-names = "default", "rts_gpio";
150 pinctrl-0 = <&uart0_rts>;
151 pinctrl-1 = <&uart0_gpios>;
152 BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
153 BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
154 BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
159 compatible = "wlan-platdata";
160 rockchip,grf = <&grf>;
161 wifi_chip_type = "ap6212";
163 WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
169 cpu0-supply = <&vdd_cpu>;
178 pinctrl-names = "default";
179 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
187 card-detect-delay = <200>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
194 vmmc-supply = <&vcc_sd>;
195 vqmmc-supply = <&vccio_sd>;
199 assigned-clocks = <&cru SCLK_MAC>;
200 assigned-clock-parents = <&ext_gmac>;
201 clock_in_out = "input";
202 pinctrl-names = "default";
203 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
204 phy-supply = <&vcc_lan>;
206 snps,reset-active-low;
207 snps,reset-delays-us = <0 10000 1000000>;
208 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
215 mali-supply = <&vdd_gpu>;
220 #address-cells = <1>;
222 #sound-dai-cells = <0>;
223 ddc-i2c-bus = <&i2c5>;
229 clock-frequency = <400000>;
232 compatible = "rockchip,rk808";
234 interrupt-parent = <&gpio0>;
235 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
237 clock-output-names = "xin32k", "rk808-clkout2";
238 pinctrl-names = "default";
239 pinctrl-0 = <&pmic_int &global_pwroff>;
240 rockchip,system-power-controller;
243 vcc1-supply = <&vcc_sys>;
244 vcc2-supply = <&vcc_sys>;
245 vcc3-supply = <&vcc_sys>;
246 vcc4-supply = <&vcc_sys>;
247 vcc6-supply = <&vcc_sys>;
248 vcc7-supply = <&vcc_sys>;
249 vcc8-supply = <&vcc_io>;
250 vcc9-supply = <&vcc_io>;
251 vcc10-supply = <&vcc_io>;
252 vcc11-supply = <&vcc_io>;
253 vcc12-supply = <&vcc_io>;
254 vddio-supply = <&vcc_io>;
260 regulator-min-microvolt = <750000>;
261 regulator-max-microvolt = <1350000>;
262 regulator-name = "vdd_arm";
263 regulator-state-mem {
264 regulator-off-in-suspend;
271 regulator-min-microvolt = <850000>;
272 regulator-max-microvolt = <1250000>;
273 regulator-name = "vdd_gpu";
274 regulator-ramp-delay = <6000>;
275 regulator-state-mem {
276 regulator-on-in-suspend;
277 regulator-suspend-microvolt = <1000000>;
284 regulator-name = "vcc_ddr";
285 regulator-state-mem {
286 regulator-on-in-suspend;
293 regulator-min-microvolt = <3300000>;
294 regulator-max-microvolt = <3300000>;
295 regulator-name = "vcc_io";
296 regulator-state-mem {
297 regulator-on-in-suspend;
298 regulator-suspend-microvolt = <3300000>;
302 vccio_pmu: LDO_REG1 {
305 regulator-min-microvolt = <3300000>;
306 regulator-max-microvolt = <3300000>;
307 regulator-name = "vccio_pmu";
308 regulator-state-mem {
309 regulator-on-in-suspend;
310 regulator-suspend-microvolt = <3300000>;
317 regulator-min-microvolt = <3300000>;
318 regulator-max-microvolt = <3300000>;
319 regulator-name = "vcca_33";
320 regulator-state-mem {
321 regulator-off-in-suspend;
328 regulator-min-microvolt = <1000000>;
329 regulator-max-microvolt = <1000000>;
330 regulator-name = "vdd_10";
331 regulator-state-mem {
332 regulator-on-in-suspend;
333 regulator-suspend-microvolt = <1000000>;
340 regulator-min-microvolt = <1800000>;
341 regulator-max-microvolt = <1800000>;
342 regulator-name = "vcc_wl";
343 regulator-state-mem {
344 regulator-on-in-suspend;
345 regulator-suspend-microvolt = <1800000>;
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <3300000>;
354 regulator-name = "vccio_sd";
355 regulator-state-mem {
356 regulator-on-in-suspend;
357 regulator-suspend-microvolt = <3300000>;
361 vdd10_lcd: LDO_REG6 {
364 regulator-min-microvolt = <1000000>;
365 regulator-max-microvolt = <1000000>;
366 regulator-name = "vdd10_lcd";
367 regulator-state-mem {
368 regulator-on-in-suspend;
369 regulator-suspend-microvolt = <1000000>;
376 regulator-min-microvolt = <1800000>;
377 regulator-max-microvolt = <1800000>;
378 regulator-name = "vcc_18";
379 regulator-state-mem {
380 regulator-on-in-suspend;
381 regulator-suspend-microvolt = <1800000>;
385 vcc18_lcd: LDO_REG8 {
388 regulator-min-microvolt = <1800000>;
389 regulator-max-microvolt = <1800000>;
390 regulator-name = "vcc18_lcd";
391 regulator-state-mem {
392 regulator-on-in-suspend;
393 regulator-suspend-microvolt = <1800000>;
397 vcc_sd: SWITCH_REG1 {
400 regulator-name = "vcc_sd";
401 regulator-state-mem {
402 regulator-on-in-suspend;
406 vcc_lan: SWITCH_REG2 {
409 regulator-name = "vcc_lan";
410 regulator-state-mem {
411 regulator-on-in-suspend;
422 compatible = "everest,es8323";
424 hp-det-gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
425 clock-names = "mclk";
426 clocks = <&cru SCLK_I2S0_OUT>;
427 #sound-dai-cells = <0>;
436 #sound-dai-cells = <0>;
442 clock-frequency = <50000000>;
443 clock-freq-min-max = <200000 50000000>;
448 keep-power-in-suspend;
449 mmc-pwrseq = <&sdio_pwrseq>;
452 pinctrl-names = "default";
453 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
459 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
460 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
465 pinctrl-names = "default";
466 pinctrl-0 = <&uart0_xfer &uart0_cts>;
515 pcfg_output_high: pcfg-output-high {
519 pcfg_output_low: pcfg-output-low {
523 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
524 drive-strength = <8>;
527 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
529 drive-strength = <8>;
534 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
538 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
542 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
548 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
553 wifi_enable_h: wifi-enable-h {
554 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
559 sdmmc_bus4: sdmmc-bus4 {
560 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
561 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
562 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
563 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
566 sdmmc_clk: sdmmc-clk {
567 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
570 sdmmc_cmd: sdmmc-cmd {
571 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
574 sdmmc_pwr: sdmmc-pwr {
575 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
581 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
587 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
592 uart0_gpios: uart0-gpios {
593 rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;