2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
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24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
28 * The above copyright notice and this permission notice shall be
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31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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38 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/clock/rockchip,rk808.h>
44 #include "rk3288.dtsi"
47 model = "Rockchip RK3288 Fennec Board";
48 compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
51 reg = <0x0 0x80000000>;
52 device_type = "memory";
55 ext_gmac: external-gmac-clock {
56 compatible = "fixed-clock";
58 clock-frequency = <125000000>;
59 clock-output-names = "ext_gmac";
62 sdio_pwrseq: sdio-pwrseq {
63 compatible = "mmc-pwrseq-simple";
64 clocks = <&rk808 RK808_CLKOUT1>;
65 clock-names = "ext_clock";
66 pinctrl-names = "default";
67 pinctrl-0 = <&wifi_enable_h>;
70 * On the module itself this is one of these (depending
71 * on the actual card populated):
72 * - SDIO_RESET_L_WL_REG_ON
73 * - PDN (power down when low)
75 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
79 compatible = "simple-audio-card";
80 simple-audio-card,format = "i2s";
81 simple-audio-card,name = "rockchip,fennec-codec";
82 simple-audio-card,mclk-fs = <512>;
84 simple-audio-card,dai-link@0 {
95 simple-audio-card,dai-link@1 {
102 sound-dai = <&es8323>;
107 vcc_sys: vsys-regulator {
108 compatible = "regulator-fixed";
109 regulator-name = "vcc_sys";
110 regulator-min-microvolt = <5000000>;
111 regulator-max-microvolt = <5000000>;
116 vcc_host: usb-host-regulator {
117 compatible = "regulator-fixed";
119 gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&host_drv>;
122 regulator-name = "vcc_host_5v";
123 regulator-min-microvolt = <5000000>;
124 regulator-max-microvolt = <5000000>;
128 vcc_otg: usb-otg-regulator {
129 compatible = "regulator-fixed";
131 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&otg_drv>;
134 regulator-name = "vcc_otg_5v";
135 regulator-min-microvolt = <5000000>;
136 regulator-max-microvolt = <5000000>;
141 compatible = "bluetooth-platdata";
142 uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
143 pinctrl-names = "default", "rts_gpio";
144 pinctrl-0 = <&uart0_rts>;
145 pinctrl-1 = <&uart0_gpios>;
146 BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
147 BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
148 BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
153 compatible = "wlan-platdata";
154 rockchip,grf = <&grf>;
155 wifi_chip_type = "ap6212";
157 WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
163 cpu0-supply = <&vdd_cpu>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
181 card-detect-delay = <200>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
188 vmmc-supply = <&vcc_sd>;
189 vqmmc-supply = <&vccio_sd>;
193 assigned-clocks = <&cru SCLK_MAC>;
194 assigned-clock-parents = <&ext_gmac>;
195 clock_in_out = "input";
196 pinctrl-names = "default";
197 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
198 phy-supply = <&vcc_lan>;
200 snps,reset-active-low;
201 snps,reset-delays-us = <0 10000 1000000>;
202 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
209 mali-supply = <&vdd_gpu>;
214 #address-cells = <1>;
216 #sound-dai-cells = <0>;
217 ddc-i2c-bus = <&i2c5>;
223 clock-frequency = <400000>;
226 compatible = "rockchip,rk808";
228 interrupt-parent = <&gpio0>;
229 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
231 clock-output-names = "xin32k", "rk808-clkout2";
232 pinctrl-names = "default";
233 pinctrl-0 = <&pmic_int &global_pwroff>;
234 rockchip,system-power-controller;
237 vcc1-supply = <&vcc_sys>;
238 vcc2-supply = <&vcc_sys>;
239 vcc3-supply = <&vcc_sys>;
240 vcc4-supply = <&vcc_sys>;
241 vcc6-supply = <&vcc_sys>;
242 vcc7-supply = <&vcc_sys>;
243 vcc8-supply = <&vcc_io>;
244 vcc9-supply = <&vcc_io>;
245 vcc10-supply = <&vcc_io>;
246 vcc11-supply = <&vcc_io>;
247 vcc12-supply = <&vcc_io>;
248 vddio-supply = <&vcc_io>;
254 regulator-min-microvolt = <750000>;
255 regulator-max-microvolt = <1350000>;
256 regulator-name = "vdd_arm";
257 regulator-state-mem {
258 regulator-off-in-suspend;
265 regulator-min-microvolt = <850000>;
266 regulator-max-microvolt = <1250000>;
267 regulator-name = "vdd_gpu";
268 regulator-ramp-delay = <6000>;
269 regulator-state-mem {
270 regulator-on-in-suspend;
271 regulator-suspend-microvolt = <1000000>;
278 regulator-name = "vcc_ddr";
279 regulator-state-mem {
280 regulator-on-in-suspend;
287 regulator-min-microvolt = <3300000>;
288 regulator-max-microvolt = <3300000>;
289 regulator-name = "vcc_io";
290 regulator-state-mem {
291 regulator-on-in-suspend;
292 regulator-suspend-microvolt = <3300000>;
296 vccio_pmu: LDO_REG1 {
299 regulator-min-microvolt = <3300000>;
300 regulator-max-microvolt = <3300000>;
301 regulator-name = "vccio_pmu";
302 regulator-state-mem {
303 regulator-on-in-suspend;
304 regulator-suspend-microvolt = <3300000>;
311 regulator-min-microvolt = <3300000>;
312 regulator-max-microvolt = <3300000>;
313 regulator-name = "vcca_33";
314 regulator-state-mem {
315 regulator-off-in-suspend;
322 regulator-min-microvolt = <1000000>;
323 regulator-max-microvolt = <1000000>;
324 regulator-name = "vdd_10";
325 regulator-state-mem {
326 regulator-on-in-suspend;
327 regulator-suspend-microvolt = <1000000>;
334 regulator-min-microvolt = <1800000>;
335 regulator-max-microvolt = <1800000>;
336 regulator-name = "vcc_wl";
337 regulator-state-mem {
338 regulator-on-in-suspend;
339 regulator-suspend-microvolt = <1800000>;
346 regulator-min-microvolt = <1800000>;
347 regulator-max-microvolt = <3300000>;
348 regulator-name = "vccio_sd";
349 regulator-state-mem {
350 regulator-on-in-suspend;
351 regulator-suspend-microvolt = <3300000>;
355 vdd10_lcd: LDO_REG6 {
358 regulator-min-microvolt = <1000000>;
359 regulator-max-microvolt = <1000000>;
360 regulator-name = "vdd10_lcd";
361 regulator-state-mem {
362 regulator-on-in-suspend;
363 regulator-suspend-microvolt = <1000000>;
370 regulator-min-microvolt = <1800000>;
371 regulator-max-microvolt = <1800000>;
372 regulator-name = "vcc_18";
373 regulator-state-mem {
374 regulator-on-in-suspend;
375 regulator-suspend-microvolt = <1800000>;
379 vcc18_lcd: LDO_REG8 {
382 regulator-min-microvolt = <1800000>;
383 regulator-max-microvolt = <1800000>;
384 regulator-name = "vcc18_lcd";
385 regulator-state-mem {
386 regulator-on-in-suspend;
387 regulator-suspend-microvolt = <1800000>;
391 vcc_sd: SWITCH_REG1 {
394 regulator-name = "vcc_sd";
395 regulator-state-mem {
396 regulator-on-in-suspend;
400 vcc_lan: SWITCH_REG2 {
403 regulator-name = "vcc_lan";
404 regulator-state-mem {
405 regulator-on-in-suspend;
416 compatible = "everest,es8323";
418 hp-det-gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
419 clock-names = "mclk";
420 clocks = <&cru SCLK_I2S0_OUT>;
421 #sound-dai-cells = <0>;
430 #sound-dai-cells = <0>;
437 wifi-supply = <&vcc_wl>;
442 clock-frequency = <50000000>;
443 clock-freq-min-max = <200000 50000000>;
448 keep-power-in-suspend;
449 mmc-pwrseq = <&sdio_pwrseq>;
452 pinctrl-names = "default";
453 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
459 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
460 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
465 pinctrl-names = "default";
466 pinctrl-0 = <&uart0_xfer &uart0_cts>;
515 pcfg_output_high: pcfg-output-high {
519 pcfg_output_low: pcfg-output-low {
523 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
524 drive-strength = <8>;
527 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
529 drive-strength = <8>;
534 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
538 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
542 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
548 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
553 wifi_enable_h: wifi-enable-h {
554 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
559 sdmmc_bus4: sdmmc-bus4 {
560 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
561 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
562 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
563 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
566 sdmmc_clk: sdmmc-clk {
567 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
570 sdmmc_cmd: sdmmc-cmd {
571 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
574 sdmmc_pwr: sdmmc-pwr {
575 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
581 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
587 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
592 uart0_gpios: uart0-gpios {
593 rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;