4 #include "lcd-box.dtsi"
5 #include <dt-bindings/input/input.h>
13 compatible = "hub_reset";
14 reset,pin =<&gpio7 GPIO_A6 GPIO_ACTIVE_HIGH>; // hub reset pin
19 compatible = "wlan-platdata";
21 /* wifi_chip_type - wifi chip define
22 * bcmwifi ==> like ap6xxx, rk90x;
23 * rtkwifi ==> like rtl8188xx, rtl8723xx,rtl8812auv;
24 * esp8089 ==> esp8089;
25 * other ==> for other wifi;
27 wifi_chip_type = "bcmwifi";
28 sdio_vref = <1800>; //1800mv or 3300mv
32 power_pmu_regulator = "act_ldo3";
33 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
36 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
37 vref_pmu_regulator = "act_ldo3";
38 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
40 WIFI,poweren_gpio = <&gpio4 GPIO_D4 GPIO_ACTIVE_HIGH>;
41 WIFI,host_wake_irq = <&gpio4 GPIO_D6 GPIO_ACTIVE_HIGH>;
42 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
48 compatible = "bluetooth-platdata";
50 //wifi-bt-power-toggle;
52 uart_rts_gpios = <&gpio4 GPIO_C3 GPIO_ACTIVE_LOW>;
53 pinctrl-names = "default","rts_gpio";
54 pinctrl-0 = <&uart0_rts>;
55 pinctrl-1 = <&uart0_rts_gpio>;
57 BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>;
58 BT,reset_gpio = <&gpio4 GPIO_D5 GPIO_ACTIVE_HIGH>;
59 BT,wake_gpio = <&gpio4 GPIO_D2 GPIO_ACTIVE_HIGH>;
60 BT,wake_host_irq = <&gpio4 GPIO_D7 GPIO_ACTIVE_HIGH>;
66 compatible = "rockchip_pwm_regulator";
67 pwms = <&pwm1 0 2000>;
69 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
70 rockchip,pwm_voltage= <1100000>;
71 rockchip,pwm_min_voltage= <925000>;
72 rockchip,pwm_max_voltage= <1400000>;
73 rockchip,pwm_suspend_voltage= <950000>;
74 rockchip,pwm_coefficient= <475>;
78 pwm_reg0: regulator@0 {
79 regulator-compatible = "pwm_dcdc1";
80 regulator-name= "vdd_logic";
81 regulator-min-microvolt = <925000>;
82 regulator-max-microvolt = <1400000>;
89 codec_hdmi_i2s: codec-hdmi-i2s {
90 compatible = "hdmi-i2s";
93 codec_hdmi_spdif: codec-hdmi-spdif {
94 compatible = "hdmi-spdif";
99 compatible = "rockchip-hdmi-i2s";
102 audio-codec = <&codec_hdmi_i2s>;
103 audio-controller = <&i2s>;
106 //bitclock-inversion;
114 rockchip-spdif-card {
115 compatible = "rockchip-spdif-card";
118 audio-codec = <&codec_hdmi_spdif>;
119 audio-controller = <&spdif>;
125 compatible = "rockchip-rk1000";
128 audio-codec = <&rk1000_codec>;
129 audio-controller = <&i2s>;
136 compatible = "rockchip,rk3288-usb-control";
138 host_drv_gpio = <&gpio0 GPIO_B6 GPIO_ACTIVE_LOW>;
139 otg_drv_gpio = <&gpio0 GPIO_B4 GPIO_ACTIVE_LOW>;
141 rockchip,remote_wakeup;
142 rockchip,usb_irq_wakeup;
152 // pmu_regulator = "act_ldo5";
153 // pmu_enable_level = <1>; //1->HIGH, 0->LOW
154 // power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
155 reset-gpio = <&gpio4 GPIO_B0 GPIO_ACTIVE_LOW>;
157 clock_in_out = "input";
163 //used for init some gpio
165 init-gpios = <&gpio8 GPIO_A1 GPIO_ACTIVE_HIGH
166 &gpio7 GPIO_B1 GPIO_ACTIVE_HIGH
167 &gpio4 GPIO_B0 GPIO_ACTIVE_HIGH>;
170 rockchip,pins = <GPIO0_C2>;
171 rockchip,pull = <VALUE_PULL_DOWN>;
179 rockchip,pins = <GPIO7_B7>;
180 rockchip,pull = <VALUE_PULL_UP>;
185 //could add other pinctrl definition such as gpio
187 // gmac drive strength
190 rockchip,drive = <VALUE_DRV_12MA>;
193 mac_txpins: mac-txpins {
194 rockchip,drive = <VALUE_DRV_12MA>;
197 mac_rxpins: mac-rxpins {
198 rockchip,drive = <VALUE_DRV_12MA>;
202 rockchip,drive = <VALUE_DRV_12MA>;
205 mac_mdpins: mac-mdpins {
206 rockchip,drive = <VALUE_DRV_12MA>;
211 status = "okay"; // used nand set "okay" ,used emmc set "disabled"
214 status = "disabled"; // used nand set "okay" ,used emmc set "disabled"
218 status = "disabled"; // used nand set "okay" ,used emmc set "disabled"
221 clock-frequency = <100000000>;
222 clock-freq-min-max = <400000 100000000>;
227 supports-tSD;//only tsd-sdcard mode
232 keep-power-in-suspend;
238 clock-frequency = <50000000>;
239 lock-freq-min-max = <400000 50000000>;
243 card-detect-delay = <200>;
246 keep-power-in-suspend;
248 vmmc-supply = <&ldo1_reg>;
253 clock-frequency = <50000000>;
254 clock-freq-min-max = <200000 50000000>;
258 keep-power-in-suspend;
265 max-freq = <48000000>;
268 compatible = "rockchip,spi_test_bus0_cs0";
270 spi-max-frequency = <24000000>;
280 compatible = "rockchip,spi_test_bus0_cs1";
282 spi-max-frequency = <24000000>;
294 max-freq = <48000000>;
297 compatible = "rockchip,spi_test_bus1_cs0";
299 spi-max-frequency = <24000000>;
308 //dtv: connect to dtv demodulator for control signal
310 compatible = "rockchip,dtv_spi_ctrl";
311 gpio-powerup = <&gpio0 GPIO_D7 GPIO_ACTIVE_HIGH>;
312 gpio-powerdown = <&gpio2 GPIO_B6 GPIO_ACTIVE_HIGH>;
313 gpio-reset = <&gpio2 GPIO_B7 GPIO_ACTIVE_HIGH>;
314 gpio-nreset = <&gpio2 GPIO_B4 GPIO_ACTIVE_HIGH>;
315 spi-max-frequency = <12000000>;
326 max-freq = <48000000>;
329 compatible = "rockchip,spi_test_bus2_cs0";
331 spi-max-frequency = <24000000>;
340 compatible = "rockchip,spi_test_bus2_cs1";
342 spi-max-frequency = <24000000>;
354 dma-names = "!tx", "!rx";
355 pinctrl-0 = <&uart0_xfer &uart0_cts>;
365 compatible = "silergy,syr82x";
369 #address-cells = <1>;
371 syr827_dc1: regulator@0 {
373 regulator-compatible = "syr82x_dcdc1";
374 regulator-name = "vdd_arm";
375 regulator-min-microvolt = <712500>;
376 regulator-max-microvolt = <1500000>;
379 regulator-initial-mode = <0x2>;
380 regulator-initial-state = <3>;
381 regulator-state-mem {
382 regulator-state-mode = <0x2>;
383 regulator-state-enabled;
384 regulator-state-uv = <900000>;
390 compatible = "silergy,syr82x";
394 #address-cells = <1>;
396 syr828_dc1: regulator@0 {
398 regulator-compatible = "syr82x_dcdc1";
399 regulator-name = "vdd_gpu";
400 regulator-min-microvolt = <712500>;
401 regulator-max-microvolt = <1500000>;
404 regulator-initial-mode = <0x2>;
405 regulator-initial-state = <3>;
406 regulator-state-mem {
407 regulator-state-mode = <0x2>;
408 regulator-state-disabled;
409 regulator-state-uv = <900000>;
414 act8846: act8846@5a {
420 compatible = "rtc,hym8563";
422 irq_gpio = <&gpio0 GPIO_A4 IRQ_TYPE_EDGE_FALLING>;
429 compatible = "nxp,pcf8563";
445 compatible = "rockchip,rk1000_control";
447 gpio-reset = <&gpio7 GPIO_C5 GPIO_ACTIVE_LOW>;
448 #clocks = <&clk_i2s>, <&clk_i2s_out>;
449 #clock-names = "i2s_clk","i2s_mclk";
450 #pinctrl-names = "default";
451 #pinctrl-0 = <&i2s_mclk>;
455 compatible = "rockchip,rk1000_tve";
457 rockchip,source = <0>; //0: LCDC0; 1: LCDC1
458 rockchip,prop = <PRMRY>;//<EXTEND>
461 rk1000_codec: rk1000_codec@60 {
462 compatible = "rockchip,rk1000_codec";
464 spk_ctl_io = <&gpio7 GPIO_A5 GPIO_ACTIVE_LOW>;
466 pa_enable_time = <5000>;
476 rockchip,disp-mode = <NO_DUAL>;
477 rockchip,uboot-logo-on = <1>;
478 rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
482 native-mode = <&timing1>;
486 display-timings = <&disp_timings>;
489 /*lcdc0 as PRMRY(HDMI)*/
492 rockchip,iommu-enabled = <1>;
493 rockchip,prop = <PRMRY>;
498 rockchip,iommu-enabled = <1>;
499 rockchip,prop = <EXTEND>;
504 rockchip,cec_enable = <0>;
505 rockchip,hdcp_enable = <0>;
509 reg = <0x00000000 0x1000000>; /* 16MB */
528 compatible = "rockchip,key";
530 io-channels = <&adc 1>;
535 rockchip,adc_value = <1>;
540 label = "volume down";
541 rockchip,adc_value = <170>;
545 gpios = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>;
554 rockchip,adc_value = <355>;
560 rockchip,adc_value = <746>;
566 rockchip,adc_value = <560>;
572 rockchip,adc_value = <450>;
582 &clk_core_dvfs_table {
584 pvtm-operating-points = <
585 /* KHz uV pvtm margin*/
586 // 126000 900000 25000
587 // 216000 900000 25000
588 // 312000 900000 25000
593 1008000 1050000 75000
594 1200000 1100000 75000
595 1416000 1200000 75000
596 1512000 1300000 75000
597 1608000 1350000 75000
598 // 1704000 1350000 75000
599 // 1800000 1350000 75000
604 &clk_gpu_dvfs_table {
617 &clk_ddr_dvfs_table {
628 SYS_STATUS_NORMAL 456000
629 SYS_STATUS_SUSPEND 200000
630 //SYS_STATUS_VIDEO_1080P 240000
631 SYS_STATUS_VIDEO_4K 533000
632 SYS_STATUS_PERFORMANCE 533000
633 //SYS_STATUS_BOOST 324000
634 //SYS_STATUS_ISP 400000
645 /include/ "act8846.dtsi"
647 gpios =<&gpio7 GPIO_A1 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_B2 GPIO_ACTIVE_HIGH>;
648 act8846,system-power-controller;
652 dcdc1_reg: regulator@0{
653 regulator-name= "act_dcdc1";
654 regulator-min-microvolt = <1200000>;
655 regulator-max-microvolt = <1200000>;
660 dcdc2_reg: regulator@1 {
661 regulator-name= "vccio";
662 regulator-min-microvolt = <3300000>;
663 regulator-max-microvolt = <3300000>;
664 regulator-initial-state = <3>;
665 regulator-state-mem {
666 regulator-state-enabled;
667 regulator-state-uv = <3300000>;
671 dcdc3_reg: regulator@2 {
672 regulator-name= "vdd_logic";
673 regulator-min-microvolt = <700000>;
674 regulator-max-microvolt = <1500000>;
675 regulator-initial-state = <3>;
676 regulator-state-mem {
677 regulator-state-enabled;
678 regulator-state-uv = <1200000>;
683 dcdc4_reg: regulator@3 {
684 regulator-name= "act_dcdc4";
685 regulator-min-microvolt = <2000000>;
686 regulator-max-microvolt = <2000000>;
687 regulator-initial-state = <3>;
688 regulator-state-mem {
689 regulator-state-enabled;
690 regulator-state-uv = <2000000>;
694 ldo1_reg: regulator@4 {
695 regulator-name= "vccio_sd";
696 regulator-min-microvolt = <1800000>;
697 regulator-max-microvolt = <3300000>;
701 ldo2_reg: regulator@5 {
702 regulator-name= "act_ldo2";
703 regulator-min-microvolt = <1050000>;
704 regulator-max-microvolt = <1050000>;
708 ldo3_reg: regulator@6 {
709 regulator-name= "act_ldo3";
710 regulator-min-microvolt = <1800000>;
711 regulator-max-microvolt = <1800000>;
715 ldo4_reg:regulator@7 {
716 regulator-name= "act_ldo4";
717 regulator-min-microvolt = <3300000>;
718 regulator-max-microvolt = <3300000>;
722 ldo5_reg: regulator@8 {
723 regulator-name= "act_ldo5";
724 regulator-min-microvolt = <3300000>;
725 regulator-max-microvolt = <3300000>;
729 ldo6_reg: regulator@9 {
730 regulator-name= "act_ldo6";
731 regulator-min-microvolt = <1100000>;
732 regulator-max-microvolt = <1100000>;
733 regulator-initial-state = <3>;
734 regulator-state-mem {
735 regulator-state-enabled;
740 ldo7_reg: regulator@10 {
741 regulator-name= "vcc_18";
742 regulator-min-microvolt = <1800000>;
743 regulator-max-microvolt = <1800000>;
744 regulator-initial-state = <3>;
745 regulator-state-mem {
746 regulator-state-enabled;
751 ldo8_reg: regulator@11 {
752 regulator-name= "act_ldo8";
753 regulator-min-microvolt = <1850000>;
754 regulator-max-microvolt = <1850000>;
760 /include/ "rk808.dtsi"
762 gpios =<&gpio0 GPIO_A4 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_B3 GPIO_ACTIVE_LOW>;
763 rk808,system-power-controller;
767 rk808_dcdc1_reg: regulator@0{
768 regulator-name= "vdd_arm";
769 regulator-min-microvolt = <700000>;
770 regulator-max-microvolt = <1500000>;
773 regulator-initial-mode = <0x2>;
774 regulator-initial-state = <3>;
775 regulator-state-mem {
776 regulator-state-mode = <0x2>;
777 regulator-state-disabled;
778 regulator-state-uv = <900000>;
782 rk808_dcdc2_reg: regulator@1 {
783 regulator-name= "vdd_gpu";
784 regulator-min-microvolt = <700000>;
785 regulator-max-microvolt = <1500000>;
788 regulator-initial-mode = <0x2>;
789 regulator-initial-state = <3>;
790 regulator-state-mem {
791 regulator-state-mode = <0x2>;
792 regulator-state-disabled;
793 regulator-state-uv = <900000>;
797 rk808_dcdc3_reg: regulator@2 {
798 regulator-name= "rk_dcdc3";
799 regulator-min-microvolt = <1200000>;
800 regulator-max-microvolt = <1200000>;
803 regulator-initial-mode = <0x2>;
804 regulator-initial-state = <3>;
805 regulator-state-mem {
806 regulator-state-mode = <0x2>;
807 regulator-state-enabled;
808 regulator-state-uv = <1200000>;
812 rk808_dcdc4_reg: regulator@3 {
813 regulator-name= "vccio";
814 regulator-min-microvolt = <1800000>;
815 regulator-max-microvolt = <3300000>;
818 regulator-initial-mode = <0x2>;
819 regulator-initial-state = <3>;
820 regulator-state-mem {
821 regulator-state-mode = <0x2>;
822 regulator-state-enabled;
823 regulator-state-uv = <2800000>;
828 rk808_ldo1_reg: regulator@4 {
829 regulator-name= "rk_ldo1";
830 regulator-min-microvolt = <3300000>;
831 regulator-max-microvolt = <3300000>;
834 regulator-initial-state = <3>;
835 regulator-state-mem {
836 regulator-state-enabled;
837 regulator-state-uv = <3300000>;
841 /* BOX:RK1000s, 3.3V */
842 rk808_ldo2_reg: regulator@5 {
843 regulator-name= "rk_ldo2";
844 regulator-min-microvolt = <3300000>;
845 regulator-max-microvolt = <3300000>;
848 regulator-initial-state = <3>;
849 regulator-state-mem {
850 regulator-state-enabled;
851 regulator-state-uv = <3300000>;
855 /* RK3288 PLL,USB PHY, 1.0V */
856 rk808_ldo3_reg: regulator@6 {
857 regulator-name= "rk_ldo3";
858 regulator-min-microvolt = <1000000>;
859 regulator-max-microvolt = <1000000>;
862 regulator-initial-state = <3>;
863 regulator-state-mem {
864 regulator-state-enabled;
865 regulator-state-uv = <1000000>;
869 /* BOX:RK1000S CORE, 1.8V */
870 rk808_ldo4_reg:regulator@7 {
871 regulator-name= "rk_ldo4";
872 regulator-min-microvolt = <1800000>;
873 regulator-max-microvolt = <1800000>;
876 regulator-initial-state = <3>;
877 regulator-state-mem {
878 regulator-state-disabled;
879 regulator-state-uv = <1800000>;
884 rk808_ldo5_reg: regulator@8 {
885 regulator-name= "rk_ldo5";
886 regulator-min-microvolt = <3300000>;
887 regulator-max-microvolt = <3300000>;
890 regulator-initial-state = <3>;
891 regulator-state-mem {
892 regulator-state-enabled;
893 regulator-state-uv = <3300000>;
897 /* CAMERA, 1.8V box modify*/
898 rk808_ldo6_reg: regulator@9 {
899 regulator-name= "rk_ldo6";
900 regulator-min-microvolt = <1800000>;
901 regulator-max-microvolt = <1800000>;
904 regulator-initial-state = <3>;
905 regulator-state-mem {
906 regulator-state-disabled;
907 regulator-state-uv = <1000000>;
911 /* RK3288 USB PHY, SAR-ADC, WIFI IO, 1.8V */
912 rk808_ldo7_reg: regulator@10 {
913 regulator-name= "rk_ldo7";
914 regulator-min-microvolt = <1800000>;
915 regulator-max-microvolt = <1800000>;
918 regulator-initial-state = <3>;
919 regulator-state-mem {
920 regulator-state-enabled;
921 regulator-state-uv = <1800000>;
925 /* DTV, 3.3V box modify*/
926 rk808_ldo8_reg: regulator@11 {
927 regulator-name= "rk_ldo8";
928 regulator-min-microvolt = <3300000>;
929 regulator-max-microvolt = <3300000>;
932 regulator-initial-state = <3>;
933 regulator-state-mem {
934 regulator-state-enabled;
935 regulator-state-uv = <3300000>;
939 rk808_ldo9_reg: regulator@12 {
940 regulator-name= "rk_ldo9";
943 regulator-initial-state = <3>;
944 regulator-state-mem {
945 regulator-state-enabled;
949 rk808_ldo10_reg: regulator@13 {
950 regulator-name= "rk_ldo10";
953 regulator-initial-state = <3>;
954 regulator-state-mem {
955 regulator-state-disabled;
962 regulator-name = "vcc30_lcd";
965 regulator-name = "vcc18_cif";
968 regulator-name = "vcc_flash";
971 regulator-name = "vcc_flash";
974 regulator-name = "vccio_wl";
977 regulator-name = "vccio";
980 regulator-name = "vccio";
983 regulator-name = "vccio";
986 regulator-name = "vccio";
989 regulator-name = "vcc_sd";
993 * Due to not have the software of PWM for remotectrl.
994 * We can _*HACK*_ do that as the following.
997 compatible = "rockchip,remotectl-pwm";
1003 rockchip,usercode = <0x4040>;
1004 rockchip,key_table =
1012 <0xea KEY_VOLUMEUP>,
1013 <0xe3 KEY_VOLUMEDOWN>,
1029 rockchip,usercode = <0xff00>;
1030 rockchip,key_table =
1039 <0xeb KEY_VOLUMEDOWN>,
1040 <0xef KEY_VOLUMEUP>,
1044 <0xa9 KEY_VOLUMEDOWN>,
1045 <0xa8 KEY_VOLUMEDOWN>,
1046 <0xe0 KEY_VOLUMEDOWN>,
1047 <0xa5 KEY_VOLUMEDOWN>,
1052 <0xed KEY_VOLUMEDOWN>,
1054 <0xb3 KEY_VOLUMEDOWN>,
1055 <0xf1 KEY_VOLUMEDOWN>,
1056 <0xf2 KEY_VOLUMEDOWN>,
1058 <0xb4 KEY_VOLUMEDOWN>,
1062 rockchip,usercode = <0x1dcc>;
1063 rockchip,key_table =
1071 <0xf1 KEY_VOLUMEUP>,
1072 <0xfd KEY_VOLUMEDOWN>,
1090 <0xb5 KEY_BACKSPACE>;