Merge tag 'v4.4-rc5'
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3228-sdk.dts
1 /dts-v1/;
2
3 #include "rk3228.dtsi"
4 #include <dt-bindings/input/input.h>
5
6 / {
7         chosen {
8                 bootargs = "vmalloc=496M psci=enable";
9         };
10
11         fiq-debugger {
12                 status = "disabled";
13         };
14
15         wireless-wlan {
16                 compatible = "wlan-platdata";
17                 /* wifi_chip_type - wifi chip define
18                 * bcmwifi ==> like ap6xxx, rk90x;
19                 * rtkwifi ==> like rtl8188xx, rtl8723xx,rtl8812auv;
20                 * esp8089 ==> esp8089;
21                 * other   ==> for other wifi;
22                 */
23                 wifi_chip_type = "bcmwifi";
24                 sdio_vref = <1800>; //1800mv or 3300mv
25                 //keep_wifi_power_on;
26                 //power_ctrl_by_pmu;
27                 power_pmu_regulator = "act_ldo3";
28                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
29                 //vref_ctrl_enable;
30                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
31                 vref_pmu_regulator = "act_ldo3";
32                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
33                 WIFI,poweren_gpio = <&gpio2 GPIO_D2 GPIO_ACTIVE_HIGH>;
34                 WIFI,host_wake_irq = <&gpio0 GPIO_D4 GPIO_ACTIVE_HIGH>;
35                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
36                 status = "okay";
37         };
38
39         wireless-bluetooth {
40                 compatible = "bluetooth-platdata";
41                 //wifi-bt-power-toggle;
42                 //uart_rts_gpios = <&gpio2 GPIO_D5 GPIO_ACTIVE_LOW>;
43                 //pinctrl-names = "default","rts_gpio";
44                 //pinctrl-0 = <&uart1_rts>;
45                 //pinctrl-1 = <&uart1_rts_gpio>;
46                 //BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>;
47                 BT,reset_gpio = <&gpio2 GPIO_D5 GPIO_ACTIVE_HIGH>;
48                 BT,wake_gpio = <&gpio3 GPIO_D3 GPIO_ACTIVE_HIGH>;
49                 BT,wake_host_irq = <&gpio3 GPIO_D2 GPIO_ACTIVE_HIGH>;
50                 status = "okay";
51         };
52
53         pwm-regulator1  {
54                 compatible = "rockchip_pwm_regulator";
55                 pwms = <&pwm1 0 2000>;
56                 rockchip,pwm_id= <1>;
57                 rockchip,pwm_voltage_map= <950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
58                 rockchip,pwm_voltage= <1100000>;
59                 rockchip,pwm_min_voltage= <950000>;
60                 rockchip,pwm_max_voltage= <1450000>;
61                 rockchip,pwm_suspend_voltage= <950000>;
62                 rockchip,pwm_coefficient= <475>;
63                 status = "okay";
64                 regulators {
65                         #address-cells = <1>;
66                         #size-cells = <0>;
67                         pwm_reg0: regulator@0 {
68                                 regulator-compatible = "pwm_dcdc1";
69                                 regulator-name= "vdd_arm";
70                                 regulator-min-microvolt = <950000>;
71                                 regulator-max-microvolt = <1450000>;
72                                 regulator-always-on;
73                                 regulator-boot-on;
74                         };
75                 };
76         };
77
78         pwm-regulator2 {
79                 compatible = "rockchip_pwm_regulator";
80                 pwms = <&pwm2 0 25000>;
81                 rockchip,pwm_id= <2>;
82                 rockchip,pwm_voltage_map= <1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000>;
83                 rockchip,pwm_voltage= <1200000>;
84                 rockchip,pwm_min_voltage= <1000000>;
85                 rockchip,pwm_max_voltage= <1300000>;
86                 rockchip,pwm_suspend_voltage= <1250000>;
87                 rockchip,pwm_coefficient= <475>;
88                 status = "okay";
89                 regulators {
90                         #address-cells = <1>;
91                         #size-cells = <0>;
92                         pwm_reg1: regulator@1 {
93                                 regulator-compatible = "pwm_dcdc2";
94                                 regulator-name= "vdd_logic";
95                                 regulator-min-microvolt = <1000000>;
96                                 regulator-max-microvolt = <1300000>;
97                                 regulator-always-on;
98                                 regulator-boot-on;
99                         };
100                 };
101         };
102 };
103
104 &nandc {
105         status = "okay"; //used nand set "okay" ,used emmc set "disabled"
106 };
107
108 &emmc {
109         clock-frequency = <50000000>;
110         clock-freq-min-max = <400000 50000000>;
111         supports-highspeed;
112         supports-emmc;
113         bootpart-no-access;
114         supports-DDR_MODE;
115         ignore-pm-notify;
116         keep-power-in-suspend;
117         status = "okay";
118 };
119
120 &sdmmc {
121         clock-frequency = <37500000>;
122         clock-freq-min-max = <400000 37500000>;
123         supports-highspeed;
124         supports-sd;
125         broken-cd;
126         card-detect-delay = <200>;
127         ignore-pm-notify;
128         keep-power-in-suspend;
129         status = "okay";
130 };
131
132 &sdio {
133         clock-frequency = <37500000>;
134         clock-freq-min-max = <200000 37500000>;
135         supports-highspeed;
136         supports-sdio;
137         ignore-pm-notify;
138         keep-power-in-suspend;
139         cap-sdio-irq;
140         status = "okay";
141 };
142
143 &uart1{
144         status = "okay";
145         dma-names = "!tx", "!rx";
146         //pinctrl-0 = <&uart1_xfer &uart1_cts>;
147 };
148
149 &i2c0 {
150         status = "okay";
151         rtc@51 {
152                 compatible = "rtc,hym8563";
153                 reg = <0x51>;
154                 irq_gpio = <&gpio0 GPIO_A4 IRQ_TYPE_EDGE_FALLING>;
155         };
156 };
157
158 &i2c1 {
159         status = "okay";
160 };
161
162 &i2c2 {
163         status = "okay";
164 };
165
166 &i2c3 {
167         status = "okay";
168 };
169
170 &pwm1 {
171         status = "okay";
172 };
173
174 &pwm2 {
175         status = "okay";
176 };
177
178 /*
179  * Due to not have the software of PWM for remotectrl.
180  * We can _*HACK*_ do that as the following.
181  */
182 &pwm3 {
183         compatible = "rockchip,remotectl-pwm";
184         remote_pwm_id = <3>;
185         handle_cpu_id = <1>;
186         status = "okay";
187
188         ir_key1{
189                 rockchip,usercode = <0x4040>;
190                 rockchip,key_table =
191                         <0xf2   KEY_REPLY>,
192                         <0xba   KEY_BACK>,
193                         <0xf4   KEY_UP>,
194                         <0xf1   KEY_DOWN>,
195                         <0xef   KEY_LEFT>,
196                         <0xee   KEY_RIGHT>,
197                         <0xbd   KEY_HOME>,
198                         <0xea   KEY_VOLUMEUP>,
199                         <0xe3   KEY_VOLUMEDOWN>,
200                         <0xe2   KEY_SEARCH>,
201                         <0xb2   KEY_POWER>,
202                         <0xbc   KEY_MUTE>,
203                         <0xec   KEY_MENU>,
204                         <0xbf   0x190>,
205                         <0xe0   0x191>,
206                         <0xe1   0x192>,
207                         <0xe9   183>,
208                         <0xe6   248>,
209                         <0xe8   185>,
210                         <0xe7   186>,
211                         <0xf0   388>,
212                         <0xbe   0x175>;
213         };
214         ir_key2{
215                 rockchip,usercode = <0xff00>;
216                 rockchip,key_table =
217                         <0xf9   KEY_HOME>,
218                         <0xbf   KEY_BACK>,
219                         <0xfb   KEY_MENU>,
220                         <0xaa   KEY_REPLY>,
221                         <0xb9   KEY_UP>,
222                         <0xe9   KEY_DOWN>,
223                         <0xb8   KEY_LEFT>,
224                         <0xea   KEY_RIGHT>,
225                         <0xeb   KEY_VOLUMEDOWN>,
226                         <0xef   KEY_VOLUMEUP>,
227                         <0xf7   KEY_MUTE>,
228                         <0xe7   KEY_POWER>,
229                         <0xfc   KEY_POWER>,
230                         <0xa9   KEY_VOLUMEDOWN>,
231                         <0xa8   KEY_VOLUMEDOWN>,
232                         <0xe0   KEY_VOLUMEDOWN>,
233                         <0xa5   KEY_VOLUMEDOWN>,
234                         <0xab   183>,
235                         <0xb7   388>,
236                         <0xf8   184>,
237                         <0xaf   185>,
238                         <0xed   KEY_VOLUMEDOWN>,
239                         <0xee   186>,
240                         <0xb3   KEY_VOLUMEDOWN>,
241                         <0xf1   KEY_VOLUMEDOWN>,
242                         <0xf2   KEY_VOLUMEDOWN>,
243                         <0xf3   KEY_SEARCH>,
244                         <0xb4   KEY_VOLUMEDOWN>,
245                         <0xbe   KEY_SEARCH>;
246         };
247         ir_key3{
248                 rockchip,usercode = <0x1dcc>;
249                 rockchip,key_table =
250                         <0xee   KEY_REPLY>,
251                         <0xf0   KEY_BACK>,
252                         <0xf8   KEY_UP>,
253                         <0xbb   KEY_DOWN>,
254                         <0xef   KEY_LEFT>,
255                         <0xed   KEY_RIGHT>,
256                         <0xfc   KEY_HOME>,
257                         <0xf1   KEY_VOLUMEUP>,
258                         <0xfd   KEY_VOLUMEDOWN>,
259                         <0xb7   KEY_SEARCH>,
260                         <0xff   KEY_POWER>,
261                         <0xf3   KEY_MUTE>,
262                         <0xbf   KEY_MENU>,
263                         <0xf9   0x191>,
264                         <0xf5   0x192>,
265                         <0xb3   388>,
266                         <0xbe   KEY_1>,
267                         <0xba   KEY_2>,
268                         <0xb2   KEY_3>,
269                         <0xbd   KEY_4>,
270                         <0xf9   KEY_5>,
271                         <0xb1   KEY_6>,
272                         <0xfc   KEY_7>,
273                         <0xf8   KEY_8>,
274                         <0xb0   KEY_9>,
275                         <0xb6   KEY_0>,
276                         <0xb5   KEY_BACKSPACE>;
277         };
278 };
279
280 &gmac_clkin {
281         clock-frequency = <125000000>;
282 };
283
284 &gmac {
285         /* pmu_regulator = "act_ldo5"; */
286         /* power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; */
287         /* reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>; */
288         /* phyirq-gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>; */
289         phy-mode = "rmii";
290         pinctrl-names = "default";
291         pinctrl-0 = <&rmii_pins>;
292         clock_in_out = "input";
293         tx_delay = <0x30>;
294         rx_delay = <0x10>;
295 };