rk3128 codec : fixed the codec output bug for box
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / rk3128-box-rk88.dts
1 #include "rk312x-sdk.dtsi"
2 #include "lcd-box.dtsi"
3
4 / {
5          compatible = "rockchip,rk3128";
6         wireless-wlan {
7                 compatible = "wlan-platdata";
8
9                 wifi_chip_type = "esp8089";
10                 sdio_vref = <0>; //1800mv or 3300mv
11
12                 //power_ctrl_by_pmu;
13                 //power_pmu_regulator = "act_ldo3";
14                 //power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
15
16                 //vref_ctrl_enable;
17                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
18                 //vref_pmu_regulator = "act_ldo3";
19                 //vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
20
21                 WIFI,poweren_gpio = <&gpio0 GPIO_D6 GPIO_ACTIVE_HIGH>;
22                 WIFI,host_wake_irq = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
23                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
24
25                 status = "okay";
26         };
27
28                 wireless-bluetooth {
29                 compatible = "bluetooth-platdata";
30
31                 //wifi-bt-power-toggle;
32
33                 uart_rts_gpios = <&gpio1 GPIO_B3 GPIO_ACTIVE_LOW>;
34                 pinctrl-names = "default","rts_gpio";
35                 pinctrl-0 = <&uart1_rts>;
36                 pinctrl-1 = <&uart1_rts_gpio>;
37
38                 //BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>;
39                 BT,reset_gpio = <&gpio3 GPIO_C5 GPIO_ACTIVE_HIGH>;
40                 BT,wake_gpio = <&gpio1 GPIO_B4 GPIO_ACTIVE_HIGH>;
41                 BT,wake_host_irq = <&gpio0 GPIO_C6 GPIO_ACTIVE_LOW>;
42
43         status = "okay";
44     };
45         usb_control {
46                 compatible = "rockchip,rk3126-usb-control";
47                 host_drv_gpio = <&gpio3 GPIO_C4 GPIO_ACTIVE_LOW>;
48                 otg_drv_gpio = <&gpio3 GPIO_C1 GPIO_ACTIVE_LOW>;
49
50                 rockchip,remote_wakeup;
51                 rockchip,usb_irq_wakeup;
52         };
53                 usb0: usb@10180000 {
54                 /*0 - Normal, 1 - Force Host, 2 - Force Device*/
55                 rockchip,usb-mode = <1>;
56         };
57          rockchip_suspend {
58                 rockchip,ctrbits = <
59                         (0
60                         |RKPM_CTR_PWR_DMNS
61                         |RKPM_CTR_GTCLKS
62                         |RKPM_CTR_PLLS
63                         |RKPM_CTR_IDLESRAM_MD
64                         |RKPM_CTR_DDR
65                         |RKPM_CTR_VOLTS
66                         |RKPM_CTR_VOL_PWM1
67                         |RKPM_CTR_VOL_PWM2
68                         )
69                 >;
70         };
71
72 };
73
74
75         &clk_core_dvfs_table {
76                 operating-points = <
77                         /* KHz    uV */
78                         /*408000 1250000
79                         600000 1250000
80                         696000 1250000
81                         */
82                         816000 1100000
83                         1008000 1200000
84                         1200000 1325000
85                         >;
86                         virt-temp-limit-1-cpu-busy = <
87                         /* target-temp  limit-freq */
88                                 75      1008000
89                                 85      1200000
90                                 95      1200000
91                                 100     1200000
92                                 >;
93                         virt-temp-limit-2-cpu-busy = <
94                         /* target-temp  limit-freq */
95                                 75      912000
96                                 85      1008000
97                                 95      1104000
98                                 100     1200000
99                                 >;
100                         virt-temp-limit-3-cpu-busy = <
101                         /* target-temp  limit-freq */
102                                 75      816000
103                                 85      912000
104                                 95      100800
105                                 100     110400
106                                 >;
107                         virt-temp-limit-4-cpu-busy = <
108                         /* target-temp  limit-freq */
109                                 75      696000
110                                 85      816000
111                                 95      912000
112                                 100     100800
113                                 >;
114                         temp-limit-enable = <1>;
115                         target-temp = <85>;
116                 status="okay";
117         };
118
119         &clk_gpu_dvfs_table {
120                 operating-points = <
121                         /* KHz    uV */
122                         200000 950000
123                         300000 975000
124                         400000 1075000
125                         >;
126                 status="okay";
127         };
128
129         &clk_ddr_dvfs_table {
130                 operating-points = <
131                         /* KHz    uV */
132                         200000 950000
133                         300000 950000
134                         400000 1000000
135                         533000 1200000
136                         >;
137
138                 freq-table = <
139                         /*status                freq(KHz)*/
140                         SYS_STATUS_NORMAL       533000
141                         SYS_STATUS_SUSPEND      200000
142                         /*
143                         SYS_STATUS_VIDEO_1080P  240000
144                         SYS_STATUS_VIDEO_4K     400000
145                         SYS_STATUS_PERFORMANCE  528000
146                         SYS_STATUS_DUALVIEW     400000
147                         SYS_STATUS_BOOST        324000
148                         SYS_STATUS_ISP          533000
149                         */
150                         >;
151                 auto-freq-table = <
152                         240000
153                         324000
154                         396000
155                         528000
156                         >;
157                 auto-freq=<0>;
158                 status="okay";
159         };
160
161         &pwm_regulator1 {
162                 status = "okay";
163         };
164
165         &pwm_regulator2 {
166                 status = "okay";
167         };
168
169         &pwm1 {
170                 status = "okay";
171         };
172
173         &uart1{
174                 status = "okay";
175                 dma-names = "!tx", "!rx";
176         pinctrl-0 = <&uart1_xfer &uart1_cts>;
177 };
178
179 &pwm2 {
180         status = "okay";
181 };
182
183 &disp_timings {
184         native-mode = <&timing1>;
185 };
186
187 &rk_screen {
188         display-timings = <&disp_timings>;
189 };
190
191 &fb {
192         rockchip,disp-mode = <NO_DUAL>;
193 };
194
195 &lcdc {
196         status = "okay";
197         rockchip,fb-win-map = <FB0_WIN1_FB1_WIN0_FB2_WIN2>;
198 };
199
200 &hdmi {
201         status = "okay";
202 };
203
204 &tve {
205         status = "okay";
206 };
207
208 &i2c2 {
209         status = "disabled";
210 };
211
212 &spi0 {
213         status = "disabled";
214         max-freq = <48000000>;  
215         /*
216         spi_test@00 {
217                 compatible = "rockchip,spi_test_bus0_cs0";
218                 reg = <0>;
219                 spi-max-frequency = <24000000>;
220                 //spi-cpha;
221                 //spi-cpol;
222                 poll_mode = <0>;
223                 type = <0>;
224                 enable_dma = <0>;
225
226         };
227         
228         spi_test@01 {
229                 compatible = "rockchip,spi_test_bus0_cs1";
230                 reg = <1>;
231                 spi-max-frequency = <24000000>;
232                 spi-cpha;
233                 spi-cpol;
234                 poll_mode = <0>;
235                 type = <0>;
236                 enable_dma = <0>;               
237         };
238         */
239 };
240
241 &gmac {
242         //pmu_regulator = "act_ldo5";
243         //pmu_enable_level = <1>; //1->HIGH, 0->LOW
244         //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
245         reset-gpio = <&gpio2 GPIO_D0 GPIO_ACTIVE_LOW>;
246         phy-mode = "rmii";
247         clock_in_out = "output";
248         tx_delay = <0x30>;
249         rx_delay = <0x10>;
250 };
251
252 &codec {
253         spk_ctl_io = <&gpio1 GPIO_A3 GPIO_ACTIVE_HIGH>;
254         spk-mute-delay = <200>;
255         hp-mute-delay = <100>;
256         rk312x_for_mid = <0>;
257         is_rk3128 = <0>;
258         spk_volume = <25>;
259         hp_volume = <25>;
260         capture_volume = <26>;
261         gpio_debug = <1>;
262         codec_hp_det = <0>;
263 };
264
265 &dwc_control_usb {
266         usb_uart {
267                 status = "disabled";
268         };
269 };
270
271 &sdmmc {
272         status = "okay";
273         cd-gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_HIGH>;/*CD GPIO*/
274 };
275