1 #include <dt-bindings/interrupt-controller/arm-gic.h>
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/pinctrl/rockchip.h>
4 #include <dt-bindings/pinctrl/rockchip-rk3036.h>
7 pinctrl: pinctrl@20008000 {
8 compatible = "rockchip,rk3036-pinctrl";
9 reg = <0x20008000 0xA8>,
13 reg-names = "base", "mux", "pull", "drv";
18 gpio0: gpio0@2007c000 {
19 compatible = "rockchip,rk3036-gpio-bank0";
20 reg = <0x2007c000 0x100>,
23 reg-names = "base", "pull_bank0";
24 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
25 //clocks = <&clk_gates8 9>;
31 #interrupt-cells = <2>;
34 gpio1: gpio1@20080000 {
35 compatible = "rockchip,gpio-bank";
36 reg = <0x20080000 0x100>;
37 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
38 clocks = <&clk_gates8 10>;
44 #interrupt-cells = <2>;
47 gpio2: gpio2@20084000 {
48 compatible = "rockchip,gpio-bank";
49 reg = <0x20084000 0x100>;
50 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
51 //clocks = <&clk_gates8 11>;
57 #interrupt-cells = <2>;
60 gpio15: gpio15@20086000 {
61 compatible = "rockchip,gpio-bank";
62 reg = <0x20086000 0x100>;
63 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;//127 = 160-32-1
64 //clocks = <&clk_gates8 12>;
70 #interrupt-cells = <2>;
73 pcfg_pull_up: pcfg_pull_up {
77 pcfg_pull_down: pcfg_pull_down {
81 pcfg_pull_none: pcfg_pull_none {
86 uart0_xfer: uart0-xfer {
87 rockchip,pins = <UART0_SIN>,
89 rockchip,pull = <VALUE_PULL_DISABLE>;
90 rockchip,voltage = <VALUE_VOL_DEFAULT>;
91 rockchip,drive = <VALUE_DRV_DEFAULT>;
92 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
95 uart0_cts: uart0-cts {
96 rockchip,pins = <UART0_CTSN>;
97 rockchip,pull = <VALUE_PULL_DISABLE>;
98 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
99 rockchip,drive = <VALUE_DRV_DEFAULT>;
100 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
103 uart0_rts: uart0-rts {
104 rockchip,pins = <UART0_RTSN>;
105 rockchip,pull = <VALUE_PULL_DISABLE>;
106 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
107 rockchip,drive = <VALUE_DRV_DEFAULT>;
108 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
111 uart0_rts_gpio: uart0-rts-gpio {
112 rockchip,pins = <FUNC_TO_GPIO(UART0_RTSN)>;
113 rockchip,drive = <VALUE_DRV_DEFAULT>;
118 uart1_xfer: uart1-xfer {
119 rockchip,pins = <UART1_SIN>,
121 rockchip,pull = <VALUE_PULL_DISABLE>;
122 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
123 rockchip,drive = <VALUE_DRV_DEFAULT>;
124 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
130 uart2_xfer: uart2-xfer {
131 rockchip,pins = <UART2_SIN>,
133 rockchip,pull = <VALUE_PULL_DISABLE>;
134 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
135 rockchip,drive = <VALUE_DRV_DEFAULT>;
136 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
138 /* no rts / cts for uart2 */
144 rockchip,pins = <I2C0_SDA>;
145 rockchip,pull = <VALUE_PULL_DISABLE>;
146 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
147 rockchip,drive = <VALUE_DRV_DEFAULT>;
148 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
152 rockchip,pins = <I2C0_SCL>;
153 rockchip,pull = <VALUE_PULL_DISABLE>;
154 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
155 rockchip,drive = <VALUE_DRV_DEFAULT>;
156 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
159 i2c0_gpio: i2c0-gpio {
160 rockchip,pins = <FUNC_TO_GPIO(I2C0_SDA)>, <FUNC_TO_GPIO(I2C0_SCL)>;
161 rockchip,drive = <VALUE_DRV_DEFAULT>;
167 rockchip,pins = <I2C1_SDA>;
168 rockchip,pull = <VALUE_PULL_DISABLE>;
169 rockchip,voltage = <VALUE_VOL_DEFAULT>;
170 rockchip,drive = <VALUE_DRV_DEFAULT>;
171 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
175 rockchip,pins = <I2C1_SCL>;
176 rockchip,pull = <VALUE_PULL_DISABLE>;
177 rockchip,voltage = <VALUE_VOL_DEFAULT>;
178 rockchip,drive = <VALUE_DRV_DEFAULT>;
179 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
182 i2c1_gpio: i2c1-gpio {
183 rockchip,pins = <FUNC_TO_GPIO(I2C1_SDA)>, <FUNC_TO_GPIO(I2C1_SCL)>;
184 rockchip,drive = <VALUE_DRV_DEFAULT>;
190 rockchip,pins = <I2C2_SDA>;
191 rockchip,pull = <VALUE_PULL_DISABLE>;
192 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
193 rockchip,drive = <VALUE_DRV_DEFAULT>;
194 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
198 rockchip,pins = <I2C2_SCL>;
199 rockchip,pull = <VALUE_PULL_DISABLE>;
200 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
201 rockchip,drive = <VALUE_DRV_DEFAULT>;
202 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
205 i2c2_gpio: i2c2-gpio {
206 rockchip,pins = <FUNC_TO_GPIO(I2C2_SDA)>, <FUNC_TO_GPIO(I2C2_SCL)>;
207 rockchip,drive = <VALUE_DRV_DEFAULT>;
214 rockchip,pins = <SPI0_TXD>;
215 rockchip,pull = <VALUE_PULL_DISABLE>;
216 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
217 rockchip,drive = <VALUE_DRV_DEFAULT>;
218 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
222 rockchip,pins = <SPI0_RXD>;
223 rockchip,pull = <VALUE_PULL_DISABLE>;
224 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
225 rockchip,drive = <VALUE_DRV_DEFAULT>;
226 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
230 rockchip,pins = <SPI0_CLK>;
231 rockchip,pull = <VALUE_PULL_DISABLE>;
232 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
233 rockchip,drive = <VALUE_DRV_DEFAULT>;
234 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
238 rockchip,pins = <SPI0_CS0>;
239 rockchip,pull = <VALUE_PULL_DISABLE>;
240 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
241 rockchip,drive = <VALUE_DRV_DEFAULT>;
242 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
246 rockchip,pins = <SPI0_CS1>;
247 rockchip,pull = <VALUE_PULL_DISABLE>;
248 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
249 rockchip,drive = <VALUE_DRV_DEFAULT>;
250 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
257 rockchip,pins = <HDMI_CEC>;
258 rockchip,pull = <VALUE_PULL_DISABLE>;
259 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
260 rockchip,drive = <VALUE_DRV_8MA>;
264 rockchip,pins = <HDMI_SDA>;
265 rockchip,pull = <VALUE_PULL_DISABLE>;
266 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
267 rockchip,drive = <VALUE_DRV_8MA>;
271 rockchip,pins = <HDMI_SCL>;
272 rockchip,pull = <VALUE_PULL_DISABLE>;
273 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
274 rockchip,drive = <VALUE_DRV_8MA>;
278 rockchip,pins = <HDMI_HPD>;
279 rockchip,pull = <VALUE_PULL_DISABLE>;
280 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
281 rockchip,drive = <VALUE_DRV_8MA>;
284 hdmi_gpio: hdmi-gpio {
285 rockchip,pins = <FUNC_TO_GPIO(HDMI_CEC)>, <FUNC_TO_GPIO(HDMI_SDA)>, <FUNC_TO_GPIO(HDMI_SCL)>, <FUNC_TO_GPIO(HDMI_HPD)>;
286 rockchip,drive = <VALUE_DRV_DEFAULT>;
292 i2s0_mclk:i2s0-mclk {
293 rockchip,pins = <I2S0_MCLK>;
294 rockchip,pull = <VALUE_PULL_DISABLE>;
295 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
296 rockchip,drive = <VALUE_DRV_8MA>;
297 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
301 i2s0_sclk:i2s0-sclk {
302 rockchip,pins = <I2S0_SCLK>;
303 rockchip,pull = <VALUE_PULL_DISABLE>;
304 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
305 rockchip,drive = <VALUE_DRV_8MA>;
306 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
310 i2s0_lrckrx:i2s0-lrckrx {
311 rockchip,pins = <I2S0_LRCKRX>;
312 rockchip,pull = <VALUE_PULL_DISABLE>;
313 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
314 rockchip,drive = <VALUE_DRV_8MA>;
315 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
319 i2s0_lrcktx:i2s0-lrcktx {
320 rockchip,pins = <I2S0_LRCKTX>;
321 rockchip,pull = <VALUE_PULL_DISABLE>;
322 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
323 rockchip,drive = <VALUE_DRV_8MA>;
324 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
329 rockchip,pins = <I2S0_SDO>;
330 rockchip,pull = <VALUE_PULL_DISABLE>;
331 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
332 rockchip,drive = <VALUE_DRV_8MA>;
333 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
338 rockchip,pins = <I2S0_SDI>;
339 rockchip,pull = <VALUE_PULL_DISABLE>;
340 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
341 rockchip,drive = <VALUE_DRV_8MA>;
342 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
346 i2s0_gpio: i2s0-gpio {
347 rockchip,pins = <FUNC_TO_GPIO(I2S0_MCLK)>,
348 <FUNC_TO_GPIO(I2S0_SCLK)>,
349 <FUNC_TO_GPIO(I2S0_LRCKRX)>,
350 <FUNC_TO_GPIO(I2S0_LRCKTX)>,
351 <FUNC_TO_GPIO(I2S0_SDO)>,
352 <FUNC_TO_GPIO(I2S0_SDI)>;
353 rockchip,drive = <VALUE_DRV_8MA>;
360 rockchip,pins = <SPDIF_TX>;
361 rockchip,pull = <VALUE_PULL_DISABLE>;
362 //rockchip,voltage = <VALUE_VOL_DEFAULT>;
363 rockchip,drive = <VALUE_DRV_DEFAULT>;
364 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
370 emmc0_clk: emmc0-clk {
371 rockchip,pins = <EMMC_CLKOUT>;
372 rockchip,pull = <VALUE_PULL_DISABLE>;
373 rockchip,drive = <VALUE_DRV_DEFAULT>;
374 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
377 emmc0_cmd: emmc0-cmd {
378 rockchip,pins = <EMMC_CMD>;
379 rockchip,pull = <VALUE_PULL_UP>;
380 rockchip,drive = <VALUE_DRV_DEFAULT>;
381 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
385 emmc0_bus1: emmc0-bus-width1 {
386 rockchip,pins = <EMMC_D0>;
387 rockchip,pull = <VALUE_PULL_UP>;
388 rockchip,drive = <VALUE_DRV_DEFAULT>;
389 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
392 emmc0_bus4: emmc0-bus-width4 {
393 rockchip,pins = <EMMC_D0>,
397 rockchip,pull = <VALUE_PULL_UP>;
398 rockchip,drive = <VALUE_DRV_DEFAULT>;
399 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
404 sdmmc0_clk: sdmmc0-clk {
405 rockchip,pins = <MMC0_CLKOUT>;
406 rockchip,pull = <VALUE_PULL_DISABLE>;
407 rockchip,drive = <VALUE_DRV_DEFAULT>;
408 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
411 sdmmc0_cmd: sdmmc0-cmd {
412 rockchip,pins = <MMC0_CMD>;
413 rockchip,pull = <VALUE_PULL_UP>;
414 rockchip,drive = <VALUE_DRV_DEFAULT>;
415 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
418 sdmmc0_dectn: sdmmc0-dectn{
419 rockchip,pins = <MMC0_DETN>;
420 rockchip,pull = <VALUE_PULL_UP>;
421 rockchip,drive = <VALUE_DRV_DEFAULT>;
422 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
426 sdmmc0_bus1: sdmmc0-bus-width1 {
427 rockchip,pins = <MMC0_D0>;
428 rockchip,pull = <VALUE_PULL_UP>;
429 rockchip,drive = <VALUE_DRV_DEFAULT>;
430 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
433 sdmmc0_bus4: sdmmc0-bus-width4 {
434 rockchip,pins = <MMC0_D0>,
438 rockchip,pull = <VALUE_PULL_UP>;
439 rockchip,drive = <VALUE_DRV_DEFAULT>;
440 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
443 sdmmc0_gpio: sdmmc0_gpio{
452 rockchip,pull = <VALUE_PULL_UP>;
453 rockchip,drive = <VALUE_DRV_DEFAULT>;
454 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
460 sdio0_clk: sdio0_clk {
461 rockchip,pins = <MMC1_CLKOUT>;
462 rockchip,pull = <VALUE_PULL_DISABLE>;
463 rockchip,drive = <VALUE_DRV_DEFAULT>;
464 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
467 sdio0_cmd: sdio0_cmd {
468 rockchip,pins = <MMC1_CMD>;
469 rockchip,pull = <VALUE_PULL_UP>;
470 rockchip,drive = <VALUE_DRV_DEFAULT>;
471 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
474 sdio0_bus1: sdio0-bus-width1 {
475 rockchip,pins = <MMC1_D0>;
476 rockchip,pull = <VALUE_PULL_UP>;
477 rockchip,drive = <VALUE_DRV_DEFAULT>;
478 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
481 sdio0_bus4: sdio0-bus-width4 {
482 rockchip,pins = <MMC1_D0>,
486 rockchip,pull = <VALUE_PULL_UP>;
487 rockchip,drive = <VALUE_DRV_DEFAULT>;
488 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
491 sdio0_gpio: sdio0-all-gpio{
499 rockchip,pull = <VALUE_PULL_UP>;
500 rockchip,drive = <VALUE_DRV_DEFAULT>;
501 //rockchip,tristate = <VALUE_TRI_DEFAULT>;
507 rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
508 rockchip,voltage = <VALUE_VOL_DEFAULT>;
512 rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
513 rockchip,voltage = <VALUE_VOL_DEFAULT>;
517 rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
518 rockchip,voltage = <VALUE_VOL_DEFAULT>;
521 flash_vcc:flash-vcc {
522 rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
523 rockchip,voltage = <VALUE_VOL_DEFAULT>;
526 vccio0_vcc:vccio0-vcc {
527 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
528 rockchip,voltage = <VALUE_VOL_DEFAULT>;
531 vccio1_vcc:vccio1-vcc {
532 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
533 rockchip,voltage = <VALUE_VOL_DEFAULT>;
536 lcdc0_vcc:lcdc0-vcc {
537 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
538 rockchip,voltage = <VALUE_VOL_DEFAULT>;
541 lcdc1_vcc:lcdc1-vcc {
542 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
543 rockchip,voltage = <VALUE_VOL_DEFAULT>;
548 ap0_vcc_18:ap0-vcc-18 {
549 rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
550 rockchip,voltage = <VALUE_VOL_1V8>;
553 ap1_vcc_18:ap1-vcc-18 {
554 rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
555 rockchip,voltage = <VALUE_VOL_1V8>;
558 cif_vcc_18:cif-vcc-18 {
559 rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
560 rockchip,voltage = <VALUE_VOL_1V8>;
563 flash_vcc_18:flash-vcc-18 {
564 rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
565 rockchip,voltage = <VALUE_VOL_1V8>;
568 vccio0_vcc_18:vccio0-vcc-18 {
569 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
570 rockchip,voltage = <VALUE_VOL_1V8>;
573 vccio1_vcc_18:vccio1-vcc-18 {
574 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
575 rockchip,voltage = <VALUE_VOL_1V8>;
578 lcdc0_vcc_18:lcdc0-vcc-18 {
579 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
580 rockchip,voltage = <VALUE_VOL_1V8>;
583 lcdc1_vcc_18:lcdc1-vcc-18 {
584 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
585 rockchip,voltage = <VALUE_VOL_1V8>;
590 ap0_vcc_33:ap0-vcc-33 {
591 rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
592 rockchip,voltage = <VALUE_VOL_3V3>;
595 ap1_vcc_33:ap1-vcc-33 {
596 rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
597 rockchip,voltage = <VALUE_VOL_3V3>;
600 cif_vcc_33:cif-vcc-33 {
601 rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
602 rockchip,voltage = <VALUE_VOL_3V3>;
605 flash_vcc_33:flash-vcc-33 {
606 rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
607 rockchip,voltage = <VALUE_VOL_3V3>;
610 vccio0_vcc_33:vccio0-vcc-33 {
611 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
612 rockchip,voltage = <VALUE_VOL_3V3>;
615 vccio1_vcc_33:vccio1-vcc-33 {
616 rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
617 rockchip,voltage = <VALUE_VOL_3V3>;
620 lcdc0_vcc_33:lcdc0-vcc-33 {
621 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
622 rockchip,voltage = <VALUE_VOL_3V3>;
625 lcdc1_vcc_33:lcdc1-vcc-33 {
626 rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
627 rockchip,voltage = <VALUE_VOL_3V3>;