arch/arm/boot/dts/r8a7778.dtsi

   1 /*
   2  * Device Tree Source for Renesas r8a7778
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6  *
   7  * based on r8a7779
   8  *
   9  * Copyright (C) 2013 Renesas Solutions Corp.
  10  * Copyright (C) 2013 Simon Horman
  11  *
  12  * This file is licensed under the terms of the GNU General Public License
  13  * version 2.  This program is licensed "as is" without any warranty of any
  14  * kind, whether express or implied.
  15  */
  16
  17 /include/ "skeleton.dtsi"
  18
  19 #include <dt-bindings/interrupt-controller/irq.h>
  20
  21 / {
  22         compatible = "renesas,r8a7778";
  23         interrupt-parent = <&gic>;
  24
  25         cpus {
  26                 cpu@0 {
  27                         compatible = "arm,cortex-a9";
  28                 };
  29         };
  30
  31         aliases {
  32                 spi0 = &hspi0;
  33                 spi1 = &hspi1;
  34                 spi2 = &hspi2;
  35         };
  36
  37         gic: interrupt-controller@fe438000 {
  38                 compatible = "arm,cortex-a9-gic";
  39                 #interrupt-cells = <3>;
  40                 interrupt-controller;
  41                 reg = <0xfe438000 0x1000>,
  42                       <0xfe430000 0x100>;
  43         };
  44
  45         /* irqpin: IRQ0 - IRQ3 */
  46         irqpin: irqpin@fe78001c {
  47                 compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
  48                 #interrupt-cells = <2>;
  49                 interrupt-controller;
  50                 status = "disabled"; /* default off */
  51                 reg =   <0xfe78001c 4>,
  52                         <0xfe780010 4>,
  53                         <0xfe780024 4>,
  54                         <0xfe780044 4>,
  55                         <0xfe780064 4>;
  56                 interrupts =   <0 27 IRQ_TYPE_LEVEL_HIGH
  57                                 0 28 IRQ_TYPE_LEVEL_HIGH
  58                                 0 29 IRQ_TYPE_LEVEL_HIGH
  59                                 0 30 IRQ_TYPE_LEVEL_HIGH>;
  60                 sense-bitfield-width = <2>;
  61         };
  62
  63         gpio0: gpio@ffc40000 {
  64                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  65                 reg = <0xffc40000 0x2c>;
  66                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  67                 #gpio-cells = <2>;
  68                 gpio-controller;
  69                 gpio-ranges = <&pfc 0 0 32>;
  70                 #interrupt-cells = <2>;
  71                 interrupt-controller;
  72         };
  73
  74         gpio1: gpio@ffc41000 {
  75                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  76                 reg = <0xffc41000 0x2c>;
  77                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  78                 #gpio-cells = <2>;
  79                 gpio-controller;
  80                 gpio-ranges = <&pfc 0 32 32>;
  81                 #interrupt-cells = <2>;
  82                 interrupt-controller;
  83         };
  84
  85         gpio2: gpio@ffc42000 {
  86                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  87                 reg = <0xffc42000 0x2c>;
  88                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  89                 #gpio-cells = <2>;
  90                 gpio-controller;
  91                 gpio-ranges = <&pfc 0 64 32>;
  92                 #interrupt-cells = <2>;
  93                 interrupt-controller;
  94         };
  95
  96         gpio3: gpio@ffc43000 {
  97                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  98                 reg = <0xffc43000 0x2c>;
  99                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
 100                 #gpio-cells = <2>;
 101                 gpio-controller;
 102                 gpio-ranges = <&pfc 0 96 32>;
 103                 #interrupt-cells = <2>;
 104                 interrupt-controller;
 105         };
 106
 107         gpio4: gpio@ffc44000 {
 108                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
 109                 reg = <0xffc44000 0x2c>;
 110                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
 111                 #gpio-cells = <2>;
 112                 gpio-controller;
 113                 gpio-ranges = <&pfc 0 128 27>;
 114                 #interrupt-cells = <2>;
 115                 interrupt-controller;
 116         };
 117
 118         pfc: pfc@fffc0000 {
 119                 compatible = "renesas,pfc-r8a7778";
 120                 reg = <0xfffc0000 0x118>;
 121         };
 122
 123         i2c0: i2c@ffc70000 {
 124                 #address-cells = <1>;
 125                 #size-cells = <0>;
 126                 compatible = "renesas,i2c-r8a7778";
 127                 reg = <0xffc70000 0x1000>;
 128                 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
 129                 status = "disabled";
 130         };
 131
 132         i2c1: i2c@ffc71000 {
 133                 #address-cells = <1>;
 134                 #size-cells = <0>;
 135                 compatible = "renesas,i2c-r8a7778";
 136                 reg = <0xffc71000 0x1000>;
 137                 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
 138                 status = "disabled";
 139         };
 140
 141         i2c2: i2c@ffc72000 {
 142                 #address-cells = <1>;
 143                 #size-cells = <0>;
 144                 compatible = "renesas,i2c-r8a7778";
 145                 reg = <0xffc72000 0x1000>;
 146                 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
 147                 status = "disabled";
 148         };
 149
 150         i2c3: i2c@ffc73000 {
 151                 #address-cells = <1>;
 152                 #size-cells = <0>;
 153                 compatible = "renesas,i2c-r8a7778";
 154                 reg = <0xffc73000 0x1000>;
 155                 interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
 156                 status = "disabled";
 157         };
 158
 159         scif0: serial@ffe40000 {
 160                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 161                 reg = <0xffe40000 0x100>;
 162                 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>;
 163                 status = "disabled";
 164         };
 165
 166         scif1: serial@ffe41000 {
 167                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 168                 reg = <0xffe41000 0x100>;
 169                 interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
 170                 status = "disabled";
 171         };
 172
 173         scif2: serial@ffe42000 {
 174                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 175                 reg = <0xffe42000 0x100>;
 176                 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
 177                 status = "disabled";
 178         };
 179
 180         scif3: serial@ffe43000 {
 181                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 182                 reg = <0xffe43000 0x100>;
 183                 interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
 184                 status = "disabled";
 185         };
 186
 187         scif4: serial@ffe44000 {
 188                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 189                 reg = <0xffe44000 0x100>;
 190                 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
 191                 status = "disabled";
 192         };
 193
 194         scif5: serial@ffe45000 {
 195                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 196                 reg = <0xffe45000 0x100>;
 197                 interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
 198                 status = "disabled";
 199         };
 200
 201         mmcif: mmc@ffe4e000 {
 202                 compatible = "renesas,sh-mmcif";
 203                 reg = <0xffe4e000 0x100>;
 204                 interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
 205                 status = "disabled";
 206         };
 207
 208         sdhi0: sd@ffe4c000 {
 209                 compatible = "renesas,sdhi-r8a7778";
 210                 reg = <0xffe4c000 0x100>;
 211                 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
 212                 cap-sd-highspeed;
 213                 cap-sdio-irq;
 214                 status = "disabled";
 215         };
 216
 217         sdhi1: sd@ffe4d000 {
 218                 compatible = "renesas,sdhi-r8a7778";
 219                 reg = <0xffe4d000 0x100>;
 220                 interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
 221                 cap-sd-highspeed;
 222                 cap-sdio-irq;
 223                 status = "disabled";
 224         };
 225
 226         sdhi2: sd@ffe4f000 {
 227                 compatible = "renesas,sdhi-r8a7778";
 228                 reg = <0xffe4f000 0x100>;
 229                 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
 230                 cap-sd-highspeed;
 231                 cap-sdio-irq;
 232                 status = "disabled";
 233         };
 234
 235         hspi0: spi@fffc7000 {
 236                 compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 237                 reg = <0xfffc7000 0x18>;
 238                 interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
 239                 #address-cells = <1>;
 240                 #size-cells = <0>;
 241                 status = "disabled";
 242         };
 243
 244         hspi1: spi@fffc8000 {
 245                 compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 246                 reg = <0xfffc8000 0x18>;
 247                 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
 248                 #address-cells = <1>;
 249                 #size-cells = <0>;
 250                 status = "disabled";
 251         };
 252
 253         hspi2: spi@fffc6000 {
 254                 compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 255                 reg = <0xfffc6000 0x18>;
 256                 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
 257                 #address-cells = <1>;
 258                 #size-cells = <0>;
 259                 status = "disabled";
 260         };
 261 };