73472232fa3c0e12ec95c93a1371d82314db541e
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / r8a7778-bockw.dts
1 /*
2  * Reference Device Tree Source for the Bock-W board
3  *
4  * Copyright (C) 2013  Renesas Solutions Corp.
5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6  *
7  * based on r8a7779
8  *
9  * Copyright (C) 2013 Renesas Solutions Corp.
10  * Copyright (C) 2013 Simon Horman
11  *
12  * This file is licensed under the terms of the GNU General Public License
13  * version 2.  This program is licensed "as is" without any warranty of any
14  * kind, whether express or implied.
15  */
16
17 /dts-v1/;
18 #include "r8a7778.dtsi"
19 #include <dt-bindings/interrupt-controller/irq.h>
20 #include <dt-bindings/gpio/gpio.h>
21
22 / {
23         model = "bockw";
24         compatible = "renesas,bockw", "renesas,r8a7778";
25
26         aliases {
27                 serial0 = &scif0;
28         };
29
30         chosen {
31                 bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
32                 stdout-path = &scif0;
33         };
34
35         memory {
36                 device_type = "memory";
37                 reg = <0x60000000 0x10000000>;
38         };
39
40         fixedregulator3v3: fixedregulator@0 {
41                 compatible = "regulator-fixed";
42                 regulator-name = "fixed-3.3V";
43                 regulator-min-microvolt = <3300000>;
44                 regulator-max-microvolt = <3300000>;
45                 regulator-boot-on;
46                 regulator-always-on;
47         };
48
49         ethernet@18300000 {
50                 compatible = "smsc,lan9220", "smsc,lan9115";
51                 reg = <0x18300000 0x1000>;
52
53                 phy-mode = "mii";
54                 interrupt-parent = <&irqpin>;
55                 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
56                 reg-io-width = <4>;
57                 vddvario-supply = <&fixedregulator3v3>;
58                 vdd33a-supply = <&fixedregulator3v3>;
59         };
60 };
61
62 &mmcif {
63         pinctrl-0 = <&mmc_pins>;
64         pinctrl-names = "default";
65
66         vmmc-supply = <&fixedregulator3v3>;
67         bus-width = <8>;
68         broken-cd;
69         status = "okay";
70 };
71
72 &irqpin {
73         status = "okay";
74 };
75
76 &tmu0 {
77         status = "okay";
78 };
79
80 &pfc {
81         scif0_pins: serial0 {
82                 renesas,groups = "scif0_data_a", "scif0_ctrl";
83                 renesas,function = "scif0";
84         };
85
86         mmc_pins: mmc {
87                 renesas,groups = "mmc_data8", "mmc_ctrl";
88                 renesas,function = "mmc";
89         };
90
91         sdhi0_pins: sd0 {
92                 renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
93                                   "sdhi0_cd";
94                 renesas,function = "sdhi0";
95         };
96
97         hspi0_pins: hspi0 {
98                 renesas,groups = "hspi0_a";
99                 renesas,function = "hspi0";
100         };
101 };
102
103 &sdhi0 {
104         pinctrl-0 = <&sdhi0_pins>;
105         pinctrl-names = "default";
106
107         vmmc-supply = <&fixedregulator3v3>;
108         bus-width = <4>;
109         status = "okay";
110         wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
111 };
112
113 &hspi0 {
114         pinctrl-0 = <&hspi0_pins>;
115         pinctrl-names = "default";
116         status = "okay";
117
118         flash: flash@0 {
119                 #address-cells = <1>;
120                 #size-cells = <1>;
121                 compatible = "spansion,s25fl008k";
122                 reg = <0>;
123                 spi-max-frequency = <104000000>;
124                 m25p,fast-read;
125
126                 partition@0 {
127                         label = "data(spi)";
128                         reg = <0x00000000 0x00100000>;
129                 };
130         };
131 };
132
133 &scif0 {
134         pinctrl-0 = <&scif0_pins>;
135         pinctrl-names = "default";
136
137         status = "okay";
138 };