2 * PHYTEC phyCORE-LPC3250 board
4 * Copyright 2012 Roland Stigge <stigge@antcom.de>
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
15 /include/ "lpc32xx.dtsi"
18 model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
19 compatible = "phytec,phy3250", "nxp,lpc3250";
24 device_type = "memory";
29 mac: ethernet@31060000 {
34 /* Here, choose exactly one from: ohci, usbd */
36 transceiver = <&isp1301>;
42 transceiver = <&isp1301>;
51 /* 64MB Flash via SLC NAND controller */
58 nxp,wwidth = <40000000>;
59 nxp,whold = <100000000>;
60 nxp,wsetup = <100000000>;
62 nxp,rwidth = <40000000>;
63 nxp,rhold = <66666666>;
64 nxp,rsetup = <100000000>;
66 gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
69 label = "phy3250-boot";
70 reg = <0x00000000 0x00064000>;
75 label = "phy3250-uboot";
76 reg = <0x00064000 0x00190000>;
81 label = "phy3250-ubt-prms";
82 reg = <0x001f4000 0x00010000>;
86 label = "phy3250-kernel";
87 reg = <0x00204000 0x00400000>;
91 label = "phy3250-rootfs";
92 reg = <0x00604000 0x039fc000>;
97 uart5: serial@40090000 {
101 uart3: serial@40080000 {
106 clock-frequency = <100000>;
109 compatible = "nxp,pcf8563";
113 uda1380: uda1380@18 {
114 compatible = "nxp,uda1380";
116 power-gpio = <&gpio 0x59 0>;
117 reset-gpio = <&gpio 0x51 0>;
123 clock-frequency = <100000>;
126 i2cusb: i2c@31020300 {
127 clock-frequency = <100000>;
129 isp1301: usb-transceiver@2c {
130 compatible = "nxp,isp1301";
136 #address-cells = <1>;
139 cs-gpios = <&gpio 3 5 0>;
142 pl022,interface = <0>;
143 pl022,com-mode = <0>;
144 pl022,rx-level-trig = <1>;
145 pl022,tx-level-trig = <1>;
146 pl022,ctrl-len = <11>;
147 pl022,wait-state = <0>;
150 at25,byte-len = <0x8000>;
151 at25,addr-mode = <2>;
152 at25,page-size = <64>;
154 compatible = "atmel,at25";
156 spi-max-frequency = <5000000>;
161 wp-gpios = <&gpio 3 0 0>;
162 cd-gpios = <&gpio 3 1 0>;
170 uart2: serial@40018000 {
180 keypad,num-rows = <1>;
181 keypad,num-columns = <1>;
182 nxp,debounce-delay-ms = <3>;
183 nxp,scan-delay-ms = <34>;
184 linux,keymap = <0x00000002>;
190 compatible = "gpio-leds";
193 gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */
194 default-state = "off";
198 gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */
199 linux,default-trigger = "heartbeat";