2 * Device Tree Source for OMAP3 clock data
4 * Copyright (C) 2013 Texas Instruments, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 virt_16_8m_ck: virt_16_8m_ck {
13 compatible = "fixed-clock";
14 clock-frequency = <16800000>;
17 osc_sys_ck: osc_sys_ck {
19 compatible = "ti,mux-clock";
20 clocks = <&virt_12m_ck>, <&virt_13m_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_38_4m_ck>, <&virt_16_8m_ck>;
26 compatible = "ti,divider-clock";
27 clocks = <&osc_sys_ck>;
31 ti,index-starts-at-one;
34 sys_clkout1: sys_clkout1 {
36 compatible = "ti,gate-clock";
37 clocks = <&osc_sys_ck>;
42 dpll3_x2_ck: dpll3_x2_ck {
44 compatible = "fixed-factor-clock";
50 dpll3_m2x2_ck: dpll3_m2x2_ck {
52 compatible = "fixed-factor-clock";
53 clocks = <&dpll3_m2_ck>;
58 dpll4_x2_ck: dpll4_x2_ck {
60 compatible = "fixed-factor-clock";
66 corex2_fck: corex2_fck {
68 compatible = "fixed-factor-clock";
69 clocks = <&dpll3_m2x2_ck>;
74 wkup_l4_ick: wkup_l4_ick {
76 compatible = "fixed-factor-clock";
83 mcbsp5_mux_fck: mcbsp5_mux_fck {
85 compatible = "ti,composite-mux-clock";
86 clocks = <&core_96m_fck>, <&mcbsp_clks>;
91 mcbsp5_fck: mcbsp5_fck {
93 compatible = "ti,composite-clock";
94 clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>;
97 mcbsp1_mux_fck: mcbsp1_mux_fck {
99 compatible = "ti,composite-mux-clock";
100 clocks = <&core_96m_fck>, <&mcbsp_clks>;
105 mcbsp1_fck: mcbsp1_fck {
107 compatible = "ti,composite-clock";
108 clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>;
111 mcbsp2_mux_fck: mcbsp2_mux_fck {
113 compatible = "ti,composite-mux-clock";
114 clocks = <&per_96m_fck>, <&mcbsp_clks>;
119 mcbsp2_fck: mcbsp2_fck {
121 compatible = "ti,composite-clock";
122 clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>;
125 mcbsp3_mux_fck: mcbsp3_mux_fck {
127 compatible = "ti,composite-mux-clock";
128 clocks = <&per_96m_fck>, <&mcbsp_clks>;
132 mcbsp3_fck: mcbsp3_fck {
134 compatible = "ti,composite-clock";
135 clocks = <&mcbsp3_gate_fck>, <&mcbsp3_mux_fck>;
138 mcbsp4_mux_fck: mcbsp4_mux_fck {
140 compatible = "ti,composite-mux-clock";
141 clocks = <&per_96m_fck>, <&mcbsp_clks>;
146 mcbsp4_fck: mcbsp4_fck {
148 compatible = "ti,composite-clock";
149 clocks = <&mcbsp4_gate_fck>, <&mcbsp4_mux_fck>;
153 dummy_apb_pclk: dummy_apb_pclk {
155 compatible = "fixed-clock";
156 clock-frequency = <0x0>;
159 omap_32k_fck: omap_32k_fck {
161 compatible = "fixed-clock";
162 clock-frequency = <32768>;
165 virt_12m_ck: virt_12m_ck {
167 compatible = "fixed-clock";
168 clock-frequency = <12000000>;
171 virt_13m_ck: virt_13m_ck {
173 compatible = "fixed-clock";
174 clock-frequency = <13000000>;
177 virt_19200000_ck: virt_19200000_ck {
179 compatible = "fixed-clock";
180 clock-frequency = <19200000>;
183 virt_26000000_ck: virt_26000000_ck {
185 compatible = "fixed-clock";
186 clock-frequency = <26000000>;
189 virt_38_4m_ck: virt_38_4m_ck {
191 compatible = "fixed-clock";
192 clock-frequency = <38400000>;
197 compatible = "ti,omap3-dpll-per-clock";
198 clocks = <&sys_ck>, <&sys_ck>;
199 reg = <0x0d00>, <0x0d20>, <0x0d44>, <0x0d30>;
202 dpll4_m2_ck: dpll4_m2_ck {
204 compatible = "ti,divider-clock";
205 clocks = <&dpll4_ck>;
208 ti,index-starts-at-one;
211 dpll4_m2x2_mul_ck: dpll4_m2x2_mul_ck {
213 compatible = "fixed-factor-clock";
214 clocks = <&dpll4_m2_ck>;
219 dpll4_m2x2_ck: dpll4_m2x2_ck {
221 compatible = "ti,gate-clock";
222 clocks = <&dpll4_m2x2_mul_ck>;
223 ti,bit-shift = <0x1b>;
225 ti,set-bit-to-disable;
228 omap_96m_alwon_fck: omap_96m_alwon_fck {
230 compatible = "fixed-factor-clock";
231 clocks = <&dpll4_m2x2_ck>;
238 compatible = "ti,omap3-dpll-core-clock";
239 clocks = <&sys_ck>, <&sys_ck>;
240 reg = <0x0d00>, <0x0d20>, <0x0d40>, <0x0d30>;
243 dpll3_m3_ck: dpll3_m3_ck {
245 compatible = "ti,divider-clock";
246 clocks = <&dpll3_ck>;
250 ti,index-starts-at-one;
253 dpll3_m3x2_mul_ck: dpll3_m3x2_mul_ck {
255 compatible = "fixed-factor-clock";
256 clocks = <&dpll3_m3_ck>;
261 dpll3_m3x2_ck: dpll3_m3x2_ck {
263 compatible = "ti,gate-clock";
264 clocks = <&dpll3_m3x2_mul_ck>;
265 ti,bit-shift = <0xc>;
267 ti,set-bit-to-disable;
270 emu_core_alwon_ck: emu_core_alwon_ck {
272 compatible = "fixed-factor-clock";
273 clocks = <&dpll3_m3x2_ck>;
278 sys_altclk: sys_altclk {
280 compatible = "fixed-clock";
281 clock-frequency = <0x0>;
284 mcbsp_clks: mcbsp_clks {
286 compatible = "fixed-clock";
287 clock-frequency = <0x0>;
290 dpll3_m2_ck: dpll3_m2_ck {
292 compatible = "ti,divider-clock";
293 clocks = <&dpll3_ck>;
297 ti,index-starts-at-one;
302 compatible = "fixed-factor-clock";
303 clocks = <&dpll3_m2_ck>;
308 dpll1_fck: dpll1_fck {
310 compatible = "ti,divider-clock";
315 ti,index-starts-at-one;
320 compatible = "ti,omap3-dpll-clock";
321 clocks = <&sys_ck>, <&dpll1_fck>;
322 reg = <0x0904>, <0x0924>, <0x0940>, <0x0934>;
325 dpll1_x2_ck: dpll1_x2_ck {
327 compatible = "fixed-factor-clock";
328 clocks = <&dpll1_ck>;
333 dpll1_x2m2_ck: dpll1_x2m2_ck {
335 compatible = "ti,divider-clock";
336 clocks = <&dpll1_x2_ck>;
339 ti,index-starts-at-one;
342 cm_96m_fck: cm_96m_fck {
344 compatible = "fixed-factor-clock";
345 clocks = <&omap_96m_alwon_fck>;
350 omap_96m_fck: omap_96m_fck {
352 compatible = "ti,mux-clock";
353 clocks = <&cm_96m_fck>, <&sys_ck>;
358 dpll4_m3_ck: dpll4_m3_ck {
360 compatible = "ti,divider-clock";
361 clocks = <&dpll4_ck>;
365 ti,index-starts-at-one;
368 dpll4_m3x2_mul_ck: dpll4_m3x2_mul_ck {
370 compatible = "fixed-factor-clock";
371 clocks = <&dpll4_m3_ck>;
376 dpll4_m3x2_ck: dpll4_m3x2_ck {
378 compatible = "ti,gate-clock";
379 clocks = <&dpll4_m3x2_mul_ck>;
380 ti,bit-shift = <0x1c>;
382 ti,set-bit-to-disable;
385 omap_54m_fck: omap_54m_fck {
387 compatible = "ti,mux-clock";
388 clocks = <&dpll4_m3x2_ck>, <&sys_altclk>;
393 cm_96m_d2_fck: cm_96m_d2_fck {
395 compatible = "fixed-factor-clock";
396 clocks = <&cm_96m_fck>;
401 omap_48m_fck: omap_48m_fck {
403 compatible = "ti,mux-clock";
404 clocks = <&cm_96m_d2_fck>, <&sys_altclk>;
409 omap_12m_fck: omap_12m_fck {
411 compatible = "fixed-factor-clock";
412 clocks = <&omap_48m_fck>;
417 dpll4_m4_ck: dpll4_m4_ck {
419 compatible = "ti,divider-clock";
420 clocks = <&dpll4_ck>;
423 ti,index-starts-at-one;
426 dpll4_m4x2_mul_ck: dpll4_m4x2_mul_ck {
428 compatible = "ti,fixed-factor-clock";
429 clocks = <&dpll4_m4_ck>;
435 dpll4_m4x2_ck: dpll4_m4x2_ck {
437 compatible = "ti,gate-clock";
438 clocks = <&dpll4_m4x2_mul_ck>;
439 ti,bit-shift = <0x1d>;
441 ti,set-bit-to-disable;
445 dpll4_m5_ck: dpll4_m5_ck {
447 compatible = "ti,divider-clock";
448 clocks = <&dpll4_ck>;
451 ti,index-starts-at-one;
454 dpll4_m5x2_mul_ck: dpll4_m5x2_mul_ck {
456 compatible = "fixed-factor-clock";
457 clocks = <&dpll4_m5_ck>;
462 dpll4_m5x2_ck: dpll4_m5x2_ck {
464 compatible = "ti,gate-clock";
465 clocks = <&dpll4_m5x2_mul_ck>;
466 ti,bit-shift = <0x1e>;
468 ti,set-bit-to-disable;
471 dpll4_m6_ck: dpll4_m6_ck {
473 compatible = "ti,divider-clock";
474 clocks = <&dpll4_ck>;
478 ti,index-starts-at-one;
481 dpll4_m6x2_mul_ck: dpll4_m6x2_mul_ck {
483 compatible = "fixed-factor-clock";
484 clocks = <&dpll4_m6_ck>;
489 dpll4_m6x2_ck: dpll4_m6x2_ck {
491 compatible = "ti,gate-clock";
492 clocks = <&dpll4_m6x2_mul_ck>;
493 ti,bit-shift = <0x1f>;
495 ti,set-bit-to-disable;
498 emu_per_alwon_ck: emu_per_alwon_ck {
500 compatible = "fixed-factor-clock";
501 clocks = <&dpll4_m6x2_ck>;
506 clkout2_src_gate_ck: clkout2_src_gate_ck {
508 compatible = "ti,composite-no-wait-gate-clock";
514 clkout2_src_mux_ck: clkout2_src_mux_ck {
516 compatible = "ti,composite-mux-clock";
517 clocks = <&core_ck>, <&sys_ck>, <&cm_96m_fck>, <&omap_54m_fck>;
521 clkout2_src_ck: clkout2_src_ck {
523 compatible = "ti,composite-clock";
524 clocks = <&clkout2_src_gate_ck>, <&clkout2_src_mux_ck>;
527 sys_clkout2: sys_clkout2 {
529 compatible = "ti,divider-clock";
530 clocks = <&clkout2_src_ck>;
534 ti,index-power-of-two;
539 compatible = "fixed-factor-clock";
540 clocks = <&dpll1_x2m2_ck>;
547 compatible = "ti,divider-clock";
553 emu_mpu_alwon_ck: emu_mpu_alwon_ck {
555 compatible = "fixed-factor-clock";
563 compatible = "ti,divider-clock";
567 ti,index-starts-at-one;
572 compatible = "ti,divider-clock";
577 ti,index-starts-at-one;
582 compatible = "ti,divider-clock";
587 ti,index-starts-at-one;
590 gpt10_gate_fck: gpt10_gate_fck {
592 compatible = "ti,composite-gate-clock";
598 gpt10_mux_fck: gpt10_mux_fck {
600 compatible = "ti,composite-mux-clock";
601 clocks = <&omap_32k_fck>, <&sys_ck>;
606 gpt10_fck: gpt10_fck {
608 compatible = "ti,composite-clock";
609 clocks = <&gpt10_gate_fck>, <&gpt10_mux_fck>;
612 gpt11_gate_fck: gpt11_gate_fck {
614 compatible = "ti,composite-gate-clock";
620 gpt11_mux_fck: gpt11_mux_fck {
622 compatible = "ti,composite-mux-clock";
623 clocks = <&omap_32k_fck>, <&sys_ck>;
628 gpt11_fck: gpt11_fck {
630 compatible = "ti,composite-clock";
631 clocks = <&gpt11_gate_fck>, <&gpt11_mux_fck>;
634 core_96m_fck: core_96m_fck {
636 compatible = "fixed-factor-clock";
637 clocks = <&omap_96m_fck>;
642 mmchs2_fck: mmchs2_fck {
644 compatible = "ti,wait-gate-clock";
645 clocks = <&core_96m_fck>;
650 mmchs1_fck: mmchs1_fck {
652 compatible = "ti,wait-gate-clock";
653 clocks = <&core_96m_fck>;
660 compatible = "ti,wait-gate-clock";
661 clocks = <&core_96m_fck>;
668 compatible = "ti,wait-gate-clock";
669 clocks = <&core_96m_fck>;
676 compatible = "ti,wait-gate-clock";
677 clocks = <&core_96m_fck>;
682 mcbsp5_gate_fck: mcbsp5_gate_fck {
684 compatible = "ti,composite-gate-clock";
685 clocks = <&mcbsp_clks>;
690 mcbsp1_gate_fck: mcbsp1_gate_fck {
692 compatible = "ti,composite-gate-clock";
693 clocks = <&mcbsp_clks>;
698 core_48m_fck: core_48m_fck {
700 compatible = "fixed-factor-clock";
701 clocks = <&omap_48m_fck>;
706 mcspi4_fck: mcspi4_fck {
708 compatible = "ti,wait-gate-clock";
709 clocks = <&core_48m_fck>;
714 mcspi3_fck: mcspi3_fck {
716 compatible = "ti,wait-gate-clock";
717 clocks = <&core_48m_fck>;
722 mcspi2_fck: mcspi2_fck {
724 compatible = "ti,wait-gate-clock";
725 clocks = <&core_48m_fck>;
730 mcspi1_fck: mcspi1_fck {
732 compatible = "ti,wait-gate-clock";
733 clocks = <&core_48m_fck>;
738 uart2_fck: uart2_fck {
740 compatible = "ti,wait-gate-clock";
741 clocks = <&core_48m_fck>;
746 uart1_fck: uart1_fck {
748 compatible = "ti,wait-gate-clock";
749 clocks = <&core_48m_fck>;
754 core_12m_fck: core_12m_fck {
756 compatible = "fixed-factor-clock";
757 clocks = <&omap_12m_fck>;
764 compatible = "ti,wait-gate-clock";
765 clocks = <&core_12m_fck>;
770 core_l3_ick: core_l3_ick {
772 compatible = "fixed-factor-clock";
780 compatible = "ti,wait-gate-clock";
781 clocks = <&core_l3_ick>;
788 compatible = "fixed-factor-clock";
789 clocks = <&core_l3_ick>;
794 core_l4_ick: core_l4_ick {
796 compatible = "fixed-factor-clock";
802 mmchs2_ick: mmchs2_ick {
804 compatible = "ti,omap3-interface-clock";
805 clocks = <&core_l4_ick>;
810 mmchs1_ick: mmchs1_ick {
812 compatible = "ti,omap3-interface-clock";
813 clocks = <&core_l4_ick>;
820 compatible = "ti,omap3-interface-clock";
821 clocks = <&core_l4_ick>;
826 mcspi4_ick: mcspi4_ick {
828 compatible = "ti,omap3-interface-clock";
829 clocks = <&core_l4_ick>;
834 mcspi3_ick: mcspi3_ick {
836 compatible = "ti,omap3-interface-clock";
837 clocks = <&core_l4_ick>;
842 mcspi2_ick: mcspi2_ick {
844 compatible = "ti,omap3-interface-clock";
845 clocks = <&core_l4_ick>;
850 mcspi1_ick: mcspi1_ick {
852 compatible = "ti,omap3-interface-clock";
853 clocks = <&core_l4_ick>;
860 compatible = "ti,omap3-interface-clock";
861 clocks = <&core_l4_ick>;
868 compatible = "ti,omap3-interface-clock";
869 clocks = <&core_l4_ick>;
876 compatible = "ti,omap3-interface-clock";
877 clocks = <&core_l4_ick>;
882 uart2_ick: uart2_ick {
884 compatible = "ti,omap3-interface-clock";
885 clocks = <&core_l4_ick>;
890 uart1_ick: uart1_ick {
892 compatible = "ti,omap3-interface-clock";
893 clocks = <&core_l4_ick>;
898 gpt11_ick: gpt11_ick {
900 compatible = "ti,omap3-interface-clock";
901 clocks = <&core_l4_ick>;
906 gpt10_ick: gpt10_ick {
908 compatible = "ti,omap3-interface-clock";
909 clocks = <&core_l4_ick>;
914 mcbsp5_ick: mcbsp5_ick {
916 compatible = "ti,omap3-interface-clock";
917 clocks = <&core_l4_ick>;
922 mcbsp1_ick: mcbsp1_ick {
924 compatible = "ti,omap3-interface-clock";
925 clocks = <&core_l4_ick>;
930 omapctrl_ick: omapctrl_ick {
932 compatible = "ti,omap3-interface-clock";
933 clocks = <&core_l4_ick>;
938 dss_tv_fck: dss_tv_fck {
940 compatible = "ti,gate-clock";
941 clocks = <&omap_54m_fck>;
946 dss_96m_fck: dss_96m_fck {
948 compatible = "ti,gate-clock";
949 clocks = <&omap_96m_fck>;
954 dss2_alwon_fck: dss2_alwon_fck {
956 compatible = "ti,gate-clock";
964 compatible = "fixed-clock";
965 clock-frequency = <0>;
968 gpt1_gate_fck: gpt1_gate_fck {
970 compatible = "ti,composite-gate-clock";
976 gpt1_mux_fck: gpt1_mux_fck {
978 compatible = "ti,composite-mux-clock";
979 clocks = <&omap_32k_fck>, <&sys_ck>;
985 compatible = "ti,composite-clock";
986 clocks = <&gpt1_gate_fck>, <&gpt1_mux_fck>;
991 compatible = "ti,omap3-interface-clock";
992 clocks = <&core_l4_ick>;
997 wkup_32k_fck: wkup_32k_fck {
999 compatible = "fixed-factor-clock";
1000 clocks = <&omap_32k_fck>;
1005 gpio1_dbck: gpio1_dbck {
1007 compatible = "ti,gate-clock";
1008 clocks = <&wkup_32k_fck>;
1013 sha12_ick: sha12_ick {
1015 compatible = "ti,omap3-interface-clock";
1016 clocks = <&core_l4_ick>;
1018 ti,bit-shift = <27>;
1021 wdt2_fck: wdt2_fck {
1023 compatible = "ti,wait-gate-clock";
1024 clocks = <&wkup_32k_fck>;
1029 wdt2_ick: wdt2_ick {
1031 compatible = "ti,omap3-interface-clock";
1032 clocks = <&wkup_l4_ick>;
1037 wdt1_ick: wdt1_ick {
1039 compatible = "ti,omap3-interface-clock";
1040 clocks = <&wkup_l4_ick>;
1045 gpio1_ick: gpio1_ick {
1047 compatible = "ti,omap3-interface-clock";
1048 clocks = <&wkup_l4_ick>;
1053 omap_32ksync_ick: omap_32ksync_ick {
1055 compatible = "ti,omap3-interface-clock";
1056 clocks = <&wkup_l4_ick>;
1061 gpt12_ick: gpt12_ick {
1063 compatible = "ti,omap3-interface-clock";
1064 clocks = <&wkup_l4_ick>;
1069 gpt1_ick: gpt1_ick {
1071 compatible = "ti,omap3-interface-clock";
1072 clocks = <&wkup_l4_ick>;
1077 per_96m_fck: per_96m_fck {
1079 compatible = "fixed-factor-clock";
1080 clocks = <&omap_96m_alwon_fck>;
1085 per_48m_fck: per_48m_fck {
1087 compatible = "fixed-factor-clock";
1088 clocks = <&omap_48m_fck>;
1093 uart3_fck: uart3_fck {
1095 compatible = "ti,wait-gate-clock";
1096 clocks = <&per_48m_fck>;
1098 ti,bit-shift = <11>;
1101 gpt2_gate_fck: gpt2_gate_fck {
1103 compatible = "ti,composite-gate-clock";
1109 gpt2_mux_fck: gpt2_mux_fck {
1111 compatible = "ti,composite-mux-clock";
1112 clocks = <&omap_32k_fck>, <&sys_ck>;
1116 gpt2_fck: gpt2_fck {
1118 compatible = "ti,composite-clock";
1119 clocks = <&gpt2_gate_fck>, <&gpt2_mux_fck>;
1122 gpt3_gate_fck: gpt3_gate_fck {
1124 compatible = "ti,composite-gate-clock";
1130 gpt3_mux_fck: gpt3_mux_fck {
1132 compatible = "ti,composite-mux-clock";
1133 clocks = <&omap_32k_fck>, <&sys_ck>;
1138 gpt3_fck: gpt3_fck {
1140 compatible = "ti,composite-clock";
1141 clocks = <&gpt3_gate_fck>, <&gpt3_mux_fck>;
1144 gpt4_gate_fck: gpt4_gate_fck {
1146 compatible = "ti,composite-gate-clock";
1152 gpt4_mux_fck: gpt4_mux_fck {
1154 compatible = "ti,composite-mux-clock";
1155 clocks = <&omap_32k_fck>, <&sys_ck>;
1160 gpt4_fck: gpt4_fck {
1162 compatible = "ti,composite-clock";
1163 clocks = <&gpt4_gate_fck>, <&gpt4_mux_fck>;
1166 gpt5_gate_fck: gpt5_gate_fck {
1168 compatible = "ti,composite-gate-clock";
1174 gpt5_mux_fck: gpt5_mux_fck {
1176 compatible = "ti,composite-mux-clock";
1177 clocks = <&omap_32k_fck>, <&sys_ck>;
1182 gpt5_fck: gpt5_fck {
1184 compatible = "ti,composite-clock";
1185 clocks = <&gpt5_gate_fck>, <&gpt5_mux_fck>;
1188 gpt6_gate_fck: gpt6_gate_fck {
1190 compatible = "ti,composite-gate-clock";
1196 gpt6_mux_fck: gpt6_mux_fck {
1198 compatible = "ti,composite-mux-clock";
1199 clocks = <&omap_32k_fck>, <&sys_ck>;
1204 gpt6_fck: gpt6_fck {
1206 compatible = "ti,composite-clock";
1207 clocks = <&gpt6_gate_fck>, <&gpt6_mux_fck>;
1210 gpt7_gate_fck: gpt7_gate_fck {
1212 compatible = "ti,composite-gate-clock";
1218 gpt7_mux_fck: gpt7_mux_fck {
1220 compatible = "ti,composite-mux-clock";
1221 clocks = <&omap_32k_fck>, <&sys_ck>;
1226 gpt7_fck: gpt7_fck {
1228 compatible = "ti,composite-clock";
1229 clocks = <&gpt7_gate_fck>, <&gpt7_mux_fck>;
1232 gpt8_gate_fck: gpt8_gate_fck {
1234 compatible = "ti,composite-gate-clock";
1240 gpt8_mux_fck: gpt8_mux_fck {
1242 compatible = "ti,composite-mux-clock";
1243 clocks = <&omap_32k_fck>, <&sys_ck>;
1248 gpt8_fck: gpt8_fck {
1250 compatible = "ti,composite-clock";
1251 clocks = <&gpt8_gate_fck>, <&gpt8_mux_fck>;
1254 gpt9_gate_fck: gpt9_gate_fck {
1256 compatible = "ti,composite-gate-clock";
1258 ti,bit-shift = <10>;
1262 gpt9_mux_fck: gpt9_mux_fck {
1264 compatible = "ti,composite-mux-clock";
1265 clocks = <&omap_32k_fck>, <&sys_ck>;
1270 gpt9_fck: gpt9_fck {
1272 compatible = "ti,composite-clock";
1273 clocks = <&gpt9_gate_fck>, <&gpt9_mux_fck>;
1276 per_32k_alwon_fck: per_32k_alwon_fck {
1278 compatible = "fixed-factor-clock";
1279 clocks = <&omap_32k_fck>;
1284 gpio6_dbck: gpio6_dbck {
1286 compatible = "ti,gate-clock";
1287 clocks = <&per_32k_alwon_fck>;
1289 ti,bit-shift = <17>;
1292 gpio5_dbck: gpio5_dbck {
1294 compatible = "ti,gate-clock";
1295 clocks = <&per_32k_alwon_fck>;
1297 ti,bit-shift = <16>;
1300 gpio4_dbck: gpio4_dbck {
1302 compatible = "ti,gate-clock";
1303 clocks = <&per_32k_alwon_fck>;
1305 ti,bit-shift = <15>;
1308 gpio3_dbck: gpio3_dbck {
1310 compatible = "ti,gate-clock";
1311 clocks = <&per_32k_alwon_fck>;
1313 ti,bit-shift = <14>;
1316 gpio2_dbck: gpio2_dbck {
1318 compatible = "ti,gate-clock";
1319 clocks = <&per_32k_alwon_fck>;
1321 ti,bit-shift = <13>;
1324 wdt3_fck: wdt3_fck {
1326 compatible = "ti,wait-gate-clock";
1327 clocks = <&per_32k_alwon_fck>;
1329 ti,bit-shift = <12>;
1332 per_l4_ick: per_l4_ick {
1334 compatible = "fixed-factor-clock";
1340 gpio6_ick: gpio6_ick {
1342 compatible = "ti,omap3-interface-clock";
1343 clocks = <&per_l4_ick>;
1345 ti,bit-shift = <17>;
1348 gpio5_ick: gpio5_ick {
1350 compatible = "ti,omap3-interface-clock";
1351 clocks = <&per_l4_ick>;
1353 ti,bit-shift = <16>;
1356 gpio4_ick: gpio4_ick {
1358 compatible = "ti,omap3-interface-clock";
1359 clocks = <&per_l4_ick>;
1361 ti,bit-shift = <15>;
1364 gpio3_ick: gpio3_ick {
1366 compatible = "ti,omap3-interface-clock";
1367 clocks = <&per_l4_ick>;
1369 ti,bit-shift = <14>;
1372 gpio2_ick: gpio2_ick {
1374 compatible = "ti,omap3-interface-clock";
1375 clocks = <&per_l4_ick>;
1377 ti,bit-shift = <13>;
1380 wdt3_ick: wdt3_ick {
1382 compatible = "ti,omap3-interface-clock";
1383 clocks = <&per_l4_ick>;
1385 ti,bit-shift = <12>;
1388 uart3_ick: uart3_ick {
1390 compatible = "ti,omap3-interface-clock";
1391 clocks = <&per_l4_ick>;
1393 ti,bit-shift = <11>;
1396 uart4_ick: uart4_ick {
1398 compatible = "ti,omap3-interface-clock";
1399 clocks = <&per_l4_ick>;
1401 ti,bit-shift = <18>;
1404 gpt9_ick: gpt9_ick {
1406 compatible = "ti,omap3-interface-clock";
1407 clocks = <&per_l4_ick>;
1409 ti,bit-shift = <10>;
1412 gpt8_ick: gpt8_ick {
1414 compatible = "ti,omap3-interface-clock";
1415 clocks = <&per_l4_ick>;
1420 gpt7_ick: gpt7_ick {
1422 compatible = "ti,omap3-interface-clock";
1423 clocks = <&per_l4_ick>;
1428 gpt6_ick: gpt6_ick {
1430 compatible = "ti,omap3-interface-clock";
1431 clocks = <&per_l4_ick>;
1436 gpt5_ick: gpt5_ick {
1438 compatible = "ti,omap3-interface-clock";
1439 clocks = <&per_l4_ick>;
1444 gpt4_ick: gpt4_ick {
1446 compatible = "ti,omap3-interface-clock";
1447 clocks = <&per_l4_ick>;
1452 gpt3_ick: gpt3_ick {
1454 compatible = "ti,omap3-interface-clock";
1455 clocks = <&per_l4_ick>;
1460 gpt2_ick: gpt2_ick {
1462 compatible = "ti,omap3-interface-clock";
1463 clocks = <&per_l4_ick>;
1468 mcbsp2_ick: mcbsp2_ick {
1470 compatible = "ti,omap3-interface-clock";
1471 clocks = <&per_l4_ick>;
1476 mcbsp3_ick: mcbsp3_ick {
1478 compatible = "ti,omap3-interface-clock";
1479 clocks = <&per_l4_ick>;
1484 mcbsp4_ick: mcbsp4_ick {
1486 compatible = "ti,omap3-interface-clock";
1487 clocks = <&per_l4_ick>;
1492 mcbsp2_gate_fck: mcbsp2_gate_fck {
1494 compatible = "ti,composite-gate-clock";
1495 clocks = <&mcbsp_clks>;
1500 mcbsp3_gate_fck: mcbsp3_gate_fck {
1502 compatible = "ti,composite-gate-clock";
1503 clocks = <&mcbsp_clks>;
1508 mcbsp4_gate_fck: mcbsp4_gate_fck {
1510 compatible = "ti,composite-gate-clock";
1511 clocks = <&mcbsp_clks>;
1516 emu_src_mux_ck: emu_src_mux_ck {
1518 compatible = "ti,mux-clock";
1519 clocks = <&sys_ck>, <&emu_core_alwon_ck>, <&emu_per_alwon_ck>, <&emu_mpu_alwon_ck>;
1523 emu_src_ck: emu_src_ck {
1525 compatible = "ti,clkdm-gate-clock";
1526 clocks = <&emu_src_mux_ck>;
1529 pclk_fck: pclk_fck {
1531 compatible = "ti,divider-clock";
1532 clocks = <&emu_src_ck>;
1536 ti,index-starts-at-one;
1539 pclkx2_fck: pclkx2_fck {
1541 compatible = "ti,divider-clock";
1542 clocks = <&emu_src_ck>;
1546 ti,index-starts-at-one;
1549 atclk_fck: atclk_fck {
1551 compatible = "ti,divider-clock";
1552 clocks = <&emu_src_ck>;
1556 ti,index-starts-at-one;
1559 traceclk_src_fck: traceclk_src_fck {
1561 compatible = "ti,mux-clock";
1562 clocks = <&sys_ck>, <&emu_core_alwon_ck>, <&emu_per_alwon_ck>, <&emu_mpu_alwon_ck>;
1567 traceclk_fck: traceclk_fck {
1569 compatible = "ti,divider-clock";
1570 clocks = <&traceclk_src_fck>;
1571 ti,bit-shift = <11>;
1574 ti,index-starts-at-one;
1577 secure_32k_fck: secure_32k_fck {
1579 compatible = "fixed-clock";
1580 clock-frequency = <32768>;
1583 gpt12_fck: gpt12_fck {
1585 compatible = "fixed-factor-clock";
1586 clocks = <&secure_32k_fck>;
1591 wdt1_fck: wdt1_fck {
1593 compatible = "fixed-factor-clock";
1594 clocks = <&secure_32k_fck>;
1601 core_l3_clkdm: core_l3_clkdm {
1602 compatible = "ti,clockdomain";
1603 clocks = <&sdrc_ick>;
1606 dpll3_clkdm: dpll3_clkdm {
1607 compatible = "ti,clockdomain";
1608 clocks = <&dpll3_ck>;
1611 dpll1_clkdm: dpll1_clkdm {
1612 compatible = "ti,clockdomain";
1613 clocks = <&dpll1_ck>;
1616 per_clkdm: per_clkdm {
1617 compatible = "ti,clockdomain";
1618 clocks = <&uart3_fck>, <&gpio6_dbck>, <&gpio5_dbck>,
1619 <&gpio4_dbck>, <&gpio3_dbck>, <&gpio2_dbck>,
1620 <&wdt3_fck>, <&gpio6_ick>, <&gpio5_ick>, <&gpio4_ick>,
1621 <&gpio3_ick>, <&gpio2_ick>, <&wdt3_ick>, <&uart3_ick>,
1622 <&uart4_ick>, <&gpt9_ick>, <&gpt8_ick>, <&gpt7_ick>,
1623 <&gpt6_ick>, <&gpt5_ick>, <&gpt4_ick>, <&gpt3_ick>,
1624 <&gpt2_ick>, <&mcbsp2_ick>, <&mcbsp3_ick>,
1628 emu_clkdm: emu_clkdm {
1629 compatible = "ti,clockdomain";
1630 clocks = <&emu_src_ck>;
1633 dpll4_clkdm: dpll4_clkdm {
1634 compatible = "ti,clockdomain";
1635 clocks = <&dpll4_ck>;
1638 wkup_clkdm: wkup_clkdm {
1639 compatible = "ti,clockdomain";
1640 clocks = <&gpio1_dbck>, <&wdt2_fck>, <&wdt2_ick>, <&wdt1_ick>,
1641 <&gpio1_ick>, <&omap_32ksync_ick>, <&gpt12_ick>,
1645 dss_clkdm: dss_clkdm {
1646 compatible = "ti,clockdomain";
1647 clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>;
1650 core_l4_clkdm: core_l4_clkdm {
1651 compatible = "ti,clockdomain";
1652 clocks = <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>,
1653 <&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>,
1654 <&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>,
1655 <&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>,
1656 <&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>,
1657 <&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>,
1658 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
1659 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
1660 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>;