2 * Copyright (C) 2014 ROCKCHIP, Inc.
3 * arch/arm/boot/dts/lcd-lq070m1sx01-mipi.dtsi
4 * author: libing@rock-chips.com
5 * create date: 2014-04-15
6 * lcd model: lq070m1sx01
7 * resolution: 1920 X 1200
13 disp_mipi_init: mipi_dsi_init{
14 compatible = "rockchip,mipi_dsi_init";
15 rockchip,screen_init = <1>;
16 rockchip,dsi_lane = <2>;
17 rockchip,dsi_hs_clk = <1000>;
18 rockchip,mipi_dsi_num = <2>;
20 disp_mipi_power_ctr: mipi_power_ctr {
21 compatible = "rockchip,mipi_power_ctr";
22 mipi_lcd_rst:mipi_lcd_rst{
23 compatible = "rockchip,lcd_rst";
24 rockchip,gpios = <&gpio2 GPIO_B7 GPIO_ACTIVE_HIGH>;
25 rockchip,delay = <10>;
27 mipi_lcd_en:mipi_lcd_en {
28 compatible = "rockchip,lcd_en";
29 rockchip,gpios = <&gpio0 GPIO_C1 GPIO_ACTIVE_HIGH>;
30 rockchip,delay = <10>;
33 disp_mipi_init_cmds: screen-on-cmds {
34 rockchip,cmd_debug = <0>;
35 compatible = "rockchip,screen-on-cmds";
37 compatible = "rockchip,on-cmds";
38 rockchip,cmd_type = <LPDT>;
39 rockchip,dsi_id = <2>;
40 rockchip,cmd = <0x15 0xb0 0x02>;
41 rockchip,cmd_delay = <0>;
45 compatible = "rockchip,on-cmds";
46 rockchip,cmd_type = <LPDT>;
47 rockchip,dsi_id = <2>;
48 rockchip,cmd = <0x15 0xb1 0x21>;
49 rockchip,cmd_delay = <0>;
52 compatible = "rockchip,on-cmds";
53 rockchip,cmd_type = <LPDT>;
54 rockchip,dsi_id = <2>;
55 rockchip,cmd = <0x15 0xb0 0x06>;
56 rockchip,cmd_delay = <0>;
59 compatible = "rockchip,on-cmds";
60 rockchip,cmd_type = <LPDT>;
61 rockchip,dsi_id = <2>;
62 rockchip,cmd = <0x15 0xb1 0x21>;
63 rockchip,cmd_delay = <0>;
66 compatible = "rockchip,on-cmds";
67 rockchip,cmd_type = <LPDT>;
68 rockchip,dsi_id = <2>;
69 rockchip,cmd = <0x15 0xb4 0x15>;
70 rockchip,cmd_delay = <0>;
73 compatible = "rockchip,on-cmds";
74 rockchip,cmd_type = <LPDT>;
75 rockchip,dsi_id = <2>;
76 rockchip,cmd = <0x15 0xb9 0x40>;
77 rockchip,cmd_delay = <0>;
80 compatible = "rockchip,on-cmds";
81 rockchip,cmd_type = <LPDT>;
82 rockchip,dsi_id = <2>;
83 rockchip,cmd = <0x15 0xb0 0x00>;
84 rockchip,cmd_delay = <0>;
87 compatible = "rockchip,on-cmds";
88 rockchip,cmd_type = <LPDT>;
89 rockchip,dsi_id = <2>;
90 rockchip,cmd = <0x05 dcs_set_display_on>;
91 rockchip,cmd_delay = <10>;
94 compatible = "rockchip,on-cmds";
95 rockchip,cmd_type = <LPDT>;
96 rockchip,data_type = <DATA_TYPE_DCS>;
97 rockchip,dsi_id = <2>;
98 rockchip,cmd = <0x05 dcs_exit_sleep_mode>;
99 rockchip,cmd_delay = <10>;
103 disp_timings: display-timings {
104 native-mode = <&timing0>;
105 compatible = "rockchip,display-timings";
107 screen-type = <SCREEN_DUAL_MIPI>;
108 lvds-format = <LVDS_8BIT_2>;
109 out-face = <OUT_P888>;
110 clock-frequency = <150000000>;
115 hfront-porch = <156>;
124 pixelclk-active = <0>;