2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "imx6sl.dtsi"
16 model = "Freescale i.MX6 SoloLite EVK Board";
17 compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
20 reg = <0x80000000 0x40000000>;
24 compatible = "gpio-leds";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_led>;
30 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
31 linux,default-trigger = "heartbeat";
36 compatible = "simple-bus";
40 reg_usb_otg1_vbus: regulator@0 {
41 compatible = "regulator-fixed";
43 regulator-name = "usb_otg1_vbus";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
50 reg_usb_otg2_vbus: regulator@1 {
51 compatible = "regulator-fixed";
53 regulator-name = "usb_otg2_vbus";
54 regulator-min-microvolt = <5000000>;
55 regulator-max-microvolt = <5000000>;
60 reg_aud3v: regulator@2 {
61 compatible = "regulator-fixed";
63 regulator-name = "wm8962-supply-3v15";
64 regulator-min-microvolt = <3150000>;
65 regulator-max-microvolt = <3150000>;
69 reg_aud4v: regulator@3 {
70 compatible = "regulator-fixed";
72 regulator-name = "wm8962-supply-4v2";
73 regulator-min-microvolt = <4325000>;
74 regulator-max-microvolt = <4325000>;
80 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
81 model = "wm8962-audio";
82 ssi-controller = <&ssi2>;
83 audio-codec = <&codec>;
85 "Headphone Jack", "HPOUTL",
86 "Headphone Jack", "HPOUTR",
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_audmux3>;
103 fsl,spi-num-chipselects = <1>;
104 cs-gpios = <&gpio4 11 0>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_ecspi1>;
110 #address-cells = <1>;
112 compatible = "st,m25p32";
113 spi-max-frequency = <20000000>;
119 pinctrl-names = "default", "sleep";
120 pinctrl-0 = <&pinctrl_fec>;
121 pinctrl-1 = <&pinctrl_fec_sleep>;
127 clock-frequency = <100000>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_i2c1>;
133 compatible = "fsl,pfuze100";
138 regulator-min-microvolt = <300000>;
139 regulator-max-microvolt = <1875000>;
142 regulator-ramp-delay = <6250>;
146 regulator-min-microvolt = <300000>;
147 regulator-max-microvolt = <1875000>;
150 regulator-ramp-delay = <6250>;
154 regulator-min-microvolt = <800000>;
155 regulator-max-microvolt = <3300000>;
161 regulator-min-microvolt = <400000>;
162 regulator-max-microvolt = <1975000>;
168 regulator-min-microvolt = <400000>;
169 regulator-max-microvolt = <1975000>;
175 regulator-min-microvolt = <800000>;
176 regulator-max-microvolt = <3300000>;
180 regulator-min-microvolt = <5000000>;
181 regulator-max-microvolt = <5150000>;
185 regulator-min-microvolt = <1000000>;
186 regulator-max-microvolt = <3000000>;
197 regulator-min-microvolt = <800000>;
198 regulator-max-microvolt = <1550000>;
203 regulator-min-microvolt = <800000>;
204 regulator-max-microvolt = <1550000>;
208 regulator-min-microvolt = <1800000>;
209 regulator-max-microvolt = <3300000>;
213 regulator-min-microvolt = <1800000>;
214 regulator-max-microvolt = <3300000>;
219 regulator-min-microvolt = <1800000>;
220 regulator-max-microvolt = <3300000>;
225 regulator-min-microvolt = <1800000>;
226 regulator-max-microvolt = <3300000>;
234 clock-frequency = <100000>;
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_i2c2>;
240 compatible = "wlf,wm8962";
242 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
243 DCVDD-supply = <&vgen3_reg>;
244 DBVDD-supply = <®_aud3v>;
245 AVDD-supply = <&vgen3_reg>;
246 CPVDD-supply = <&vgen3_reg>;
247 MICVDD-supply = <®_aud3v>;
248 PLLVDD-supply = <&vgen3_reg>;
249 SPKVDD1-supply = <®_aud4v>;
250 SPKVDD2-supply = <®_aud4v>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_hog>;
259 pinctrl_hog: hoggrp {
261 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
262 MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
263 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
264 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
265 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
266 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
267 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
268 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
272 pinctrl_audmux3: audmux3grp {
274 MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
275 MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
276 MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
277 MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
281 pinctrl_ecspi1: ecspi1grp {
283 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
284 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
285 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
286 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
290 pinctrl_fec: fecgrp {
292 MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0
293 MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0
294 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0
295 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0
296 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0
297 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0
298 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0
299 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0
300 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8
304 pinctrl_fec_sleep: fecgrp-sleep {
306 MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x3080
307 MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x3080
308 MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x3080
309 MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x3080
310 MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x3080
311 MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x3080
312 MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x3080
313 MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x3080
317 pinctrl_i2c1: i2c1grp {
319 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
320 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
325 pinctrl_i2c2: i2c2grp {
327 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
328 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
332 pinctrl_led: ledgrp {
334 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
338 pinctrl_kpp: kppgrp {
340 MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
341 MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010
342 MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0
343 MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0
344 MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0
345 MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
349 pinctrl_uart1: uart1grp {
351 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
352 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
356 pinctrl_usbotg1: usbotg1grp {
358 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
362 pinctrl_usdhc1: usdhc1grp {
364 MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
365 MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
366 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
367 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
368 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
369 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
370 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
371 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
372 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
373 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
377 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
379 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
380 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
381 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
382 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
383 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
384 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
385 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
386 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
387 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
388 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
392 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
394 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
395 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
396 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
397 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
398 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
399 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
400 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
401 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
402 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
403 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
407 pinctrl_usdhc2: usdhc2grp {
409 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
410 MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059
411 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
412 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
413 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
414 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
418 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
420 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
421 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
422 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
423 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
424 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
425 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
429 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
431 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
432 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
433 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
434 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
435 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
436 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
440 pinctrl_usdhc3: usdhc3grp {
442 MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059
443 MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059
444 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059
445 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
446 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
447 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
451 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
453 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
454 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
455 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
456 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
457 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
458 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
462 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
464 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
465 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
466 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
467 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
468 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
469 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
476 pinctrl-names = "default";
477 pinctrl-0 = <&pinctrl_kpp>;
479 MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
480 MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
481 MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
482 MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
483 MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
484 MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
485 MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
486 MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
496 pinctrl-names = "default";
497 pinctrl-0 = <&pinctrl_uart1>;
502 vbus-supply = <®_usb_otg1_vbus>;
503 pinctrl-names = "default";
504 pinctrl-0 = <&pinctrl_usbotg1>;
505 disable-over-current;
510 vbus-supply = <®_usb_otg2_vbus>;
512 disable-over-current;
517 pinctrl-names = "default", "state_100mhz", "state_200mhz";
518 pinctrl-0 = <&pinctrl_usdhc1>;
519 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
520 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
522 cd-gpios = <&gpio4 7 0>;
523 wp-gpios = <&gpio4 6 0>;
528 pinctrl-names = "default", "state_100mhz", "state_200mhz";
529 pinctrl-0 = <&pinctrl_usdhc2>;
530 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
531 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
532 cd-gpios = <&gpio5 0 0>;
533 wp-gpios = <&gpio4 29 0>;
538 pinctrl-names = "default", "state_100mhz", "state_200mhz";
539 pinctrl-0 = <&pinctrl_usdhc3>;
540 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
541 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
542 cd-gpios = <&gpio3 22 0>;