arch/arm/boot/dts/imx6q-sabrelite.dts

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 /dts-v1/;
  14 #include "imx6q.dtsi"
  15
  16 / {
  17         model = "Freescale i.MX6 Quad SABRE Lite Board";
  18         compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
  19
  20         memory {
  21                 reg = <0x10000000 0x40000000>;
  22         };
  23
  24         regulators {
  25                 compatible = "simple-bus";
  26
  27                 reg_2p5v: 2p5v {
  28                         compatible = "regulator-fixed";
  29                         regulator-name = "2P5V";
  30                         regulator-min-microvolt = <2500000>;
  31                         regulator-max-microvolt = <2500000>;
  32                         regulator-always-on;
  33                 };
  34
  35                 reg_3p3v: 3p3v {
  36                         compatible = "regulator-fixed";
  37                         regulator-name = "3P3V";
  38                         regulator-min-microvolt = <3300000>;
  39                         regulator-max-microvolt = <3300000>;
  40                         regulator-always-on;
  41                 };
  42
  43                 reg_usb_otg_vbus: usb_otg_vbus {
  44                         compatible = "regulator-fixed";
  45                         regulator-name = "usb_otg_vbus";
  46                         regulator-min-microvolt = <5000000>;
  47                         regulator-max-microvolt = <5000000>;
  48                         gpio = <&gpio3 22 0>;
  49                         enable-active-high;
  50                 };
  51         };
  52
  53         sound {
  54                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
  55                              "fsl,imx-audio-sgtl5000";
  56                 model = "imx6q-sabrelite-sgtl5000";
  57                 ssi-controller = <&ssi1>;
  58                 audio-codec = <&codec>;
  59                 audio-routing =
  60                         "MIC_IN", "Mic Jack",
  61                         "Mic Jack", "Mic Bias",
  62                         "Headphone Jack", "HP_OUT";
  63                 mux-int-port = <1>;
  64                 mux-ext-port = <4>;
  65         };
  66 };
  67
  68 &ecspi1 {
  69         fsl,spi-num-chipselects = <1>;
  70         cs-gpios = <&gpio3 19 0>;
  71         pinctrl-names = "default";
  72         pinctrl-0 = <&pinctrl_ecspi1_1>;
  73         status = "okay";
  74
  75         flash: m25p80@0 {
  76                 compatible = "sst,sst25vf016b";
  77                 spi-max-frequency = <20000000>;
  78                 reg = <0>;
  79         };
  80 };
  81
  82 &ssi1 {
  83         fsl,mode = "i2s-slave";
  84         status = "okay";
  85 };
  86
  87 &iomuxc {
  88         pinctrl-names = "default";
  89         pinctrl-0 = <&pinctrl_hog>;
  90
  91         hog {
  92                 pinctrl_hog: hoggrp {
  93                         fsl,pins = <
  94                                 MX6Q_PAD_NANDF_D6__GPIO2_IO06 0x80000000
  95                                 MX6Q_PAD_NANDF_D7__GPIO2_IO07 0x80000000
  96                                 MX6Q_PAD_EIM_D19__GPIO3_IO19  0x80000000
  97                                 MX6Q_PAD_EIM_D22__GPIO3_IO22  0x80000000
  98                                 MX6Q_PAD_EIM_D23__GPIO3_IO23  0x80000000
  99                                 MX6Q_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
 100                                 MX6Q_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
 101                                 MX6Q_PAD_GPIO_0__CCM_CLKO1    0x80000000
 102                         >;
 103                 };
 104         };
 105 };
 106
 107 &usbotg {
 108         vbus-supply = <&reg_usb_otg_vbus>;
 109         pinctrl-names = "default";
 110         pinctrl-0 = <&pinctrl_usbotg_1>;
 111         disable-over-current;
 112         status = "okay";
 113 };
 114
 115 &usbh1 {
 116         status = "okay";
 117 };
 118
 119 &fec {
 120         pinctrl-names = "default";
 121         pinctrl-0 = <&pinctrl_enet_1>;
 122         phy-mode = "rgmii";
 123         phy-reset-gpios = <&gpio3 23 0>;
 124         status = "okay";
 125 };
 126
 127 &usdhc3 {
 128         pinctrl-names = "default";
 129         pinctrl-0 = <&pinctrl_usdhc3_2>;
 130         cd-gpios = <&gpio7 0 0>;
 131         wp-gpios = <&gpio7 1 0>;
 132         vmmc-supply = <&reg_3p3v>;
 133         status = "okay";
 134 };
 135
 136 &usdhc4 {
 137         pinctrl-names = "default";
 138         pinctrl-0 = <&pinctrl_usdhc4_2>;
 139         cd-gpios = <&gpio2 6 0>;
 140         wp-gpios = <&gpio2 7 0>;
 141         vmmc-supply = <&reg_3p3v>;
 142         status = "okay";
 143 };
 144
 145 &audmux {
 146         status = "okay";
 147         pinctrl-names = "default";
 148         pinctrl-0 = <&pinctrl_audmux_1>;
 149 };
 150
 151 &uart2 {
 152         status = "okay";
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&pinctrl_uart2_1>;
 155 };
 156
 157 &i2c1 {
 158         status = "okay";
 159         clock-frequency = <100000>;
 160         pinctrl-names = "default";
 161         pinctrl-0 = <&pinctrl_i2c1_1>;
 162
 163         codec: sgtl5000@0a {
 164                 compatible = "fsl,sgtl5000";
 165                 reg = <0x0a>;
 166                 clocks = <&clks 169>;
 167                 VDDA-supply = <&reg_2p5v>;
 168                 VDDIO-supply = <&reg_3p3v>;
 169         };
 170 };