arch/arm/boot/dts/imx53-tx53.dtsi

   1 /*
   2  * Copyright 2012 <LW@KARO-electronics.de>
   3  * based on imx53-qsb.dts
   4  *   Copyright 2011 Freescale Semiconductor, Inc.
   5  *   Copyright 2011 Linaro Ltd.
   6  *
   7  * The code contained herein is licensed under the GNU General Public
   8  * License. You may obtain a copy of the GNU General Public License
   9  * Version 2 at the following locations:
  10  *
  11  * http://www.opensource.org/licenses/gpl-license.html
  12  * http://www.gnu.org/copyleft/gpl.html
  13  */
  14
  15 #include "imx53.dtsi"
  16 #include <dt-bindings/gpio/gpio.h>
  17
  18 / {
  19         model = "Ka-Ro electronics TX53 module";
  20         compatible = "karo,tx53", "fsl,imx53";
  21
  22         aliases {
  23                 can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
  24                 can1 = &can1;
  25                 ipu = &ipu;
  26                 reg_can_xcvr = &reg_can_xcvr;
  27                 usbh1 = &usbh1;
  28                 usbotg = &usbotg;
  29         };
  30
  31         clocks {
  32                 ckih1 {
  33                         clock-frequency = <0>;
  34                 };
  35
  36                 mclk: clock@0 {
  37                         compatible = "fixed-clock";
  38                         reg = <0>;
  39                         #clock-cells = <0>;
  40                         clock-frequency = <27000000>;
  41                 };
  42         };
  43
  44         gpio-keys {
  45                 compatible = "gpio-keys";
  46                 pinctrl-names = "default";
  47                 pinctrl-0 = <&pinctrl_gpio_key>;
  48
  49                 power {
  50                         label = "Power Button";
  51                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  52                         linux,code = <116>; /* KEY_POWER */
  53                         gpio-key,wakeup;
  54                 };
  55         };
  56
  57         leds {
  58                 compatible = "gpio-leds";
  59                 pinctrl-names = "default";
  60                 pinctrl-0 = <&pinctrl_stk5led>;
  61
  62                 user {
  63                         label = "Heartbeat";
  64                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
  65                         linux,default-trigger = "heartbeat";
  66                 };
  67         };
  68
  69         regulators {
  70                 compatible = "simple-bus";
  71                 #address-cells = <1>;
  72                 #size-cells = <0>;
  73
  74                 reg_2v5: regulator@0 {
  75                         compatible = "regulator-fixed";
  76                         reg = <0>;
  77                         regulator-name = "2V5";
  78                         regulator-min-microvolt = <2500000>;
  79                         regulator-max-microvolt = <2500000>;
  80                 };
  81
  82                 reg_3v3: regulator@1 {
  83                         compatible = "regulator-fixed";
  84                         reg = <1>;
  85                         regulator-name = "3V3";
  86                         regulator-min-microvolt = <3300000>;
  87                         regulator-max-microvolt = <3300000>;
  88                 };
  89
  90                 reg_can_xcvr: regulator@2 {
  91                         compatible = "regulator-fixed";
  92                         reg = <2>;
  93                         regulator-name = "CAN XCVR";
  94                         regulator-min-microvolt = <3300000>;
  95                         regulator-max-microvolt = <3300000>;
  96                         pinctrl-names = "default";
  97                         pinctrl-0 = <&pinctrl_can_xcvr>;
  98                         gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
  99                         enable-active-low;
 100                 };
 101
 102                 reg_usbh1_vbus: regulator@3 {
 103                         compatible = "regulator-fixed";
 104                         reg = <3>;
 105                         regulator-name = "usbh1_vbus";
 106                         regulator-min-microvolt = <5000000>;
 107                         regulator-max-microvolt = <5000000>;
 108                         pinctrl-names = "default";
 109                         pinctrl-0 = <&pinctrl_usbh1_vbus>;
 110                         gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
 111                         enable-active-high;
 112                 };
 113
 114                 reg_usbotg_vbus: regulator@4 {
 115                         compatible = "regulator-fixed";
 116                         reg = <4>;
 117                         regulator-name = "usbotg_vbus";
 118                         regulator-min-microvolt = <5000000>;
 119                         regulator-max-microvolt = <5000000>;
 120                         pinctrl-names = "default";
 121                         pinctrl-0 = <&pinctrl_usbotg_vbus>;
 122                         gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
 123                         enable-active-high;
 124                 };
 125         };
 126
 127         sound {
 128                 compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
 129                 model = "tx53-audio-sgtl5000";
 130                 ssi-controller = <&ssi1>;
 131                 audio-codec = <&sgtl5000>;
 132                 audio-routing =
 133                         "MIC_IN", "Mic Jack",
 134                         "Mic Jack", "Mic Bias",
 135                         "Headphone Jack", "HP_OUT";
 136                 /* '1' based port numbers according to datasheet names */
 137                 mux-int-port = <1>;
 138                 mux-ext-port = <5>;
 139         };
 140 };
 141
 142 &audmux {
 143         pinctrl-names = "default";
 144         pinctrl-0 = <&pinctrl_ssi1>;
 145         status = "okay";
 146 };
 147
 148 &can1 {
 149         pinctrl-names = "default";
 150         pinctrl-0 = <&pinctrl_can1>;
 151         xceiver-supply = <&reg_can_xcvr>;
 152         status = "okay";
 153 };
 154
 155 &can2 {
 156         pinctrl-names = "default";
 157         pinctrl-0 = <&pinctrl_can2>;
 158         xceiver-supply = <&reg_can_xcvr>;
 159         status = "okay";
 160 };
 161
 162 &ecspi1 {
 163         pinctrl-names = "default";
 164         pinctrl-0 = <&pinctrl_ecspi1>;
 165         fsl,spi-num-chipselects = <2>;
 166         status = "okay";
 167
 168         cs-gpios = <
 169                 &gpio2 30 GPIO_ACTIVE_HIGH
 170                 &gpio3 19 GPIO_ACTIVE_HIGH
 171         >;
 172
 173         spidev0: spi@0 {
 174                 compatible = "spidev";
 175                 reg = <0>;
 176                 spi-max-frequency = <54000000>;
 177         };
 178
 179         spidev1: spi@1 {
 180                 compatible = "spidev";
 181                 reg = <1>;
 182                 spi-max-frequency = <54000000>;
 183         };
 184 };
 185
 186 &esdhc1 {
 187         cd-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
 188         fsl,wp-controller;
 189         pinctrl-names = "default";
 190         pinctrl-0 = <&pinctrl_esdhc1>;
 191         status = "okay";
 192 };
 193
 194 &esdhc2 {
 195         cd-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>;
 196         fsl,wp-controller;
 197         pinctrl-names = "default";
 198         pinctrl-0 = <&pinctrl_esdhc2>;
 199         status = "okay";
 200 };
 201
 202 &fec {
 203         pinctrl-names = "default";
 204         pinctrl-0 = <&pinctrl_fec>;
 205         phy-mode = "rmii";
 206         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
 207         phy-handle = <&phy0>;
 208         mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
 209         status = "okay";
 210
 211         phy0: ethernet-phy@0 {
 212                 interrupt-parent = <&gpio2>;
 213                 interrupts = <4>;
 214                 device_type = "ethernet-phy";
 215         };
 216 };
 217
 218 &i2c1 {
 219         pinctrl-names = "default";
 220         pinctrl-0 = <&pinctrl_i2c1>;
 221         clock-frequency = <400000>;
 222         status = "okay";
 223
 224         rtc1: ds1339@68 {
 225                 compatible = "dallas,ds1339";
 226                 reg = <0x68>;
 227                 pinctrl-names = "default";
 228                 pinctrl-0 = <&pinctrl_ds1339>;
 229                 interrupt-parent = <&gpio4>;
 230                 interrupts = <20 0>;
 231         };
 232 };
 233
 234 &iomuxc {
 235         pinctrl-names = "default";
 236         pinctrl-0 = <&pinctrl_hog>;
 237
 238         imx53-tx53 {
 239                 pinctrl_hog: hoggrp {
 240                         /* pins not in use by any device on the Starterkit board series */
 241                         fsl,pins = <
 242                                 /* CMOS Sensor Interface */
 243                                 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
 244                                 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
 245                                 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
 246                                 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
 247                                 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
 248                                 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
 249                                 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
 250                                 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
 251                                 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
 252                                 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
 253                                 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
 254                                 MX53_PAD_GPIO_0__GPIO1_0 0x1f4
 255                                 /* Module Specific Signal */
 256                                 /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
 257                                 /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
 258                                 MX53_PAD_EIM_D29__GPIO3_29 0x1f4
 259                                 MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
 260                                 /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
 261                                 /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
 262                                 MX53_PAD_EIM_A19__GPIO2_19 0x1f4
 263                                 MX53_PAD_EIM_A20__GPIO2_18 0x1f4
 264                                 MX53_PAD_EIM_A21__GPIO2_17 0x1f4
 265                                 MX53_PAD_EIM_A22__GPIO2_16 0x1f4
 266                                 MX53_PAD_EIM_A23__GPIO6_6 0x1f4
 267                                 MX53_PAD_EIM_A24__GPIO5_4 0x1f4
 268                                 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
 269                                 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
 270                                 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
 271                                 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
 272                                 /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
 273                                 /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
 274                                 MX53_PAD_GPIO_13__GPIO4_3 0x1f4
 275                                 MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
 276                                 MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
 277                                 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
 278                                 MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
 279                                 MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
 280                                 MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
 281                                 MX53_PAD_EIM_OE__GPIO2_25 0x1f4
 282                                 MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
 283                                 MX53_PAD_EIM_RW__GPIO2_26 0x1f4
 284                                 MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
 285                                 MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
 286                                 MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
 287                                 MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
 288                                 MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
 289                                 MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
 290                                 MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
 291                                 MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
 292                                 >;
 293                 };
 294
 295                 pinctrl_can1: can1grp {
 296                         fsl,pins = <
 297                                 MX53_PAD_GPIO_7__CAN1_TXCAN             0x80000000
 298                                 MX53_PAD_GPIO_8__CAN1_RXCAN             0x80000000
 299                         >;
 300                 };
 301
 302                 pinctrl_can2: can2grp {
 303                         fsl,pins = <
 304                                 MX53_PAD_KEY_COL4__CAN2_TXCAN           0x80000000
 305                                 MX53_PAD_KEY_ROW4__CAN2_RXCAN           0x80000000
 306                         >;
 307                 };
 308
 309                 pinctrl_can_xcvr: can-xcvrgrp {
 310                         fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
 311                 };
 312
 313                 pinctrl_ds1339: ds1339grp {
 314                         fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
 315                 };
 316
 317                 pinctrl_ecspi1: ecspi1grp {
 318                         fsl,pins = <
 319                                 MX53_PAD_GPIO_19__ECSPI1_RDY            0x80000000
 320                                 MX53_PAD_EIM_EB2__ECSPI1_SS0            0x80000000
 321                                 MX53_PAD_EIM_D16__ECSPI1_SCLK           0x80000000
 322                                 MX53_PAD_EIM_D17__ECSPI1_MISO           0x80000000
 323                                 MX53_PAD_EIM_D18__ECSPI1_MOSI           0x80000000
 324                                 MX53_PAD_EIM_D19__ECSPI1_SS1            0x80000000
 325                         >;
 326                 };
 327
 328                 pinctrl_esdhc1: esdhc1grp {
 329                         fsl,pins = <
 330                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
 331                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
 332                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
 333                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
 334                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
 335                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
 336                                 MX53_PAD_EIM_D24__GPIO3_24 0x1f0
 337                         >;
 338                 };
 339
 340                 pinctrl_esdhc2: esdhc2grp {
 341                         fsl,pins = <
 342                                 MX53_PAD_SD2_CMD__ESDHC2_CMD            0x1d5
 343                                 MX53_PAD_SD2_CLK__ESDHC2_CLK            0x1d5
 344                                 MX53_PAD_SD2_DATA0__ESDHC2_DAT0         0x1d5
 345                                 MX53_PAD_SD2_DATA1__ESDHC2_DAT1         0x1d5
 346                                 MX53_PAD_SD2_DATA2__ESDHC2_DAT2         0x1d5
 347                                 MX53_PAD_SD2_DATA3__ESDHC2_DAT3         0x1d5
 348                                 MX53_PAD_EIM_D25__GPIO3_25 0x1f0
 349                         >;
 350                 };
 351
 352                 pinctrl_fec: fecgrp {
 353                         fsl,pins = <
 354                                 MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
 355                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
 356                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
 357                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
 358                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
 359                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
 360                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
 361                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
 362                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
 363                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
 364                         >;
 365                 };
 366
 367                 pinctrl_gpio_key: gpio-keygrp {
 368                         fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
 369                 };
 370
 371                 pinctrl_i2c1: i2c1grp {
 372                         fsl,pins = <
 373                                 MX53_PAD_EIM_D21__I2C1_SCL              0xc0000000
 374                                 MX53_PAD_EIM_D28__I2C1_SDA              0xc0000000
 375                         >;
 376                 };
 377
 378                 pinctrl_i2c3: i2c3grp {
 379                         fsl,pins = <
 380                                 MX53_PAD_GPIO_3__I2C3_SCL               0xc0000000
 381                                 MX53_PAD_GPIO_6__I2C3_SDA               0xc0000000
 382                         >;
 383                 };
 384
 385                 pinctrl_nand: nandgrp {
 386                         fsl,pins = <
 387                                 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B     0x4
 388                                 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B     0x4
 389                                 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE       0x4
 390                                 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE       0x4
 391                                 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B     0xe0
 392                                 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0      0xe0
 393                                 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0      0x4
 394                                 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0    0xa4
 395                                 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1    0xa4
 396                                 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2    0xa4
 397                                 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3    0xa4
 398                                 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4    0xa4
 399                                 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5    0xa4
 400                                 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6    0xa4
 401                                 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7    0xa4
 402                         >;
 403                 };
 404
 405                 pinctrl_pwm2: pwm2grp {
 406                         fsl,pins = <
 407                                 MX53_PAD_GPIO_1__PWM2_PWMO              0x80000000
 408                         >;
 409                 };
 410
 411                 pinctrl_ssi1: ssi1grp {
 412                         fsl,pins = <
 413                                 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC      0x80000000
 414                                 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD      0x80000000
 415                                 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS     0x80000000
 416                                 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD      0x80000000
 417                         >;
 418                 };
 419
 420                 pinctrl_ssi2: ssi2grp {
 421                         fsl,pins = <
 422                                 MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC     0x80000000
 423                                 MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD     0x80000000
 424                                 MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS    0x80000000
 425                                 MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD     0x80000000
 426                                 MX53_PAD_EIM_D27__GPIO3_27 0x1f0
 427                         >;
 428                 };
 429
 430                 pinctrl_stk5led: stk5ledgrp {
 431                         fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
 432                 };
 433
 434                 pinctrl_uart1: uart1grp {
 435                         fsl,pins = <
 436                                 MX53_PAD_PATA_DIOW__UART1_TXD_MUX       0x1e4
 437                                 MX53_PAD_PATA_DMACK__UART1_RXD_MUX      0x1e4
 438                                 MX53_PAD_PATA_RESET_B__UART1_CTS        0x1c5
 439                                 MX53_PAD_PATA_IORDY__UART1_RTS          0x1c5
 440                         >;
 441                 };
 442
 443                 pinctrl_uart2: uart2grp {
 444                         fsl,pins = <
 445                                 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX  0x1c5
 446                                 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX      0x1c5
 447                                 MX53_PAD_PATA_DIOR__UART2_RTS           0x1c5
 448                                 MX53_PAD_PATA_INTRQ__UART2_CTS          0x1c5
 449                         >;
 450                 };
 451
 452                 pinctrl_uart3: uart3grp {
 453                         fsl,pins = <
 454                                 MX53_PAD_PATA_CS_0__UART3_TXD_MUX       0x1e4
 455                                 MX53_PAD_PATA_CS_1__UART3_RXD_MUX       0x1e4
 456                                 MX53_PAD_PATA_DA_1__UART3_CTS           0x1e4
 457                                 MX53_PAD_PATA_DA_2__UART3_RTS           0x1e4
 458                         >;
 459                 };
 460
 461                 pinctrl_usbh1: usbh1grp {
 462                         fsl,pins = <
 463                                 MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
 464                         >;
 465                 };
 466
 467                 pinctrl_usbh1_vbus: usbh1-vbusgrp {
 468                         fsl,pins = <
 469                                 MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
 470                         >;
 471                 };
 472
 473                 pinctrl_usbotg_vbus: usbotg-vbusgrp {
 474                         fsl,pins = <
 475                                 MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
 476                                 MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
 477                         >;
 478                 };
 479         };
 480 };
 481
 482 &ipu {
 483         status = "okay";
 484 };
 485
 486 &nfc {
 487         pinctrl-names = "default";
 488         pinctrl-0 = <&pinctrl_nand>;
 489         nand-bus-width = <8>;
 490         nand-ecc-mode = "hw";
 491         nand-on-flash-bbt;
 492         status = "okay";
 493 };
 494
 495 &pwm2 {
 496         pinctrl-names = "default";
 497         pinctrl-0 = <&pinctrl_pwm2>;
 498         #pwm-cells = <3>;
 499 };
 500
 501 &sdma {
 502         fsl,sdma-ram-script-name = "sdma-imx53.bin";
 503 };
 504
 505 &ssi1 {
 506         fsl,mode = "i2s-slave";
 507         codec-handle = <&sgtl5000>;
 508         status = "okay";
 509 };
 510
 511 &ssi2 {
 512         status = "disabled";
 513 };
 514
 515 &uart1 {
 516         pinctrl-names = "default";
 517         pinctrl-0 = <&pinctrl_uart1>;
 518         fsl,uart-has-rtscts;
 519         status = "okay";
 520 };
 521
 522 &uart2 {
 523         pinctrl-names = "default";
 524         pinctrl-0 = <&pinctrl_uart2>;
 525         fsl,uart-has-rtscts;
 526         status = "okay";
 527 };
 528
 529 &uart3 {
 530         pinctrl-names = "default";
 531         pinctrl-0 = <&pinctrl_uart3>;
 532         fsl,uart-has-rtscts;
 533         status = "okay";
 534 };
 535
 536 &usbh1 {
 537         pinctrl-names = "default";
 538         pinctrl-0 = <&pinctrl_usbh1>;
 539         phy_type = "utmi";
 540         disable-over-current;
 541         vbus-supply = <&reg_usbh1_vbus>;
 542         status = "okay";
 543 };
 544
 545 &usbotg {
 546         phy_type = "utmi";
 547         dr_mode = "peripheral";
 548         disable-over-current;
 549         vbus-supply = <&reg_usbotg_vbus>;
 550         status = "okay";
 551 };