arch/arm/boot/dts/imx51-apf51dev.dts

   1 /*
   2  * Copyright 2013 Armadeus Systems - <support@armadeus.com>
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 /* APF51Dev is a docking board for the APF51 SOM */
  13 #include "imx51-apf51.dts"
  14
  15 / {
  16         model = "Armadeus Systems APF51Dev docking/development board";
  17         compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
  18
  19         display@di1 {
  20                 compatible = "fsl,imx-parallel-display";
  21                 interface-pix-fmt = "bgr666";
  22                 pinctrl-names = "default";
  23                 pinctrl-0 = <&pinctrl_ipu_disp1_1>;
  24
  25                 display-timings {
  26                         lw700 {
  27                                 native-mode;
  28                                 clock-frequency = <33000033>;
  29                                 hactive = <800>;
  30                                 vactive = <480>;
  31                                 hback-porch = <96>;
  32                                 hfront-porch = <96>;
  33                                 vback-porch = <20>;
  34                                 vfront-porch = <21>;
  35                                 hsync-len = <64>;
  36                                 vsync-len = <4>;
  37                                 hsync-active = <1>;
  38                                 vsync-active = <1>;
  39                                 de-active = <1>;
  40                                 pixelclk-active = <0>;
  41                         };
  42                 };
  43
  44                 port {
  45                         display_in: endpoint {
  46                                 remote-endpoint = <&ipu_di0_disp0>;
  47                         };
  48                 };
  49         };
  50
  51         gpio-keys {
  52                 compatible = "gpio-keys";
  53
  54                 user-key {
  55                         label = "user";
  56                         gpios = <&gpio1 3 0>;
  57                         linux,code = <256>; /* BTN_0 */
  58                 };
  59         };
  60
  61         leds {
  62                 compatible = "gpio-leds";
  63
  64                 user {
  65                         label = "Heartbeat";
  66                         gpios = <&gpio1 2 0>;
  67                         linux,default-trigger = "heartbeat";
  68                 };
  69         };
  70 };
  71
  72 &ecspi1 {
  73         pinctrl-names = "default";
  74         pinctrl-0 = <&pinctrl_ecspi1_1>;
  75         fsl,spi-num-chipselects = <2>;
  76         cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
  77         status = "okay";
  78 };
  79
  80 &ecspi2 {
  81         pinctrl-names = "default";
  82         pinctrl-0 = <&pinctrl_ecspi2_1>;
  83         fsl,spi-num-chipselects = <2>;
  84         cs-gpios = <&gpio3 28 1>, <&gpio3 27 1>;
  85         status = "okay";
  86 };
  87
  88 &esdhc1 {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&pinctrl_esdhc1_1>;
  91         cd-gpios = <&gpio2 29 0>;
  92         bus-width = <4>;
  93         status = "okay";
  94 };
  95
  96 &esdhc2 {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&pinctrl_esdhc2_1>;
  99         bus-width = <4>;
 100         non-removable;
 101         status = "okay";
 102 };
 103
 104 &i2c2 {
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&pinctrl_i2c2_2>;
 107         status = "okay";
 108 };
 109
 110 &iomuxc {
 111         pinctrl-names = "default";
 112         pinctrl-0 = <&pinctrl_hog>;
 113
 114         hog {
 115                 pinctrl_hog: hoggrp {
 116                         fsl,pins = <
 117                                 MX51_PAD_EIM_EB2__GPIO2_22   0x0C5
 118                                 MX51_PAD_EIM_EB3__GPIO2_23   0x0C5
 119                                 MX51_PAD_EIM_CS4__GPIO2_29   0x100
 120                                 MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
 121                                 MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
 122                                 MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
 123                                 MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
 124                                 MX51_PAD_GPIO1_2__GPIO1_2    0x0C5
 125                                 MX51_PAD_GPIO1_3__GPIO1_3    0x0C5
 126                         >;
 127                 };
 128         };
 129 };
 130
 131 &ipu_di0_disp0 {
 132         remote-endpoint = <&display_in>;
 133 };