Merge remote-tracking branch 'spi/topic/dt' into spi-next
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / imx27.dtsi
1 /*
2  * Copyright 2012 Sascha Hauer, Pengutronix
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 #include "skeleton.dtsi"
13 #include "imx27-pinfunc.h"
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16
17 / {
18         aliases {
19                 gpio0 = &gpio1;
20                 gpio1 = &gpio2;
21                 gpio2 = &gpio3;
22                 gpio3 = &gpio4;
23                 gpio4 = &gpio5;
24                 gpio5 = &gpio6;
25                 i2c0 = &i2c1;
26                 i2c1 = &i2c2;
27                 serial0 = &uart1;
28                 serial1 = &uart2;
29                 serial2 = &uart3;
30                 serial3 = &uart4;
31                 serial4 = &uart5;
32                 serial5 = &uart6;
33                 spi0 = &cspi1;
34                 spi1 = &cspi2;
35                 spi2 = &cspi3;
36         };
37
38         aitc: aitc-interrupt-controller@e0000000 {
39                 compatible = "fsl,imx27-aitc", "fsl,avic";
40                 interrupt-controller;
41                 #interrupt-cells = <1>;
42                 reg = <0x10040000 0x1000>;
43         };
44
45         clocks {
46                 #address-cells = <1>;
47                 #size-cells = <0>;
48
49                 osc26m {
50                         compatible = "fsl,imx-osc26m", "fixed-clock";
51                         #clock-cells = <0>;
52                         clock-frequency = <26000000>;
53                 };
54         };
55
56         cpus {
57                 #size-cells = <0>;
58                 #address-cells = <1>;
59
60                 cpu: cpu@0 {
61                         device_type = "cpu";
62                         compatible = "arm,arm926ej-s";
63                         operating-points = <
64                                 /* kHz uV */
65                                 266000 1300000
66                                 399000 1450000
67                         >;
68                         clock-latency = <62500>;
69                         clocks = <&clks 18>;
70                         voltage-tolerance = <5>;
71                 };
72         };
73
74         usbphy {
75                 compatible = "simple-bus";
76                 #address-cells = <1>;
77                 #size-cells = <0>;
78
79                 usbphy0: usbphy@0 {
80                         compatible = "usb-nop-xceiv";
81                         reg = <0>;
82                         clocks = <&clks 75>;
83                         clock-names = "main_clk";
84                 };
85
86                 usbphy2: usbphy@2 {
87                         compatible = "usb-nop-xceiv";
88                         reg = <2>;
89                         clocks = <&clks 75>;
90                         clock-names = "main_clk";
91                 };
92         };
93
94         soc {
95                 #address-cells = <1>;
96                 #size-cells = <1>;
97                 compatible = "simple-bus";
98                 interrupt-parent = <&aitc>;
99                 ranges;
100
101                 aipi@10000000 { /* AIPI1 */
102                         compatible = "fsl,aipi-bus", "simple-bus";
103                         #address-cells = <1>;
104                         #size-cells = <1>;
105                         reg = <0x10000000 0x20000>;
106                         ranges;
107
108                         dma: dma@10001000 {
109                                 compatible = "fsl,imx27-dma";
110                                 reg = <0x10001000 0x1000>;
111                                 interrupts = <32>;
112                                 clocks = <&clks 50>, <&clks 70>;
113                                 clock-names = "ipg", "ahb";
114                                 #dma-cells = <1>;
115                                 #dma-channels = <16>;
116                         };
117
118                         wdog: wdog@10002000 {
119                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
120                                 reg = <0x10002000 0x1000>;
121                                 interrupts = <27>;
122                                 clocks = <&clks 74>;
123                         };
124
125                         gpt1: timer@10003000 {
126                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
127                                 reg = <0x10003000 0x1000>;
128                                 interrupts = <26>;
129                                 clocks = <&clks 46>, <&clks 61>;
130                                 clock-names = "ipg", "per";
131                         };
132
133                         gpt2: timer@10004000 {
134                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
135                                 reg = <0x10004000 0x1000>;
136                                 interrupts = <25>;
137                                 clocks = <&clks 45>, <&clks 61>;
138                                 clock-names = "ipg", "per";
139                         };
140
141                         gpt3: timer@10005000 {
142                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
143                                 reg = <0x10005000 0x1000>;
144                                 interrupts = <24>;
145                                 clocks = <&clks 44>, <&clks 61>;
146                                 clock-names = "ipg", "per";
147                         };
148
149                         pwm: pwm@10006000 {
150                                 #pwm-cells = <2>;
151                                 compatible = "fsl,imx27-pwm";
152                                 reg = <0x10006000 0x1000>;
153                                 interrupts = <23>;
154                                 clocks = <&clks 34>, <&clks 61>;
155                                 clock-names = "ipg", "per";
156                         };
157
158                         kpp: kpp@10008000 {
159                                 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
160                                 reg = <0x10008000 0x1000>;
161                                 interrupts = <21>;
162                                 clocks = <&clks 37>;
163                                 status = "disabled";
164                         };
165
166                         owire: owire@10009000 {
167                                 compatible = "fsl,imx27-owire", "fsl,imx21-owire";
168                                 reg = <0x10009000 0x1000>;
169                                 clocks = <&clks 35>;
170                                 status = "disabled";
171                         };
172
173                         uart1: serial@1000a000 {
174                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
175                                 reg = <0x1000a000 0x1000>;
176                                 interrupts = <20>;
177                                 clocks = <&clks 81>, <&clks 61>;
178                                 clock-names = "ipg", "per";
179                                 status = "disabled";
180                         };
181
182                         uart2: serial@1000b000 {
183                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
184                                 reg = <0x1000b000 0x1000>;
185                                 interrupts = <19>;
186                                 clocks = <&clks 80>, <&clks 61>;
187                                 clock-names = "ipg", "per";
188                                 status = "disabled";
189                         };
190
191                         uart3: serial@1000c000 {
192                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
193                                 reg = <0x1000c000 0x1000>;
194                                 interrupts = <18>;
195                                 clocks = <&clks 79>, <&clks 61>;
196                                 clock-names = "ipg", "per";
197                                 status = "disabled";
198                         };
199
200                         uart4: serial@1000d000 {
201                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
202                                 reg = <0x1000d000 0x1000>;
203                                 interrupts = <17>;
204                                 clocks = <&clks 78>, <&clks 61>;
205                                 clock-names = "ipg", "per";
206                                 status = "disabled";
207                         };
208
209                         cspi1: cspi@1000e000 {
210                                 #address-cells = <1>;
211                                 #size-cells = <0>;
212                                 compatible = "fsl,imx27-cspi";
213                                 reg = <0x1000e000 0x1000>;
214                                 interrupts = <16>;
215                                 clocks = <&clks 53>, <&clks 60>;
216                                 clock-names = "ipg", "per";
217                                 status = "disabled";
218                         };
219
220                         cspi2: cspi@1000f000 {
221                                 #address-cells = <1>;
222                                 #size-cells = <0>;
223                                 compatible = "fsl,imx27-cspi";
224                                 reg = <0x1000f000 0x1000>;
225                                 interrupts = <15>;
226                                 clocks = <&clks 52>, <&clks 60>;
227                                 clock-names = "ipg", "per";
228                                 status = "disabled";
229                         };
230
231                         ssi1: ssi@10010000 {
232                                 #sound-dai-cells = <0>;
233                                 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
234                                 reg = <0x10010000 0x1000>;
235                                 interrupts = <14>;
236                                 clocks = <&clks 26>;
237                                 dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>;
238                                 dma-names = "rx0", "tx0", "rx1", "tx1";
239                                 fsl,fifo-depth = <8>;
240                                 status = "disabled";
241                         };
242
243                         ssi2: ssi@10011000 {
244                                 #sound-dai-cells = <0>;
245                                 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
246                                 reg = <0x10011000 0x1000>;
247                                 interrupts = <13>;
248                                 clocks = <&clks 25>;
249                                 dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>;
250                                 dma-names = "rx0", "tx0", "rx1", "tx1";
251                                 fsl,fifo-depth = <8>;
252                                 status = "disabled";
253                         };
254
255                         i2c1: i2c@10012000 {
256                                 #address-cells = <1>;
257                                 #size-cells = <0>;
258                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
259                                 reg = <0x10012000 0x1000>;
260                                 interrupts = <12>;
261                                 clocks = <&clks 40>;
262                                 status = "disabled";
263                         };
264
265                         sdhci1: sdhci@10013000 {
266                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
267                                 reg = <0x10013000 0x1000>;
268                                 interrupts = <11>;
269                                 clocks = <&clks 30>, <&clks 60>;
270                                 clock-names = "ipg", "per";
271                                 dmas = <&dma 7>;
272                                 dma-names = "rx-tx";
273                                 status = "disabled";
274                         };
275
276                         sdhci2: sdhci@10014000 {
277                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
278                                 reg = <0x10014000 0x1000>;
279                                 interrupts = <10>;
280                                 clocks = <&clks 29>, <&clks 60>;
281                                 clock-names = "ipg", "per";
282                                 dmas = <&dma 6>;
283                                 dma-names = "rx-tx";
284                                 status = "disabled";
285                         };
286
287                         iomuxc: iomuxc@10015000 {
288                                 compatible = "fsl,imx27-iomuxc";
289                                 reg = <0x10015000 0x600>;
290                                 #address-cells = <1>;
291                                 #size-cells = <1>;
292                                 ranges;
293
294                                 gpio1: gpio@10015000 {
295                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
296                                         reg = <0x10015000 0x100>;
297                                         interrupts = <8>;
298                                         gpio-controller;
299                                         #gpio-cells = <2>;
300                                         interrupt-controller;
301                                         #interrupt-cells = <2>;
302                                 };
303
304                                 gpio2: gpio@10015100 {
305                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
306                                         reg = <0x10015100 0x100>;
307                                         interrupts = <8>;
308                                         gpio-controller;
309                                         #gpio-cells = <2>;
310                                         interrupt-controller;
311                                         #interrupt-cells = <2>;
312                                 };
313
314                                 gpio3: gpio@10015200 {
315                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
316                                         reg = <0x10015200 0x100>;
317                                         interrupts = <8>;
318                                         gpio-controller;
319                                         #gpio-cells = <2>;
320                                         interrupt-controller;
321                                         #interrupt-cells = <2>;
322                                 };
323
324                                 gpio4: gpio@10015300 {
325                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
326                                         reg = <0x10015300 0x100>;
327                                         interrupts = <8>;
328                                         gpio-controller;
329                                         #gpio-cells = <2>;
330                                         interrupt-controller;
331                                         #interrupt-cells = <2>;
332                                 };
333
334                                 gpio5: gpio@10015400 {
335                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
336                                         reg = <0x10015400 0x100>;
337                                         interrupts = <8>;
338                                         gpio-controller;
339                                         #gpio-cells = <2>;
340                                         interrupt-controller;
341                                         #interrupt-cells = <2>;
342                                 };
343
344                                 gpio6: gpio@10015500 {
345                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
346                                         reg = <0x10015500 0x100>;
347                                         interrupts = <8>;
348                                         gpio-controller;
349                                         #gpio-cells = <2>;
350                                         interrupt-controller;
351                                         #interrupt-cells = <2>;
352                                 };
353                         };
354
355                         audmux: audmux@10016000 {
356                                 compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
357                                 reg = <0x10016000 0x1000>;
358                                 clocks = <&clks 0>;
359                                 clock-names = "audmux";
360                                 status = "disabled";
361                         };
362
363                         cspi3: cspi@10017000 {
364                                 #address-cells = <1>;
365                                 #size-cells = <0>;
366                                 compatible = "fsl,imx27-cspi";
367                                 reg = <0x10017000 0x1000>;
368                                 interrupts = <6>;
369                                 clocks = <&clks 51>, <&clks 60>;
370                                 clock-names = "ipg", "per";
371                                 status = "disabled";
372                         };
373
374                         gpt4: timer@10019000 {
375                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
376                                 reg = <0x10019000 0x1000>;
377                                 interrupts = <4>;
378                                 clocks = <&clks 43>, <&clks 61>;
379                                 clock-names = "ipg", "per";
380                         };
381
382                         gpt5: timer@1001a000 {
383                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
384                                 reg = <0x1001a000 0x1000>;
385                                 interrupts = <3>;
386                                 clocks = <&clks 42>, <&clks 61>;
387                                 clock-names = "ipg", "per";
388                         };
389
390                         uart5: serial@1001b000 {
391                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
392                                 reg = <0x1001b000 0x1000>;
393                                 interrupts = <49>;
394                                 clocks = <&clks 77>, <&clks 61>;
395                                 clock-names = "ipg", "per";
396                                 status = "disabled";
397                         };
398
399                         uart6: serial@1001c000 {
400                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
401                                 reg = <0x1001c000 0x1000>;
402                                 interrupts = <48>;
403                                 clocks = <&clks 78>, <&clks 61>;
404                                 clock-names = "ipg", "per";
405                                 status = "disabled";
406                         };
407
408                         i2c2: i2c@1001d000 {
409                                 #address-cells = <1>;
410                                 #size-cells = <0>;
411                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
412                                 reg = <0x1001d000 0x1000>;
413                                 interrupts = <1>;
414                                 clocks = <&clks 39>;
415                                 status = "disabled";
416                         };
417
418                         sdhci3: sdhci@1001e000 {
419                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
420                                 reg = <0x1001e000 0x1000>;
421                                 interrupts = <9>;
422                                 clocks = <&clks 28>, <&clks 60>;
423                                 clock-names = "ipg", "per";
424                                 dmas = <&dma 36>;
425                                 dma-names = "rx-tx";
426                                 status = "disabled";
427                         };
428
429                         gpt6: timer@1001f000 {
430                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
431                                 reg = <0x1001f000 0x1000>;
432                                 interrupts = <2>;
433                                 clocks = <&clks 41>, <&clks 61>;
434                                 clock-names = "ipg", "per";
435                         };
436                 };
437
438                 aipi@10020000 { /* AIPI2 */
439                         compatible = "fsl,aipi-bus", "simple-bus";
440                         #address-cells = <1>;
441                         #size-cells = <1>;
442                         reg = <0x10020000 0x20000>;
443                         ranges;
444
445                         fb: fb@10021000 {
446                                 compatible = "fsl,imx27-fb", "fsl,imx21-fb";
447                                 interrupts = <61>;
448                                 reg = <0x10021000 0x1000>;
449                                 clocks = <&clks 36>, <&clks 65>, <&clks 59>;
450                                 clock-names = "ipg", "ahb", "per";
451                                 status = "disabled";
452                         };
453
454                         coda: coda@10023000 {
455                                 compatible = "fsl,imx27-vpu";
456                                 reg = <0x10023000 0x0200>;
457                                 interrupts = <53>;
458                                 clocks = <&clks 57>, <&clks 66>;
459                                 clock-names = "per", "ahb";
460                                 iram = <&iram>;
461                         };
462
463                         usbotg: usb@10024000 {
464                                 compatible = "fsl,imx27-usb";
465                                 reg = <0x10024000 0x200>;
466                                 interrupts = <56>;
467                                 clocks = <&clks 15>;
468                                 fsl,usbmisc = <&usbmisc 0>;
469                                 fsl,usbphy = <&usbphy0>;
470                                 status = "disabled";
471                         };
472
473                         usbh1: usb@10024200 {
474                                 compatible = "fsl,imx27-usb";
475                                 reg = <0x10024200 0x200>;
476                                 interrupts = <54>;
477                                 clocks = <&clks 15>;
478                                 fsl,usbmisc = <&usbmisc 1>;
479                                 status = "disabled";
480                         };
481
482                         usbh2: usb@10024400 {
483                                 compatible = "fsl,imx27-usb";
484                                 reg = <0x10024400 0x200>;
485                                 interrupts = <55>;
486                                 clocks = <&clks 15>;
487                                 fsl,usbmisc = <&usbmisc 2>;
488                                 fsl,usbphy = <&usbphy2>;
489                                 status = "disabled";
490                         };
491
492                         usbmisc: usbmisc@10024600 {
493                                 #index-cells = <1>;
494                                 compatible = "fsl,imx27-usbmisc";
495                                 reg = <0x10024600 0x200>;
496                                 clocks = <&clks 62>;
497                         };
498
499                         sahara2: sahara@10025000 {
500                                 compatible = "fsl,imx27-sahara";
501                                 reg = <0x10025000 0x1000>;
502                                 interrupts = <59>;
503                                 clocks = <&clks 32>, <&clks 64>;
504                                 clock-names = "ipg", "ahb";
505                         };
506
507                         clks: ccm@10027000{
508                                 compatible = "fsl,imx27-ccm";
509                                 reg = <0x10027000 0x1000>;
510                                 #clock-cells = <1>;
511                         };
512
513                         iim: iim@10028000 {
514                                 compatible = "fsl,imx27-iim";
515                                 reg = <0x10028000 0x1000>;
516                                 interrupts = <62>;
517                                 clocks = <&clks 38>;
518                         };
519
520                         fec: ethernet@1002b000 {
521                                 compatible = "fsl,imx27-fec";
522                                 reg = <0x1002b000 0x4000>;
523                                 interrupts = <50>;
524                                 clocks = <&clks 48>, <&clks 67>;
525                                 clock-names = "ipg", "ahb";
526                                 status = "disabled";
527                         };
528                 };
529
530                 nfc: nand@d8000000 {
531                         #address-cells = <1>;
532                         #size-cells = <1>;
533                         compatible = "fsl,imx27-nand";
534                         reg = <0xd8000000 0x1000>;
535                         interrupts = <29>;
536                         clocks = <&clks 54>;
537                         status = "disabled";
538                 };
539
540                 weim: weim@d8002000 {
541                         #address-cells = <2>;
542                         #size-cells = <1>;
543                         compatible = "fsl,imx27-weim";
544                         reg = <0xd8002000 0x1000>;
545                         clocks = <&clks 0>;
546                         ranges = <
547                                 0 0 0xc0000000 0x08000000
548                                 1 0 0xc8000000 0x08000000
549                                 2 0 0xd0000000 0x02000000
550                                 3 0 0xd2000000 0x02000000
551                                 4 0 0xd4000000 0x02000000
552                                 5 0 0xd6000000 0x02000000
553                         >;
554                         status = "disabled";
555                 };
556
557                 iram: iram@ffff4c00 {
558                         compatible = "mmio-sram";
559                         reg = <0xffff4c00 0xb400>;
560                 };
561         };
562 };