2 * The code contained herein is licensed under the GNU General Public
3 * License. You may obtain a copy of the GNU General Public License
4 * Version 2 or later at the following locations:
6 * http://www.opensource.org/licenses/gpl-license.html
7 * http://www.gnu.org/copyleft/gpl.html
10 #include "imx27-phytec-phycore-som.dtsi"
13 model = "Phytec pcm970";
14 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
18 fsl,spi-num-chipselects = <2>;
19 cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
20 <&gpio4 27 GPIO_ACTIVE_LOW>;
24 clock-frequency = <400000>;
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_i2c1>;
30 compatible = "nxp,pca9536";
39 pinctrl_i2c1: i2c1grp {
40 /* Add pullup to DATA line */
42 MX27_PAD_I2C_DATA__I2C_DATA 0x1
43 MX27_PAD_I2C_CLK__I2C_CLK 0x0
47 pinctrl_owire1: owire1grp {
49 MX27_PAD_RTCK__OWIRE 0x0
53 pinctrl_sdhc2: sdhc2grp {
55 MX27_PAD_SD2_CLK__SD2_CLK 0x0
56 MX27_PAD_SD2_CMD__SD2_CMD 0x0
57 MX27_PAD_SD2_D0__SD2_D0 0x0
58 MX27_PAD_SD2_D1__SD2_D1 0x0
59 MX27_PAD_SD2_D2__SD2_D2 0x0
60 MX27_PAD_SD2_D3__SD2_D3 0x0
61 MX27_PAD_SSI3_FS__GPIO3_28 0x0 /* WP */
62 MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
66 pinctrl_uart1: uart1grp {
68 MX27_PAD_UART1_TXD__UART1_TXD 0x0
69 MX27_PAD_UART1_RXD__UART1_RXD 0x0
70 MX27_PAD_UART1_CTS__UART1_CTS 0x0
71 MX27_PAD_UART1_RTS__UART1_RTS 0x0
75 pinctrl_uart2: uart2grp {
77 MX27_PAD_UART2_TXD__UART2_TXD 0x0
78 MX27_PAD_UART2_RXD__UART2_RXD 0x0
79 MX27_PAD_UART2_CTS__UART2_CTS 0x0
80 MX27_PAD_UART2_RTS__UART2_RTS 0x0
84 pinctrl_usbh2: usbh2grp {
86 MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
87 MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
88 MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
89 MX27_PAD_USBH2_STP__USBH2_STP 0x0
90 MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
91 MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
92 MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
93 MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
94 MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
95 MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
96 MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
97 MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
101 pinctrl_weim: weimgrp {
103 MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */
104 MX27_PAD_SD1_D1__GPIO5_19 0x0 /* CAN IRQ */
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_owire1>;
119 label = "system:red1:user";
124 label = "system:green1:user";
129 label = "system:blue1:user";
134 label = "system:red2:user";
139 label = "system:green2:user";
144 label = "system:blue2:user";
149 label = "system:red3:nand";
150 linux,default-trigger = "nand-disk";
155 label = "system:green3:live";
156 linux,default-trigger = "heartbeat";
161 label = "system:blue3:cpu";
162 linux,default-trigger = "cpu0";
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_sdhc2>;
170 cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
171 wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
172 vmmc-supply = <&vmmc1_reg>;
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_uart1>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_uart2>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usbh2>;
195 vbus-supply = <®_5v0>;
196 disable-over-current;
201 vcc-supply = <®_5v0>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_weim>;
209 compatible = "nxp,sja1000";
210 reg = <4 0x00000000 0x00000100>;
211 interrupt-parent = <&gpio5>;
212 interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
213 nxp,external-clock-frequency = <16000000>;
214 nxp,tx-output-config = <0x16>;
215 nxp,no-comparator-bypass;
216 fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;