2 * Copyright 2013 Armadeus Systems - <support@armadeus.com>
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 /* APF27Dev is a docking board for the APF27 SOM */
13 #include "imx27-apf27.dts"
16 model = "Armadeus Systems APF27Dev docking/development board";
17 compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27";
20 model = "Chimei-LW700AT9003";
21 native-mode = <&timing0>;
22 bits-per-pixel = <16>; /* non-standard but required */
23 fsl,pcr = <0xfae80083>; /* non-standard but required */
26 clock-frequency = <33000033>;
40 compatible = "gpio-keys";
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_gpio_keys>;
46 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
47 linux,code = <276>; /* BTN_EXTRA */
52 compatible = "gpio-leds";
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_gpio_leds>;
58 gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
59 linux,default-trigger = "heartbeat";
65 fsl,spi-num-chipselects = <1>;
66 cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>;
72 compatible = "maxim,max1027";
74 interrupt-parent = <&gpio5>;
75 interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_max1027>;
78 spi-max-frequency = <10000000>;
83 fsl,spi-num-chipselects = <3>;
84 cs-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>,
85 <&gpio4 27 GPIO_ACTIVE_LOW>,
86 <&gpio2 17 GPIO_ACTIVE_LOW>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_cspi2 &pinctrl_cspi2_cs>;
94 fsl,dmacr = <0x00020010>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_imxfb1>;
101 clock-frequency = <400000>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_i2c1>;
107 compatible = "dallas,ds1374";
113 pinctrl-names = "default";
114 pinctrl-0 = <&pinctrl_i2c2>;
120 pinctrl_cspi1: cspi1grp {
122 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
123 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
124 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
128 pinctrl_cspi1_cs: cspi1csgrp {
129 fsl,pins = <MX27_PAD_CSPI1_SS0__GPIO4_28 0x0>;
132 pinctrl_cspi2: cspi2grp {
134 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
135 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
136 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
140 pinctrl_cspi2_cs: cspi2csgrp {
142 MX27_PAD_CSI_D5__GPIO2_17 0x0
143 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0
144 MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
148 pinctrl_gpio_leds: gpioledsgrp {
149 fsl,pins = <MX27_PAD_PC_VS1__GPIO6_14 0x0>;
152 pinctrl_gpio_keys: gpiokeysgrp {
153 fsl,pins = <MX27_PAD_PC_VS2__GPIO6_13 0x0>;
156 pinctrl_imxfb1: imxfbgrp {
158 MX27_PAD_CLS__CLS 0x0
159 MX27_PAD_CONTRAST__CONTRAST 0x0
160 MX27_PAD_LD0__LD0 0x0
161 MX27_PAD_LD1__LD1 0x0
162 MX27_PAD_LD2__LD2 0x0
163 MX27_PAD_LD3__LD3 0x0
164 MX27_PAD_LD4__LD4 0x0
165 MX27_PAD_LD5__LD5 0x0
166 MX27_PAD_LD6__LD6 0x0
167 MX27_PAD_LD7__LD7 0x0
168 MX27_PAD_LD8__LD8 0x0
169 MX27_PAD_LD9__LD9 0x0
170 MX27_PAD_LD10__LD10 0x0
171 MX27_PAD_LD11__LD11 0x0
172 MX27_PAD_LD12__LD12 0x0
173 MX27_PAD_LD13__LD13 0x0
174 MX27_PAD_LD14__LD14 0x0
175 MX27_PAD_LD15__LD15 0x0
176 MX27_PAD_LD16__LD16 0x0
177 MX27_PAD_LD17__LD17 0x0
178 MX27_PAD_LSCLK__LSCLK 0x0
179 MX27_PAD_OE_ACD__OE_ACD 0x0
181 MX27_PAD_REV__REV 0x0
182 MX27_PAD_SPL_SPR__SPL_SPR 0x0
183 MX27_PAD_HSYNC__HSYNC 0x0
184 MX27_PAD_VSYNC__VSYNC 0x0
188 pinctrl_i2c1: i2c1grp {
190 MX27_PAD_I2C_DATA__I2C_DATA 0x0
191 MX27_PAD_I2C_CLK__I2C_CLK 0x0
195 pinctrl_i2c2: i2c2grp {
197 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
198 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
202 pinctrl_max1027: max1027 {
204 MX27_PAD_UART1_CTS__GPIO5_14 0x0 /* CNVST */
205 MX27_PAD_UART1_RTS__GPIO5_15 0x0 /* EOC */
209 pinctrl_pwm: pwmgrp {
211 MX27_PAD_PWMO__PWMO 0x0
215 pinctrl_sdhc2: sdhc2grp {
217 MX27_PAD_SD2_CLK__SD2_CLK 0x0
218 MX27_PAD_SD2_CMD__SD2_CMD 0x0
219 MX27_PAD_SD2_D0__SD2_D0 0x0
220 MX27_PAD_SD2_D1__SD2_D1 0x0
221 MX27_PAD_SD2_D2__SD2_D2 0x0
222 MX27_PAD_SD2_D3__SD2_D3 0x0
226 pinctrl_sdhc2_cd: sdhc2cdgrp {
227 fsl,pins = <MX27_PAD_TOUT__GPIO3_14 0x0>;
234 cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_sdhc2 &pinctrl_sdhc2_cd>;
241 pinctrl-names = "default";
242 pinctrl-0 = <&pinctrl_pwm>;