2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include "skeleton.dtsi"
13 #include "imx25-pinfunc.h"
41 compatible = "arm,arm926ej-s";
46 asic: asic-interrupt-controller@68000000 {
47 compatible = "fsl,imx25-asic", "fsl,avic";
49 #interrupt-cells = <1>;
50 reg = <0x68000000 0x8000000>;
58 compatible = "fsl,imx-osc", "fixed-clock";
59 clock-frequency = <24000000>;
66 compatible = "simple-bus";
67 interrupt-parent = <&asic>;
70 aips@43f00000 { /* AIPS1 */
71 compatible = "fsl,aips-bus", "simple-bus";
74 reg = <0x43f00000 0x100000>;
80 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
81 reg = <0x43f80000 0x4000>;
91 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
92 reg = <0x43f84000 0x4000>;
100 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
101 reg = <0x43f88000 0x4000>;
103 clocks = <&clks 75>, <&clks 75>;
104 clock-names = "ipg", "per";
109 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
110 reg = <0x43f8c000 0x4000>;
112 clocks = <&clks 76>, <&clks 76>;
113 clock-names = "ipg", "per";
117 uart1: serial@43f90000 {
118 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
119 reg = <0x43f90000 0x4000>;
121 clocks = <&clks 120>, <&clks 57>;
122 clock-names = "ipg", "per";
126 uart2: serial@43f94000 {
127 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
128 reg = <0x43f94000 0x4000>;
130 clocks = <&clks 121>, <&clks 57>;
131 clock-names = "ipg", "per";
136 #address-cells = <1>;
138 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
139 reg = <0x43f98000 0x4000>;
147 #address-cells = <1>;
149 reg = <0x43f9c000 0x4000>;
156 spi1: cspi@43fa4000 {
157 #address-cells = <1>;
159 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
160 reg = <0x43fa4000 0x4000>;
161 clocks = <&clks 62>, <&clks 62>;
162 clock-names = "ipg", "per";
168 #address-cells = <1>;
170 reg = <0x43fa8000 0x4000>;
171 clocks = <&clks 102>;
177 iomuxc: iomuxc@43fac000 {
178 compatible = "fsl,imx25-iomuxc";
179 reg = <0x43fac000 0x4000>;
182 audmux: audmux@43fb0000 {
183 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
184 reg = <0x43fb0000 0x4000>;
190 compatible = "fsl,spba-bus", "simple-bus";
191 #address-cells = <1>;
193 reg = <0x50000000 0x40000>;
196 spi3: cspi@50004000 {
197 #address-cells = <1>;
199 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
200 reg = <0x50004000 0x4000>;
202 clocks = <&clks 80>, <&clks 80>;
203 clock-names = "ipg", "per";
207 uart4: serial@50008000 {
208 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
209 reg = <0x50008000 0x4000>;
211 clocks = <&clks 123>, <&clks 57>;
212 clock-names = "ipg", "per";
216 uart3: serial@5000c000 {
217 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
218 reg = <0x5000c000 0x4000>;
220 clocks = <&clks 122>, <&clks 57>;
221 clock-names = "ipg", "per";
225 spi2: cspi@50010000 {
226 #address-cells = <1>;
228 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
229 reg = <0x50010000 0x4000>;
230 clocks = <&clks 79>, <&clks 79>;
231 clock-names = "ipg", "per";
237 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
238 reg = <0x50014000 0x4000>;
240 clocks = <&clks 118>;
242 dmas = <&sdma 24 1 0>,
244 dma-names = "rx", "tx";
249 reg = <0x50018000 0x4000>;
253 uart5: serial@5002c000 {
254 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
255 reg = <0x5002c000 0x4000>;
257 clocks = <&clks 124>, <&clks 57>;
258 clock-names = "ipg", "per";
263 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
264 reg = <0x50030000 0x4000>;
266 clocks = <&clks 119>;
272 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
273 reg = <0x50034000 0x4000>;
275 clocks = <&clks 117>;
277 dmas = <&sdma 28 1 0>,
279 dma-names = "rx", "tx";
283 fec: ethernet@50038000 {
284 compatible = "fsl,imx25-fec";
285 reg = <0x50038000 0x4000>;
287 clocks = <&clks 88>, <&clks 65>;
288 clock-names = "ipg", "ahb";
293 aips@53f00000 { /* AIPS2 */
294 compatible = "fsl,aips-bus", "simple-bus";
295 #address-cells = <1>;
297 reg = <0x53f00000 0x100000>;
301 compatible = "fsl,imx25-ccm";
302 reg = <0x53f80000 0x4000>;
307 gpt4: timer@53f84000 {
308 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
309 reg = <0x53f84000 0x4000>;
310 clocks = <&clks 9>, <&clks 45>;
311 clock-names = "ipg", "per";
315 gpt3: timer@53f88000 {
316 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
317 reg = <0x53f88000 0x4000>;
318 clocks = <&clks 9>, <&clks 47>;
319 clock-names = "ipg", "per";
323 gpt2: timer@53f8c000 {
324 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
325 reg = <0x53f8c000 0x4000>;
326 clocks = <&clks 9>, <&clks 47>;
327 clock-names = "ipg", "per";
331 gpt1: timer@53f90000 {
332 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
333 reg = <0x53f90000 0x4000>;
334 clocks = <&clks 9>, <&clks 47>;
335 clock-names = "ipg", "per";
339 epit1: timer@53f94000 {
340 compatible = "fsl,imx25-epit";
341 reg = <0x53f94000 0x4000>;
345 epit2: timer@53f98000 {
346 compatible = "fsl,imx25-epit";
347 reg = <0x53f98000 0x4000>;
351 gpio4: gpio@53f9c000 {
352 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
353 reg = <0x53f9c000 0x4000>;
357 interrupt-controller;
358 #interrupt-cells = <2>;
362 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
364 reg = <0x53fa0000 0x4000>;
365 clocks = <&clks 106>, <&clks 36>;
366 clock-names = "ipg", "per";
370 gpio3: gpio@53fa4000 {
371 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
372 reg = <0x53fa4000 0x4000>;
376 interrupt-controller;
377 #interrupt-cells = <2>;
381 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
383 reg = <0x53fa8000 0x4000>;
384 clocks = <&clks 107>, <&clks 36>;
385 clock-names = "ipg", "per";
389 esdhc1: esdhc@53fb4000 {
390 compatible = "fsl,imx25-esdhc";
391 reg = <0x53fb4000 0x4000>;
393 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
394 clock-names = "ipg", "ahb", "per";
398 esdhc2: esdhc@53fb8000 {
399 compatible = "fsl,imx25-esdhc";
400 reg = <0x53fb8000 0x4000>;
402 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
403 clock-names = "ipg", "ahb", "per";
407 lcdc: lcdc@53fbc000 {
408 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
409 reg = <0x53fbc000 0x4000>;
411 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
412 clock-names = "ipg", "ahb", "per";
417 reg = <0x53fc0000 0x4000>;
423 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
424 reg = <0x53fc8000 0x4000>;
425 clocks = <&clks 108>, <&clks 36>;
426 clock-names = "ipg", "per";
430 gpio1: gpio@53fcc000 {
431 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
432 reg = <0x53fcc000 0x4000>;
436 interrupt-controller;
437 #interrupt-cells = <2>;
440 gpio2: gpio@53fd0000 {
441 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
442 reg = <0x53fd0000 0x4000>;
446 interrupt-controller;
447 #interrupt-cells = <2>;
450 sdma: sdma@53fd4000 {
451 compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
452 reg = <0x53fd4000 0x4000>;
453 clocks = <&clks 112>, <&clks 68>;
454 clock-names = "ipg", "ahb";
457 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
461 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
462 reg = <0x53fdc000 0x4000>;
463 clocks = <&clks 126>;
469 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
471 reg = <0x53fe0000 0x4000>;
472 clocks = <&clks 105>, <&clks 36>;
473 clock-names = "ipg", "per";
478 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
479 reg = <0x53ff0000 0x4000>;
485 compatible = "nop-usbphy";
490 compatible = "nop-usbphy";
494 usbotg: usb@53ff4000 {
495 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
496 reg = <0x53ff4000 0x0200>;
498 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
499 clock-names = "ipg", "ahb", "per";
500 fsl,usbmisc = <&usbmisc 0>;
504 usbhost1: usb@53ff4400 {
505 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
506 reg = <0x53ff4400 0x0200>;
508 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
509 clock-names = "ipg", "ahb", "per";
510 fsl,usbmisc = <&usbmisc 1>;
514 usbmisc: usbmisc@53ff4600 {
516 compatible = "fsl,imx25-usbmisc";
517 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
518 clock-names = "ipg", "ahb", "per";
519 reg = <0x53ff4600 0x00f>;
524 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
525 reg = <0x53ffc000 0x4000>;
533 compatible = "fsl,emi-bus", "simple-bus";
534 #address-cells = <1>;
536 reg = <0x80000000 0x3b002000>;
540 #address-cells = <1>;
543 compatible = "fsl,imx25-nand";
544 reg = <0xbb000000 0x2000>;