arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos5.dtsi"
  21 #include "exynos5250-pinctrl.dtsi"
  22
  23 #include <dt-bindings/clk/exynos-audss-clk.h>
  24
  25 / {
  26         compatible = "samsung,exynos5250";
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 gsc0 = &gsc_0;
  33                 gsc1 = &gsc_1;
  34                 gsc2 = &gsc_2;
  35                 gsc3 = &gsc_3;
  36                 mshc0 = &dwmmc_0;
  37                 mshc1 = &dwmmc_1;
  38                 mshc2 = &dwmmc_2;
  39                 mshc3 = &dwmmc_3;
  40                 i2c0 = &i2c_0;
  41                 i2c1 = &i2c_1;
  42                 i2c2 = &i2c_2;
  43                 i2c3 = &i2c_3;
  44                 i2c4 = &i2c_4;
  45                 i2c5 = &i2c_5;
  46                 i2c6 = &i2c_6;
  47                 i2c7 = &i2c_7;
  48                 i2c8 = &i2c_8;
  49                 pinctrl0 = &pinctrl_0;
  50                 pinctrl1 = &pinctrl_1;
  51                 pinctrl2 = &pinctrl_2;
  52                 pinctrl3 = &pinctrl_3;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <0>;
  63                         clock-frequency = <1700000000>;
  64                 };
  65                 cpu@1 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a15";
  68                         reg = <1>;
  69                         clock-frequency = <1700000000>;
  70                 };
  71         };
  72
  73         pd_gsc: gsc-power-domain@10044000 {
  74                 compatible = "samsung,exynos4210-pd";
  75                 reg = <0x10044000 0x20>;
  76         };
  77
  78         pd_mfc: mfc-power-domain@10044040 {
  79                 compatible = "samsung,exynos4210-pd";
  80                 reg = <0x10044040 0x20>;
  81         };
  82
  83         clock: clock-controller@10010000 {
  84                 compatible = "samsung,exynos5250-clock";
  85                 reg = <0x10010000 0x30000>;
  86                 #clock-cells = <1>;
  87         };
  88
  89         clock_audss: audss-clock-controller@3810000 {
  90                 compatible = "samsung,exynos5250-audss-clock";
  91                 reg = <0x03810000 0x0C>;
  92                 #clock-cells = <1>;
  93         };
  94
  95         timer {
  96                 compatible = "arm,armv7-timer";
  97                 interrupts = <1 13 0xf08>,
  98                              <1 14 0xf08>,
  99                              <1 11 0xf08>,
 100                              <1 10 0xf08>;
 101                 /* Unfortunately we need this since some versions of U-Boot
 102                  * on Exynos don't set the CNTFRQ register, so we need the
 103                  * value from DT.
 104                  */
 105                 clock-frequency = <24000000>;
 106         };
 107
 108         mct@101C0000 {
 109                 compatible = "samsung,exynos4210-mct";
 110                 reg = <0x101C0000 0x800>;
 111                 interrupt-controller;
 112                 #interrups-cells = <2>;
 113                 interrupt-parent = <&mct_map>;
 114                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 115                              <4 0>, <5 0>;
 116                 clocks = <&clock 1>, <&clock 335>;
 117                 clock-names = "fin_pll", "mct";
 118
 119                 mct_map: mct-map {
 120                         #interrupt-cells = <2>;
 121                         #address-cells = <0>;
 122                         #size-cells = <0>;
 123                         interrupt-map = <0x0 0 &combiner 23 3>,
 124                                         <0x1 0 &combiner 23 4>,
 125                                         <0x2 0 &combiner 25 2>,
 126                                         <0x3 0 &combiner 25 3>,
 127                                         <0x4 0 &gic 0 120 0>,
 128                                         <0x5 0 &gic 0 121 0>;
 129                 };
 130         };
 131
 132         pmu {
 133                 compatible = "arm,cortex-a15-pmu";
 134                 interrupt-parent = <&combiner>;
 135                 interrupts = <1 2>, <22 4>;
 136         };
 137
 138         pinctrl_0: pinctrl@11400000 {
 139                 compatible = "samsung,exynos5250-pinctrl";
 140                 reg = <0x11400000 0x1000>;
 141                 interrupts = <0 46 0>;
 142
 143                 wakup_eint: wakeup-interrupt-controller {
 144                         compatible = "samsung,exynos4210-wakeup-eint";
 145                         interrupt-parent = <&gic>;
 146                         interrupts = <0 32 0>;
 147                 };
 148         };
 149
 150         pinctrl_1: pinctrl@13400000 {
 151                 compatible = "samsung,exynos5250-pinctrl";
 152                 reg = <0x13400000 0x1000>;
 153                 interrupts = <0 45 0>;
 154         };
 155
 156         pinctrl_2: pinctrl@10d10000 {
 157                 compatible = "samsung,exynos5250-pinctrl";
 158                 reg = <0x10d10000 0x1000>;
 159                 interrupts = <0 50 0>;
 160         };
 161
 162         pinctrl_3: pinctrl@03860000 {
 163                 compatible = "samsung,exynos5250-pinctrl";
 164                 reg = <0x03860000 0x1000>;
 165                 interrupts = <0 47 0>;
 166         };
 167
 168         watchdog {
 169                 clocks = <&clock 336>;
 170                 clock-names = "watchdog";
 171         };
 172
 173         g2d@10850000 {
 174                 compatible = "samsung,exynos5250-g2d";
 175                 reg = <0x10850000 0x1000>;
 176                 interrupts = <0 91 0>;
 177                 clocks = <&clock 345>;
 178                 clock-names = "fimg2d";
 179         };
 180
 181         codec@11000000 {
 182                 compatible = "samsung,mfc-v6";
 183                 reg = <0x11000000 0x10000>;
 184                 interrupts = <0 96 0>;
 185                 samsung,power-domain = <&pd_mfc>;
 186                 clocks = <&clock 266>;
 187                 clock-names = "mfc";
 188         };
 189
 190         rtc@101E0000 {
 191                 clocks = <&clock 337>;
 192                 clock-names = "rtc";
 193                 status = "okay";
 194         };
 195
 196         tmu@10060000 {
 197                 compatible = "samsung,exynos5250-tmu";
 198                 reg = <0x10060000 0x100>;
 199                 interrupts = <0 65 0>;
 200                 clocks = <&clock 338>;
 201                 clock-names = "tmu_apbif";
 202         };
 203
 204         serial@12C00000 {
 205                 clocks = <&clock 289>, <&clock 146>;
 206                 clock-names = "uart", "clk_uart_baud0";
 207         };
 208
 209         serial@12C10000 {
 210                 clocks = <&clock 290>, <&clock 147>;
 211                 clock-names = "uart", "clk_uart_baud0";
 212         };
 213
 214         serial@12C20000 {
 215                 clocks = <&clock 291>, <&clock 148>;
 216                 clock-names = "uart", "clk_uart_baud0";
 217         };
 218
 219         serial@12C30000 {
 220                 clocks = <&clock 292>, <&clock 149>;
 221                 clock-names = "uart", "clk_uart_baud0";
 222         };
 223
 224         sata@122F0000 {
 225                 compatible = "samsung,exynos5-sata-ahci";
 226                 reg = <0x122F0000 0x1ff>;
 227                 interrupts = <0 115 0>;
 228                 clocks = <&clock 277>, <&clock 143>;
 229                 clock-names = "sata", "sclk_sata";
 230         };
 231
 232         sata-phy@12170000 {
 233                 compatible = "samsung,exynos5-sata-phy";
 234                 reg = <0x12170000 0x1ff>;
 235         };
 236
 237         i2c_0: i2c@12C60000 {
 238                 compatible = "samsung,s3c2440-i2c";
 239                 reg = <0x12C60000 0x100>;
 240                 interrupts = <0 56 0>;
 241                 #address-cells = <1>;
 242                 #size-cells = <0>;
 243                 clocks = <&clock 294>;
 244                 clock-names = "i2c";
 245                 pinctrl-names = "default";
 246                 pinctrl-0 = <&i2c0_bus>;
 247         };
 248
 249         i2c_1: i2c@12C70000 {
 250                 compatible = "samsung,s3c2440-i2c";
 251                 reg = <0x12C70000 0x100>;
 252                 interrupts = <0 57 0>;
 253                 #address-cells = <1>;
 254                 #size-cells = <0>;
 255                 clocks = <&clock 295>;
 256                 clock-names = "i2c";
 257                 pinctrl-names = "default";
 258                 pinctrl-0 = <&i2c1_bus>;
 259         };
 260
 261         i2c_2: i2c@12C80000 {
 262                 compatible = "samsung,s3c2440-i2c";
 263                 reg = <0x12C80000 0x100>;
 264                 interrupts = <0 58 0>;
 265                 #address-cells = <1>;
 266                 #size-cells = <0>;
 267                 clocks = <&clock 296>;
 268                 clock-names = "i2c";
 269                 pinctrl-names = "default";
 270                 pinctrl-0 = <&i2c2_bus>;
 271         };
 272
 273         i2c_3: i2c@12C90000 {
 274                 compatible = "samsung,s3c2440-i2c";
 275                 reg = <0x12C90000 0x100>;
 276                 interrupts = <0 59 0>;
 277                 #address-cells = <1>;
 278                 #size-cells = <0>;
 279                 clocks = <&clock 297>;
 280                 clock-names = "i2c";
 281                 pinctrl-names = "default";
 282                 pinctrl-0 = <&i2c3_bus>;
 283         };
 284
 285         i2c_4: i2c@12CA0000 {
 286                 compatible = "samsung,s3c2440-i2c";
 287                 reg = <0x12CA0000 0x100>;
 288                 interrupts = <0 60 0>;
 289                 #address-cells = <1>;
 290                 #size-cells = <0>;
 291                 clocks = <&clock 298>;
 292                 clock-names = "i2c";
 293                 pinctrl-names = "default";
 294                 pinctrl-0 = <&i2c4_bus>;
 295         };
 296
 297         i2c_5: i2c@12CB0000 {
 298                 compatible = "samsung,s3c2440-i2c";
 299                 reg = <0x12CB0000 0x100>;
 300                 interrupts = <0 61 0>;
 301                 #address-cells = <1>;
 302                 #size-cells = <0>;
 303                 clocks = <&clock 299>;
 304                 clock-names = "i2c";
 305                 pinctrl-names = "default";
 306                 pinctrl-0 = <&i2c5_bus>;
 307         };
 308
 309         i2c_6: i2c@12CC0000 {
 310                 compatible = "samsung,s3c2440-i2c";
 311                 reg = <0x12CC0000 0x100>;
 312                 interrupts = <0 62 0>;
 313                 #address-cells = <1>;
 314                 #size-cells = <0>;
 315                 clocks = <&clock 300>;
 316                 clock-names = "i2c";
 317                 pinctrl-names = "default";
 318                 pinctrl-0 = <&i2c6_bus>;
 319         };
 320
 321         i2c_7: i2c@12CD0000 {
 322                 compatible = "samsung,s3c2440-i2c";
 323                 reg = <0x12CD0000 0x100>;
 324                 interrupts = <0 63 0>;
 325                 #address-cells = <1>;
 326                 #size-cells = <0>;
 327                 clocks = <&clock 301>;
 328                 clock-names = "i2c";
 329                 pinctrl-names = "default";
 330                 pinctrl-0 = <&i2c7_bus>;
 331         };
 332
 333         i2c_8: i2c@12CE0000 {
 334                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 335                 reg = <0x12CE0000 0x1000>;
 336                 interrupts = <0 64 0>;
 337                 #address-cells = <1>;
 338                 #size-cells = <0>;
 339                 clocks = <&clock 302>;
 340                 clock-names = "i2c";
 341         };
 342
 343         i2c@121D0000 {
 344                 compatible = "samsung,exynos5-sata-phy-i2c";
 345                 reg = <0x121D0000 0x100>;
 346                 #address-cells = <1>;
 347                 #size-cells = <0>;
 348                 clocks = <&clock 288>;
 349                 clock-names = "i2c";
 350         };
 351
 352         spi_0: spi@12d20000 {
 353                 compatible = "samsung,exynos4210-spi";
 354                 reg = <0x12d20000 0x100>;
 355                 interrupts = <0 66 0>;
 356                 dmas = <&pdma0 5
 357                         &pdma0 4>;
 358                 dma-names = "tx", "rx";
 359                 #address-cells = <1>;
 360                 #size-cells = <0>;
 361                 clocks = <&clock 304>, <&clock 154>;
 362                 clock-names = "spi", "spi_busclk0";
 363                 pinctrl-names = "default";
 364                 pinctrl-0 = <&spi0_bus>;
 365         };
 366
 367         spi_1: spi@12d30000 {
 368                 compatible = "samsung,exynos4210-spi";
 369                 reg = <0x12d30000 0x100>;
 370                 interrupts = <0 67 0>;
 371                 dmas = <&pdma1 5
 372                         &pdma1 4>;
 373                 dma-names = "tx", "rx";
 374                 #address-cells = <1>;
 375                 #size-cells = <0>;
 376                 clocks = <&clock 305>, <&clock 155>;
 377                 clock-names = "spi", "spi_busclk0";
 378                 pinctrl-names = "default";
 379                 pinctrl-0 = <&spi1_bus>;
 380         };
 381
 382         spi_2: spi@12d40000 {
 383                 compatible = "samsung,exynos4210-spi";
 384                 reg = <0x12d40000 0x100>;
 385                 interrupts = <0 68 0>;
 386                 dmas = <&pdma0 7
 387                         &pdma0 6>;
 388                 dma-names = "tx", "rx";
 389                 #address-cells = <1>;
 390                 #size-cells = <0>;
 391                 clocks = <&clock 306>, <&clock 156>;
 392                 clock-names = "spi", "spi_busclk0";
 393                 pinctrl-names = "default";
 394                 pinctrl-0 = <&spi2_bus>;
 395         };
 396
 397         dwmmc_0: dwmmc0@12200000 {
 398                 reg = <0x12200000 0x1000>;
 399                 clocks = <&clock 280>, <&clock 139>;
 400                 clock-names = "biu", "ciu";
 401         };
 402
 403         dwmmc_1: dwmmc1@12210000 {
 404                 reg = <0x12210000 0x1000>;
 405                 clocks = <&clock 281>, <&clock 140>;
 406                 clock-names = "biu", "ciu";
 407         };
 408
 409         dwmmc_2: dwmmc2@12220000 {
 410                 reg = <0x12220000 0x1000>;
 411                 clocks = <&clock 282>, <&clock 141>;
 412                 clock-names = "biu", "ciu";
 413         };
 414
 415         dwmmc_3: dwmmc3@12230000 {
 416                 compatible = "samsung,exynos5250-dw-mshc";
 417                 reg = <0x12230000 0x1000>;
 418                 interrupts = <0 78 0>;
 419                 #address-cells = <1>;
 420                 #size-cells = <0>;
 421                 clocks = <&clock 283>, <&clock 142>;
 422                 clock-names = "biu", "ciu";
 423         };
 424
 425         i2s0: i2s@03830000 {
 426                 compatible = "samsung,s5pv210-i2s";
 427                 status = "disabled";
 428                 reg = <0x03830000 0x100>;
 429                 dmas = <&pdma0 10
 430                         &pdma0 9
 431                         &pdma0 8>;
 432                 dma-names = "tx", "rx", "tx-sec";
 433                 clocks = <&clock_audss EXYNOS_I2S_BUS>,
 434                         <&clock_audss EXYNOS_I2S_BUS>,
 435                         <&clock_audss EXYNOS_SCLK_I2S>;
 436                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 437                 samsung,idma-addr = <0x03000000>;
 438                 pinctrl-names = "default";
 439                 pinctrl-0 = <&i2s0_bus>;
 440         };
 441
 442         i2s1: i2s@12D60000 {
 443                 compatible = "samsung,s3c6410-i2s";
 444                 status = "disabled";
 445                 reg = <0x12D60000 0x100>;
 446                 dmas = <&pdma1 12
 447                         &pdma1 11>;
 448                 dma-names = "tx", "rx";
 449                 clocks = <&clock 307>, <&clock 157>;
 450                 clock-names = "iis", "i2s_opclk0";
 451                 pinctrl-names = "default";
 452                 pinctrl-0 = <&i2s1_bus>;
 453         };
 454
 455         i2s2: i2s@12D70000 {
 456                 compatible = "samsung,s3c6410-i2s";
 457                 status = "disabled";
 458                 reg = <0x12D70000 0x100>;
 459                 dmas = <&pdma0 12
 460                         &pdma0 11>;
 461                 dma-names = "tx", "rx";
 462                 clocks = <&clock 308>, <&clock 158>;
 463                 clock-names = "iis", "i2s_opclk0";
 464                 pinctrl-names = "default";
 465                 pinctrl-0 = <&i2s2_bus>;
 466         };
 467
 468         usb@12000000 {
 469                 compatible = "samsung,exynos5250-dwusb3";
 470                 clocks = <&clock 286>;
 471                 clock-names = "usbdrd30";
 472                 #address-cells = <1>;
 473                 #size-cells = <1>;
 474                 ranges;
 475
 476                 dwc3 {
 477                         compatible = "synopsys,dwc3";
 478                         reg = <0x12000000 0x10000>;
 479                         interrupts = <0 72 0>;
 480                         usb-phy = <&usb2_phy &usb3_phy>;
 481                 };
 482         };
 483
 484         usb3_phy: usbphy@12100000 {
 485                 compatible = "samsung,exynos5250-usb3phy";
 486                 reg = <0x12100000 0x100>;
 487                 clocks = <&clock 1>, <&clock 286>;
 488                 clock-names = "ext_xtal", "usbdrd30";
 489                 #address-cells = <1>;
 490                 #size-cells = <1>;
 491                 ranges;
 492
 493                 usbphy-sys {
 494                         reg = <0x10040704 0x8>;
 495                 };
 496         };
 497
 498         usb@12110000 {
 499                 compatible = "samsung,exynos4210-ehci";
 500                 reg = <0x12110000 0x100>;
 501                 interrupts = <0 71 0>;
 502
 503                 clocks = <&clock 285>;
 504                 clock-names = "usbhost";
 505         };
 506
 507         usb@12120000 {
 508                 compatible = "samsung,exynos4210-ohci";
 509                 reg = <0x12120000 0x100>;
 510                 interrupts = <0 71 0>;
 511
 512                 clocks = <&clock 285>;
 513                 clock-names = "usbhost";
 514         };
 515
 516         usb2_phy: usbphy@12130000 {
 517                 compatible = "samsung,exynos5250-usb2phy";
 518                 reg = <0x12130000 0x100>;
 519                 clocks = <&clock 1>, <&clock 285>;
 520                 clock-names = "ext_xtal", "usbhost";
 521                 #address-cells = <1>;
 522                 #size-cells = <1>;
 523                 ranges;
 524
 525                 usbphy-sys {
 526                         reg = <0x10040704 0x8>,
 527                               <0x10050230 0x4>;
 528                 };
 529         };
 530
 531         amba {
 532                 #address-cells = <1>;
 533                 #size-cells = <1>;
 534                 compatible = "arm,amba-bus";
 535                 interrupt-parent = <&gic>;
 536                 ranges;
 537
 538                 pdma0: pdma@121A0000 {
 539                         compatible = "arm,pl330", "arm,primecell";
 540                         reg = <0x121A0000 0x1000>;
 541                         interrupts = <0 34 0>;
 542                         clocks = <&clock 275>;
 543                         clock-names = "apb_pclk";
 544                         #dma-cells = <1>;
 545                         #dma-channels = <8>;
 546                         #dma-requests = <32>;
 547                 };
 548
 549                 pdma1: pdma@121B0000 {
 550                         compatible = "arm,pl330", "arm,primecell";
 551                         reg = <0x121B0000 0x1000>;
 552                         interrupts = <0 35 0>;
 553                         clocks = <&clock 276>;
 554                         clock-names = "apb_pclk";
 555                         #dma-cells = <1>;
 556                         #dma-channels = <8>;
 557                         #dma-requests = <32>;
 558                 };
 559
 560                 mdma0: mdma@10800000 {
 561                         compatible = "arm,pl330", "arm,primecell";
 562                         reg = <0x10800000 0x1000>;
 563                         interrupts = <0 33 0>;
 564                         clocks = <&clock 346>;
 565                         clock-names = "apb_pclk";
 566                         #dma-cells = <1>;
 567                         #dma-channels = <8>;
 568                         #dma-requests = <1>;
 569                 };
 570
 571                 mdma1: mdma@11C10000 {
 572                         compatible = "arm,pl330", "arm,primecell";
 573                         reg = <0x11C10000 0x1000>;
 574                         interrupts = <0 124 0>;
 575                         clocks = <&clock 271>;
 576                         clock-names = "apb_pclk";
 577                         #dma-cells = <1>;
 578                         #dma-channels = <8>;
 579                         #dma-requests = <1>;
 580                 };
 581         };
 582
 583         gsc_0:  gsc@13e00000 {
 584                 compatible = "samsung,exynos5-gsc";
 585                 reg = <0x13e00000 0x1000>;
 586                 interrupts = <0 85 0>;
 587                 samsung,power-domain = <&pd_gsc>;
 588                 clocks = <&clock 256>;
 589                 clock-names = "gscl";
 590         };
 591
 592         gsc_1:  gsc@13e10000 {
 593                 compatible = "samsung,exynos5-gsc";
 594                 reg = <0x13e10000 0x1000>;
 595                 interrupts = <0 86 0>;
 596                 samsung,power-domain = <&pd_gsc>;
 597                 clocks = <&clock 257>;
 598                 clock-names = "gscl";
 599         };
 600
 601         gsc_2:  gsc@13e20000 {
 602                 compatible = "samsung,exynos5-gsc";
 603                 reg = <0x13e20000 0x1000>;
 604                 interrupts = <0 87 0>;
 605                 samsung,power-domain = <&pd_gsc>;
 606                 clocks = <&clock 258>;
 607                 clock-names = "gscl";
 608         };
 609
 610         gsc_3:  gsc@13e30000 {
 611                 compatible = "samsung,exynos5-gsc";
 612                 reg = <0x13e30000 0x1000>;
 613                 interrupts = <0 88 0>;
 614                 samsung,power-domain = <&pd_gsc>;
 615                 clocks = <&clock 259>;
 616                 clock-names = "gscl";
 617         };
 618
 619         hdmi {
 620                 compatible = "samsung,exynos4212-hdmi";
 621                 reg = <0x14530000 0x70000>;
 622                 interrupts = <0 95 0>;
 623                 clocks = <&clock 344>, <&clock 136>, <&clock 137>,
 624                                 <&clock 159>, <&clock 1024>;
 625                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 626                                 "sclk_hdmiphy", "mout_hdmi";
 627         };
 628
 629         mixer {
 630                 compatible = "samsung,exynos5250-mixer";
 631                 reg = <0x14450000 0x10000>;
 632                 interrupts = <0 94 0>;
 633                 clocks = <&clock 343>, <&clock 136>;
 634                 clock-names = "mixer", "sclk_hdmi";
 635         };
 636
 637         dp_phy: video-phy@10040720 {
 638                 compatible = "samsung,exynos5250-dp-video-phy";
 639                 reg = <0x10040720 4>;
 640                 #phy-cells = <0>;
 641         };
 642
 643         dp-controller@145B0000 {
 644                 clocks = <&clock 342>;
 645                 clock-names = "dp";
 646                 phys = <&dp_phy>;
 647                 phy-names = "dp";
 648         };
 649
 650         fimd@14400000 {
 651                 clocks = <&clock 133>, <&clock 339>;
 652                 clock-names = "sclk_fimd", "fimd";
 653         };
 654
 655         adc: adc@12D10000 {
 656                 compatible = "samsung,exynos-adc-v1";
 657                 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
 658                 interrupts = <0 106 0>;
 659                 clocks = <&clock 303>;
 660                 clock-names = "adc";
 661                 #io-channel-cells = <1>;
 662                 io-channel-ranges;
 663                 status = "disabled";
 664         };
 665 };