2 * Broadcom BCM63138 DSL SoCs Device Tree
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
8 #include "skeleton.dtsi"
11 compatible = "brcm,bcm63138";
12 model = "Broadcom BCM63138 DSL SoC";
13 interrupt-parent = <&gic>;
26 compatible = "arm,cortex-a9";
27 next-level-cache = <&L2>;
29 enable-method = "brcm,bcm63138";
34 compatible = "arm,cortex-a9";
35 next-level-cache = <&L2>;
37 enable-method = "brcm,bcm63138";
46 arm_timer_clk: arm_timer_clk {
48 compatible = "fixed-clock";
49 clock-frequency = <500000000>;
52 periph_clk: periph_clk {
54 compatible = "fixed-clock";
55 clock-frequency = <50000000>;
56 clock-output-names = "periph";
62 compatible = "simple-bus";
63 ranges = <0 0x80000000 0x784000>;
67 L2: cache-controller@1d000 {
68 compatible = "arm,pl310-cache";
69 reg = <0x1d000 0x1000>;
72 cache-size = <524288>;
74 cache-line-size = <32>;
75 interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
79 compatible = "arm,cortex-a9-scu";
80 reg = <0x1e000 0x100>;
83 gic: interrupt-controller@1e100 {
84 compatible = "arm,cortex-a9-gic";
87 #interrupt-cells = <3>;
92 global_timer: timer@1e200 {
93 compatible = "arm,cortex-a9-global-timer";
95 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
96 clocks = <&arm_timer_clk>;
99 local_timer: local-timer@1e600 {
100 compatible = "arm,cortex-a9-twd-timer";
101 reg = <0x1e600 0x20>;
102 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
103 clocks = <&arm_timer_clk>;
106 twd_watchdog: watchdog@1e620 {
107 compatible = "arm,cortex-a9-twd-wdt";
108 reg = <0x1e620 0x20>;
109 interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
112 pmb0: reset-controller@4800c0 {
113 compatible = "brcm,bcm63138-pmb";
114 reg = <0x4800c0 0x10>;
118 pmb1: reset-controller@4800e0 {
119 compatible = "brcm,bcm63138-pmb";
120 reg = <0x4800e0 0x10>;
125 /* Legacy UBUS base */
127 compatible = "simple-bus";
128 #address-cells = <1>;
130 ranges = <0 0xfffe8000 0x8100>;
132 serial0: serial@600 {
133 compatible = "brcm,bcm6345-uart";
135 interrupts = <GIC_SPI 32 0>;
136 clocks = <&periph_clk>;
137 clock-names = "periph";
141 serial1: serial@620 {
142 compatible = "brcm,bcm6345-uart";
144 interrupts = <GIC_SPI 33 0>;
145 clocks = <&periph_clk>;
146 clock-names = "periph";
150 bootlut: bootlut@8000 {
151 compatible = "brcm,bcm63138-bootlut";