2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91SAM9x5 family SoC";
21 compatible = "atmel,at91sam9x5";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm926ej-s";
52 reg = <0x20000000 0x10000000>;
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
59 clock-frequency = <0>;
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock";
71 clock-frequency = <5000000>;
76 compatible = "simple-bus";
82 compatible = "simple-bus";
87 aic: interrupt-controller@fffff000 {
88 #interrupt-cells = <3>;
89 compatible = "atmel,at91rm9200-aic";
91 reg = <0xfffff000 0x200>;
92 atmel,external-irqs = <31>;
95 ramc0: ramc@ffffe800 {
96 compatible = "atmel,at91sam9g45-ddramc";
97 reg = <0xffffe800 0x200>;
101 compatible = "atmel,at91sam9x5-pmc";
102 reg = <0xfffffc00 0x100>;
103 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
104 interrupt-controller;
105 #address-cells = <1>;
107 #interrupt-cells = <1>;
109 main_rc_osc: main_rc_osc {
110 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
112 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
113 clock-frequency = <12000000>;
114 clock-accuracy = <50000000>;
118 compatible = "atmel,at91rm9200-clk-main-osc";
120 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
121 clocks = <&main_xtal>;
125 compatible = "atmel,at91sam9x5-clk-main";
127 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
128 clocks = <&main_rc_osc>, <&main_osc>;
132 compatible = "atmel,at91rm9200-clk-pll";
134 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
137 atmel,clk-input-range = <2000000 32000000>;
138 #atmel,pll-clk-output-range-cells = <4>;
139 atmel,pll-clk-output-ranges = <745000000 800000000 0 0
140 695000000 750000000 1 0
141 645000000 700000000 2 0
142 595000000 650000000 3 0
143 545000000 600000000 0 1
144 495000000 555000000 1 1
145 445000000 500000000 2 1
146 400000000 450000000 3 1>;
150 compatible = "atmel,at91sam9x5-clk-plldiv";
156 compatible = "atmel,at91sam9x5-clk-utmi";
158 interrupts-extended = <&pmc AT91_PMC_LOCKU>;
163 compatible = "atmel,at91sam9x5-clk-master";
165 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
166 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
167 atmel,clk-output-range = <0 133333333>;
168 atmel,clk-divisors = <1 2 4 3>;
169 atmel,master-clk-have-div3-pres;
173 compatible = "atmel,at91sam9x5-clk-usb";
175 clocks = <&plladiv>, <&utmi>;
179 compatible = "atmel,at91sam9x5-clk-programmable";
180 #address-cells = <1>;
182 interrupt-parent = <&pmc>;
183 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
188 interrupts = <AT91_PMC_PCKRDY(0)>;
194 interrupts = <AT91_PMC_PCKRDY(1)>;
199 compatible = "atmel,at91sam9x5-clk-smd";
201 clocks = <&plladiv>, <&utmi>;
205 compatible = "atmel,at91rm9200-clk-system";
206 #address-cells = <1>;
247 compatible = "atmel,at91sam9x5-clk-peripheral";
248 #address-cells = <1>;
252 pioAB_clk: pioAB_clk {
257 pioCD_clk: pioCD_clk {
267 usart0_clk: usart0_clk {
272 usart1_clk: usart1_clk {
277 usart2_clk: usart2_clk {
312 uart0_clk: uart0_clk {
317 uart1_clk: uart1_clk {
347 uhphs_clk: uhphs_clk {
352 udphs_clk: udphs_clk {
370 compatible = "atmel,at91sam9g45-rstc";
371 reg = <0xfffffe00 0x10>;
375 compatible = "atmel,at91sam9x5-shdwc";
376 reg = <0xfffffe10 0x10>;
379 pit: timer@fffffe30 {
380 compatible = "atmel,at91sam9260-pit";
381 reg = <0xfffffe30 0xf>;
382 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
387 compatible = "atmel,at91sam9x5-sckc";
388 reg = <0xfffffe50 0x4>;
391 compatible = "atmel,at91sam9x5-clk-slow-osc";
393 clocks = <&slow_xtal>;
396 slow_rc_osc: slow_rc_osc {
397 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
399 clock-frequency = <32768>;
400 clock-accuracy = <50000000>;
404 compatible = "atmel,at91sam9x5-clk-slow";
406 clocks = <&slow_rc_osc>, <&slow_osc>;
410 tcb0: timer@f8008000 {
411 compatible = "atmel,at91sam9x5-tcb";
412 reg = <0xf8008000 0x100>;
413 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
414 clocks = <&tcb0_clk>;
415 clock-names = "t0_clk";
418 tcb1: timer@f800c000 {
419 compatible = "atmel,at91sam9x5-tcb";
420 reg = <0xf800c000 0x100>;
421 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
422 clocks = <&tcb0_clk>;
423 clock-names = "t0_clk";
426 dma0: dma-controller@ffffec00 {
427 compatible = "atmel,at91sam9g45-dma";
428 reg = <0xffffec00 0x200>;
429 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
431 clocks = <&dma0_clk>;
432 clock-names = "dma_clk";
435 dma1: dma-controller@ffffee00 {
436 compatible = "atmel,at91sam9g45-dma";
437 reg = <0xffffee00 0x200>;
438 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
440 clocks = <&dma1_clk>;
441 clock-names = "dma_clk";
445 #address-cells = <1>;
447 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
448 ranges = <0xfffff400 0xfffff400 0x800>;
450 /* shared pinctrl settings */
452 pinctrl_dbgu: dbgu-0 {
454 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
455 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
460 pinctrl_usart0: usart0-0 {
462 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
463 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
466 pinctrl_usart0_rts: usart0_rts-0 {
468 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
471 pinctrl_usart0_cts: usart0_cts-0 {
473 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
476 pinctrl_usart0_sck: usart0_sck-0 {
478 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
483 pinctrl_usart1: usart1-0 {
485 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
486 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
489 pinctrl_usart1_rts: usart1_rts-0 {
491 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
494 pinctrl_usart1_cts: usart1_cts-0 {
496 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
499 pinctrl_usart1_sck: usart1_sck-0 {
501 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
506 pinctrl_usart2: usart2-0 {
508 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
509 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
512 pinctrl_usart2_rts: usart2_rts-0 {
514 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
517 pinctrl_usart2_cts: usart2_cts-0 {
519 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
522 pinctrl_usart2_sck: usart2_sck-0 {
524 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
529 pinctrl_uart0: uart0-0 {
531 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
532 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
537 pinctrl_uart1: uart1-0 {
539 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
540 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
545 pinctrl_nand: nand-0 {
547 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
548 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
549 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
550 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
551 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
552 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
553 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
554 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
555 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
556 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
557 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
558 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
559 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
560 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
563 pinctrl_nand_16bits: nand_16bits-0 {
565 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
566 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
567 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
568 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
569 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
570 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
571 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
572 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
577 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
579 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
580 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
581 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
584 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
586 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
587 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
588 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
593 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
595 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
596 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
597 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
600 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
602 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
603 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
604 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
609 pinctrl_ssc0_tx: ssc0_tx-0 {
611 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
612 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
613 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
616 pinctrl_ssc0_rx: ssc0_rx-0 {
618 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
619 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
620 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
625 pinctrl_spi0: spi0-0 {
627 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
628 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
629 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
634 pinctrl_spi1: spi1-0 {
636 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
637 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
638 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
643 pinctrl_i2c0: i2c0-0 {
645 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
646 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
651 pinctrl_i2c1: i2c1-0 {
653 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
654 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
659 pinctrl_i2c2: i2c2-0 {
661 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
662 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
667 pinctrl_i2c_gpio0: i2c_gpio0-0 {
669 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
670 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
675 pinctrl_i2c_gpio1: i2c_gpio1-0 {
677 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
678 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
683 pinctrl_i2c_gpio2: i2c_gpio2-0 {
685 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
686 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
691 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
692 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
695 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
696 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
699 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
700 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
703 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
704 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
707 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
708 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
711 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
712 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
715 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
716 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
719 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
720 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
723 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
724 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
729 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
730 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
733 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
734 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
737 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
738 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
741 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
742 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
745 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
746 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
749 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
750 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
753 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
754 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
757 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
758 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
761 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
762 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
766 pioA: gpio@fffff400 {
767 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
768 reg = <0xfffff400 0x200>;
769 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
772 interrupt-controller;
773 #interrupt-cells = <2>;
774 clocks = <&pioAB_clk>;
777 pioB: gpio@fffff600 {
778 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
779 reg = <0xfffff600 0x200>;
780 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
784 interrupt-controller;
785 #interrupt-cells = <2>;
786 clocks = <&pioAB_clk>;
789 pioC: gpio@fffff800 {
790 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
791 reg = <0xfffff800 0x200>;
792 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
795 interrupt-controller;
796 #interrupt-cells = <2>;
797 clocks = <&pioCD_clk>;
800 pioD: gpio@fffffa00 {
801 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
802 reg = <0xfffffa00 0x200>;
803 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
807 interrupt-controller;
808 #interrupt-cells = <2>;
809 clocks = <&pioCD_clk>;
814 compatible = "atmel,at91sam9g45-ssc";
815 reg = <0xf0010000 0x4000>;
816 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
817 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
818 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
819 dma-names = "tx", "rx";
820 pinctrl-names = "default";
821 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
822 clocks = <&ssc0_clk>;
823 clock-names = "pclk";
828 compatible = "atmel,hsmci";
829 reg = <0xf0008000 0x600>;
830 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
831 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
833 pinctrl-names = "default";
834 clocks = <&mci0_clk>;
835 clock-names = "mci_clk";
836 #address-cells = <1>;
842 compatible = "atmel,hsmci";
843 reg = <0xf000c000 0x600>;
844 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
845 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
847 pinctrl-names = "default";
848 clocks = <&mci1_clk>;
849 clock-names = "mci_clk";
850 #address-cells = <1>;
855 dbgu: serial@fffff200 {
856 compatible = "atmel,at91sam9260-usart";
857 reg = <0xfffff200 0x200>;
858 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
859 pinctrl-names = "default";
860 pinctrl-0 = <&pinctrl_dbgu>;
862 clock-names = "usart";
866 usart0: serial@f801c000 {
867 compatible = "atmel,at91sam9260-usart";
868 reg = <0xf801c000 0x200>;
869 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
870 pinctrl-names = "default";
871 pinctrl-0 = <&pinctrl_usart0>;
872 clocks = <&usart0_clk>;
873 clock-names = "usart";
877 usart1: serial@f8020000 {
878 compatible = "atmel,at91sam9260-usart";
879 reg = <0xf8020000 0x200>;
880 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
881 pinctrl-names = "default";
882 pinctrl-0 = <&pinctrl_usart1>;
883 clocks = <&usart1_clk>;
884 clock-names = "usart";
888 usart2: serial@f8024000 {
889 compatible = "atmel,at91sam9260-usart";
890 reg = <0xf8024000 0x200>;
891 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
892 pinctrl-names = "default";
893 pinctrl-0 = <&pinctrl_usart2>;
894 clocks = <&usart2_clk>;
895 clock-names = "usart";
900 compatible = "atmel,at91sam9x5-i2c";
901 reg = <0xf8010000 0x100>;
902 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
903 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
904 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
905 dma-names = "tx", "rx";
906 #address-cells = <1>;
908 pinctrl-names = "default";
909 pinctrl-0 = <&pinctrl_i2c0>;
910 clocks = <&twi0_clk>;
915 compatible = "atmel,at91sam9x5-i2c";
916 reg = <0xf8014000 0x100>;
917 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
918 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
919 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
920 dma-names = "tx", "rx";
921 #address-cells = <1>;
923 pinctrl-names = "default";
924 pinctrl-0 = <&pinctrl_i2c1>;
925 clocks = <&twi1_clk>;
930 compatible = "atmel,at91sam9x5-i2c";
931 reg = <0xf8018000 0x100>;
932 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
933 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
934 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
935 dma-names = "tx", "rx";
936 #address-cells = <1>;
938 pinctrl-names = "default";
939 pinctrl-0 = <&pinctrl_i2c2>;
940 clocks = <&twi2_clk>;
944 uart0: serial@f8040000 {
945 compatible = "atmel,at91sam9260-usart";
946 reg = <0xf8040000 0x200>;
947 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
948 pinctrl-names = "default";
949 pinctrl-0 = <&pinctrl_uart0>;
950 clocks = <&uart0_clk>;
951 clock-names = "usart";
955 uart1: serial@f8044000 {
956 compatible = "atmel,at91sam9260-usart";
957 reg = <0xf8044000 0x200>;
958 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
959 pinctrl-names = "default";
960 pinctrl-0 = <&pinctrl_uart1>;
961 clocks = <&uart1_clk>;
962 clock-names = "usart";
967 #address-cells = <1>;
969 compatible = "atmel,at91sam9260-adc";
970 reg = <0xf804c000 0x100>;
971 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
974 clock-names = "adc_clk", "adc_op_clk";
975 atmel,adc-use-external-triggers;
976 atmel,adc-channels-used = <0xffff>;
977 atmel,adc-vref = <3300>;
978 atmel,adc-startup-time = <40>;
979 atmel,adc-res = <8 10>;
980 atmel,adc-res-names = "lowres", "highres";
981 atmel,adc-use-res = "highres";
985 trigger-name = "external-rising";
986 trigger-value = <0x1>;
992 trigger-name = "external-falling";
993 trigger-value = <0x2>;
999 trigger-name = "external-any";
1000 trigger-value = <0x3>;
1006 trigger-name = "continuous";
1007 trigger-value = <0x6>;
1011 spi0: spi@f0000000 {
1012 #address-cells = <1>;
1014 compatible = "atmel,at91rm9200-spi";
1015 reg = <0xf0000000 0x100>;
1016 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
1017 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
1018 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
1019 dma-names = "tx", "rx";
1020 pinctrl-names = "default";
1021 pinctrl-0 = <&pinctrl_spi0>;
1022 clocks = <&spi0_clk>;
1023 clock-names = "spi_clk";
1024 status = "disabled";
1027 spi1: spi@f0004000 {
1028 #address-cells = <1>;
1030 compatible = "atmel,at91rm9200-spi";
1031 reg = <0xf0004000 0x100>;
1032 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
1033 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
1034 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
1035 dma-names = "tx", "rx";
1036 pinctrl-names = "default";
1037 pinctrl-0 = <&pinctrl_spi1>;
1038 clocks = <&spi1_clk>;
1039 clock-names = "spi_clk";
1040 status = "disabled";
1043 usb2: gadget@f803c000 {
1044 #address-cells = <1>;
1046 compatible = "atmel,at91sam9rl-udc";
1047 reg = <0x00500000 0x80000
1049 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1050 clocks = <&usb>, <&udphs_clk>;
1051 clock-names = "hclk", "pclk";
1052 status = "disabled";
1056 atmel,fifo-size = <64>;
1057 atmel,nb-banks = <1>;
1062 atmel,fifo-size = <1024>;
1063 atmel,nb-banks = <2>;
1070 atmel,fifo-size = <1024>;
1071 atmel,nb-banks = <2>;
1078 atmel,fifo-size = <1024>;
1079 atmel,nb-banks = <3>;
1085 atmel,fifo-size = <1024>;
1086 atmel,nb-banks = <3>;
1092 atmel,fifo-size = <1024>;
1093 atmel,nb-banks = <3>;
1100 atmel,fifo-size = <1024>;
1101 atmel,nb-banks = <3>;
1108 compatible = "atmel,at91sam9260-wdt";
1109 reg = <0xfffffe40 0x10>;
1110 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1111 atmel,watchdog-type = "hardware";
1112 atmel,reset-type = "all";
1115 status = "disabled";
1119 compatible = "atmel,at91sam9x5-rtc";
1120 reg = <0xfffffeb0 0x40>;
1121 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1122 status = "disabled";
1125 pwm0: pwm@f8034000 {
1126 compatible = "atmel,at91sam9rl-pwm";
1127 reg = <0xf8034000 0x300>;
1128 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1129 clocks = <&pwm_clk>;
1131 status = "disabled";
1135 nand0: nand@40000000 {
1136 compatible = "atmel,at91rm9200-nand";
1137 #address-cells = <1>;
1139 reg = <0x40000000 0x10000000
1140 0xffffe000 0x600 /* PMECC Registers */
1141 0xffffe600 0x200 /* PMECC Error Location Registers */
1142 0x00108000 0x18000 /* PMECC looup table in ROM code */
1144 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1145 atmel,nand-addr-offset = <21>;
1146 atmel,nand-cmd-offset = <22>;
1148 pinctrl-names = "default";
1149 pinctrl-0 = <&pinctrl_nand>;
1150 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
1151 &pioD 4 GPIO_ACTIVE_HIGH
1154 status = "disabled";
1157 usb0: ohci@00600000 {
1158 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1159 reg = <0x00600000 0x100000>;
1160 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1161 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1162 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1163 status = "disabled";
1166 usb1: ehci@00700000 {
1167 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1168 reg = <0x00700000 0x100000>;
1169 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1170 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1171 clock-names = "usb_clk", "ehci_clk", "uhpck";
1172 status = "disabled";
1177 compatible = "i2c-gpio";
1178 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1179 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1181 i2c-gpio,sda-open-drain;
1182 i2c-gpio,scl-open-drain;
1183 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1184 #address-cells = <1>;
1186 pinctrl-names = "default";
1187 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1188 status = "disabled";
1192 compatible = "i2c-gpio";
1193 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1194 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1196 i2c-gpio,sda-open-drain;
1197 i2c-gpio,scl-open-drain;
1198 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1199 #address-cells = <1>;
1201 pinctrl-names = "default";
1202 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1203 status = "disabled";
1207 compatible = "i2c-gpio";
1208 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1209 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1211 i2c-gpio,sda-open-drain;
1212 i2c-gpio,scl-open-drain;
1213 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1214 #address-cells = <1>;
1216 pinctrl-names = "default";
1217 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1218 status = "disabled";