arch/arm/boot/dts/at91sam9x5.dtsi

   1 /*
   2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
   3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
   4  *                   AT91SAM9X25, AT91SAM9X35 SoC
   5  *
   6  *  Copyright (C) 2012 Atmel,
   7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include <dt-bindings/dma/at91.h>
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/clock/at91.h>
  18
  19 / {
  20         model = "Atmel AT91SAM9x5 family SoC";
  21         compatible = "atmel,at91sam9x5";
  22         interrupt-parent = <&aic>;
  23
  24         aliases {
  25                 serial0 = &dbgu;
  26                 serial1 = &usart0;
  27                 serial2 = &usart1;
  28                 serial3 = &usart2;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 pwm0 = &pwm0;
  40         };
  41         cpus {
  42                 #address-cells = <0>;
  43                 #size-cells = <0>;
  44
  45                 cpu {
  46                         compatible = "arm,arm926ej-s";
  47                         device_type = "cpu";
  48                 };
  49         };
  50
  51         memory {
  52                 reg = <0x20000000 0x10000000>;
  53         };
  54
  55         clocks {
  56                 slow_xtal: slow_xtal {
  57                         compatible = "fixed-clock";
  58                         #clock-cells = <0>;
  59                         clock-frequency = <0>;
  60                 };
  61
  62                 main_xtal: main_xtal {
  63                         compatible = "fixed-clock";
  64                         #clock-cells = <0>;
  65                         clock-frequency = <0>;
  66                 };
  67
  68                 adc_op_clk: adc_op_clk{
  69                         compatible = "fixed-clock";
  70                         #clock-cells = <0>;
  71                         clock-frequency = <5000000>;
  72                 };
  73         };
  74
  75         ahb {
  76                 compatible = "simple-bus";
  77                 #address-cells = <1>;
  78                 #size-cells = <1>;
  79                 ranges;
  80
  81                 apb {
  82                         compatible = "simple-bus";
  83                         #address-cells = <1>;
  84                         #size-cells = <1>;
  85                         ranges;
  86
  87                         aic: interrupt-controller@fffff000 {
  88                                 #interrupt-cells = <3>;
  89                                 compatible = "atmel,at91rm9200-aic";
  90                                 interrupt-controller;
  91                                 reg = <0xfffff000 0x200>;
  92                                 atmel,external-irqs = <31>;
  93                         };
  94
  95                         ramc0: ramc@ffffe800 {
  96                                 compatible = "atmel,at91sam9g45-ddramc";
  97                                 reg = <0xffffe800 0x200>;
  98                         };
  99
 100                         pmc: pmc@fffffc00 {
 101                                 compatible = "atmel,at91sam9x5-pmc";
 102                                 reg = <0xfffffc00 0x100>;
 103                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 104                                 interrupt-controller;
 105                                 #address-cells = <1>;
 106                                 #size-cells = <0>;
 107                                 #interrupt-cells = <1>;
 108
 109                                 main_rc_osc: main_rc_osc {
 110                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 111                                         #clock-cells = <0>;
 112                                         interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
 113                                         clock-frequency = <12000000>;
 114                                         clock-accuracy = <50000000>;
 115                                 };
 116
 117                                 main_osc: main_osc {
 118                                         compatible = "atmel,at91rm9200-clk-main-osc";
 119                                         #clock-cells = <0>;
 120                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 121                                         clocks = <&main_xtal>;
 122                                 };
 123
 124                                 main: mainck {
 125                                         compatible = "atmel,at91sam9x5-clk-main";
 126                                         #clock-cells = <0>;
 127                                         interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
 128                                         clocks = <&main_rc_osc>, <&main_osc>;
 129                                 };
 130
 131                                 plla: pllack {
 132                                         compatible = "atmel,at91rm9200-clk-pll";
 133                                         #clock-cells = <0>;
 134                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 135                                         clocks = <&main>;
 136                                         reg = <0>;
 137                                         atmel,clk-input-range = <2000000 32000000>;
 138                                         #atmel,pll-clk-output-range-cells = <4>;
 139                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0
 140                                                                        695000000 750000000 1 0
 141                                                                        645000000 700000000 2 0
 142                                                                        595000000 650000000 3 0
 143                                                                        545000000 600000000 0 1
 144                                                                        495000000 555000000 1 1
 145                                                                        445000000 500000000 2 1
 146                                                                        400000000 450000000 3 1>;
 147                                 };
 148
 149                                 plladiv: plladivck {
 150                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 151                                         #clock-cells = <0>;
 152                                         clocks = <&plla>;
 153                                 };
 154
 155                                 utmi: utmick {
 156                                         compatible = "atmel,at91sam9x5-clk-utmi";
 157                                         #clock-cells = <0>;
 158                                         interrupts-extended = <&pmc AT91_PMC_LOCKU>;
 159                                         clocks = <&main>;
 160                                 };
 161
 162                                 mck: masterck {
 163                                         compatible = "atmel,at91sam9x5-clk-master";
 164                                         #clock-cells = <0>;
 165                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 166                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 167                                         atmel,clk-output-range = <0 133333333>;
 168                                         atmel,clk-divisors = <1 2 4 3>;
 169                                         atmel,master-clk-have-div3-pres;
 170                                 };
 171
 172                                 usb: usbck {
 173                                         compatible = "atmel,at91sam9x5-clk-usb";
 174                                         #clock-cells = <0>;
 175                                         clocks = <&plladiv>, <&utmi>;
 176                                 };
 177
 178                                 prog: progck {
 179                                         compatible = "atmel,at91sam9x5-clk-programmable";
 180                                         #address-cells = <1>;
 181                                         #size-cells = <0>;
 182                                         interrupt-parent = <&pmc>;
 183                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 184
 185                                         prog0: prog0 {
 186                                                 #clock-cells = <0>;
 187                                                 reg = <0>;
 188                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 189                                         };
 190
 191                                         prog1: prog1 {
 192                                                 #clock-cells = <0>;
 193                                                 reg = <1>;
 194                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 195                                         };
 196                                 };
 197
 198                                 smd: smdclk {
 199                                         compatible = "atmel,at91sam9x5-clk-smd";
 200                                         #clock-cells = <0>;
 201                                         clocks = <&plladiv>, <&utmi>;
 202                                 };
 203
 204                                 systemck {
 205                                         compatible = "atmel,at91rm9200-clk-system";
 206                                         #address-cells = <1>;
 207                                         #size-cells = <0>;
 208
 209                                         ddrck: ddrck {
 210                                                 #clock-cells = <0>;
 211                                                 reg = <2>;
 212                                                 clocks = <&mck>;
 213                                         };
 214
 215                                         smdck: smdck {
 216                                                 #clock-cells = <0>;
 217                                                 reg = <4>;
 218                                                 clocks = <&smd>;
 219                                         };
 220
 221                                         uhpck: uhpck {
 222                                                 #clock-cells = <0>;
 223                                                 reg = <6>;
 224                                                 clocks = <&usb>;
 225                                         };
 226
 227                                         udpck: udpck {
 228                                                 #clock-cells = <0>;
 229                                                 reg = <7>;
 230                                                 clocks = <&usb>;
 231                                         };
 232
 233                                         pck0: pck0 {
 234                                                 #clock-cells = <0>;
 235                                                 reg = <8>;
 236                                                 clocks = <&prog0>;
 237                                         };
 238
 239                                         pck1: pck1 {
 240                                                 #clock-cells = <0>;
 241                                                 reg = <9>;
 242                                                 clocks = <&prog1>;
 243                                         };
 244                                 };
 245
 246                                 periphck {
 247                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 248                                         #address-cells = <1>;
 249                                         #size-cells = <0>;
 250                                         clocks = <&mck>;
 251
 252                                         pioAB_clk: pioAB_clk {
 253                                                 #clock-cells = <0>;
 254                                                 reg = <2>;
 255                                         };
 256
 257                                         pioCD_clk: pioCD_clk {
 258                                                 #clock-cells = <0>;
 259                                                 reg = <3>;
 260                                         };
 261
 262                                         smd_clk: smd_clk {
 263                                                 #clock-cells = <0>;
 264                                                 reg = <4>;
 265                                         };
 266
 267                                         usart0_clk: usart0_clk {
 268                                                 #clock-cells = <0>;
 269                                                 reg = <5>;
 270                                         };
 271
 272                                         usart1_clk: usart1_clk {
 273                                                 #clock-cells = <0>;
 274                                                 reg = <6>;
 275                                         };
 276
 277                                         usart2_clk: usart2_clk {
 278                                                 #clock-cells = <0>;
 279                                                 reg = <7>;
 280                                         };
 281
 282                                         twi0_clk: twi0_clk {
 283                                                 reg = <9>;
 284                                                 #clock-cells = <0>;
 285                                         };
 286
 287                                         twi1_clk: twi1_clk {
 288                                                 #clock-cells = <0>;
 289                                                 reg = <10>;
 290                                         };
 291
 292                                         twi2_clk: twi2_clk {
 293                                                 #clock-cells = <0>;
 294                                                 reg = <11>;
 295                                         };
 296
 297                                         mci0_clk: mci0_clk {
 298                                                 #clock-cells = <0>;
 299                                                 reg = <12>;
 300                                         };
 301
 302                                         spi0_clk: spi0_clk {
 303                                                 #clock-cells = <0>;
 304                                                 reg = <13>;
 305                                         };
 306
 307                                         spi1_clk: spi1_clk {
 308                                                 #clock-cells = <0>;
 309                                                 reg = <14>;
 310                                         };
 311
 312                                         uart0_clk: uart0_clk {
 313                                                 #clock-cells = <0>;
 314                                                 reg = <15>;
 315                                         };
 316
 317                                         uart1_clk: uart1_clk {
 318                                                 #clock-cells = <0>;
 319                                                 reg = <16>;
 320                                         };
 321
 322                                         tcb0_clk: tcb0_clk {
 323                                                 #clock-cells = <0>;
 324                                                 reg = <17>;
 325                                         };
 326
 327                                         pwm_clk: pwm_clk {
 328                                                 #clock-cells = <0>;
 329                                                 reg = <18>;
 330                                         };
 331
 332                                         adc_clk: adc_clk {
 333                                                 #clock-cells = <0>;
 334                                                 reg = <19>;
 335                                         };
 336
 337                                         dma0_clk: dma0_clk {
 338                                                 #clock-cells = <0>;
 339                                                 reg = <20>;
 340                                         };
 341
 342                                         dma1_clk: dma1_clk {
 343                                                 #clock-cells = <0>;
 344                                                 reg = <21>;
 345                                         };
 346
 347                                         uhphs_clk: uhphs_clk {
 348                                                 #clock-cells = <0>;
 349                                                 reg = <22>;
 350                                         };
 351
 352                                         udphs_clk: udphs_clk {
 353                                                 #clock-cells = <0>;
 354                                                 reg = <23>;
 355                                         };
 356
 357                                         mci1_clk: mci1_clk {
 358                                                 #clock-cells = <0>;
 359                                                 reg = <26>;
 360                                         };
 361
 362                                         ssc0_clk: ssc0_clk {
 363                                                 #clock-cells = <0>;
 364                                                 reg = <28>;
 365                                         };
 366                                 };
 367                         };
 368
 369                         rstc@fffffe00 {
 370                                 compatible = "atmel,at91sam9g45-rstc";
 371                                 reg = <0xfffffe00 0x10>;
 372                         };
 373
 374                         shdwc@fffffe10 {
 375                                 compatible = "atmel,at91sam9x5-shdwc";
 376                                 reg = <0xfffffe10 0x10>;
 377                         };
 378
 379                         pit: timer@fffffe30 {
 380                                 compatible = "atmel,at91sam9260-pit";
 381                                 reg = <0xfffffe30 0xf>;
 382                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 383                                 clocks = <&mck>;
 384                         };
 385
 386                         sckc@fffffe50 {
 387                                 compatible = "atmel,at91sam9x5-sckc";
 388                                 reg = <0xfffffe50 0x4>;
 389
 390                                 slow_osc: slow_osc {
 391                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 392                                         #clock-cells = <0>;
 393                                         clocks = <&slow_xtal>;
 394                                 };
 395
 396                                 slow_rc_osc: slow_rc_osc {
 397                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 398                                         #clock-cells = <0>;
 399                                         clock-frequency = <32768>;
 400                                         clock-accuracy = <50000000>;
 401                                 };
 402
 403                                 clk32k: slck {
 404                                         compatible = "atmel,at91sam9x5-clk-slow";
 405                                         #clock-cells = <0>;
 406                                         clocks = <&slow_rc_osc>, <&slow_osc>;
 407                                 };
 408                         };
 409
 410                         tcb0: timer@f8008000 {
 411                                 compatible = "atmel,at91sam9x5-tcb";
 412                                 reg = <0xf8008000 0x100>;
 413                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 414                                 clocks = <&tcb0_clk>;
 415                                 clock-names = "t0_clk";
 416                         };
 417
 418                         tcb1: timer@f800c000 {
 419                                 compatible = "atmel,at91sam9x5-tcb";
 420                                 reg = <0xf800c000 0x100>;
 421                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 422                                 clocks = <&tcb0_clk>;
 423                                 clock-names = "t0_clk";
 424                         };
 425
 426                         dma0: dma-controller@ffffec00 {
 427                                 compatible = "atmel,at91sam9g45-dma";
 428                                 reg = <0xffffec00 0x200>;
 429                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 430                                 #dma-cells = <2>;
 431                                 clocks = <&dma0_clk>;
 432                                 clock-names = "dma_clk";
 433                         };
 434
 435                         dma1: dma-controller@ffffee00 {
 436                                 compatible = "atmel,at91sam9g45-dma";
 437                                 reg = <0xffffee00 0x200>;
 438                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 439                                 #dma-cells = <2>;
 440                                 clocks = <&dma1_clk>;
 441                                 clock-names = "dma_clk";
 442                         };
 443
 444                         pinctrl@fffff400 {
 445                                 #address-cells = <1>;
 446                                 #size-cells = <1>;
 447                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 448                                 ranges = <0xfffff400 0xfffff400 0x800>;
 449
 450                                 /* shared pinctrl settings */
 451                                 dbgu {
 452                                         pinctrl_dbgu: dbgu-0 {
 453                                                 atmel,pins =
 454                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A */
 455                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA10 periph A with pullup */
 456                                         };
 457                                 };
 458
 459                                 usart0 {
 460                                         pinctrl_usart0: usart0-0 {
 461                                                 atmel,pins =
 462                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
 463                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA1 periph A */
 464                                         };
 465
 466                                         pinctrl_usart0_rts: usart0_rts-0 {
 467                                                 atmel,pins =
 468                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 469                                         };
 470
 471                                         pinctrl_usart0_cts: usart0_cts-0 {
 472                                                 atmel,pins =
 473                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 474                                         };
 475
 476                                         pinctrl_usart0_sck: usart0_sck-0 {
 477                                                 atmel,pins =
 478                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
 479                                         };
 480                                 };
 481
 482                                 usart1 {
 483                                         pinctrl_usart1: usart1-0 {
 484                                                 atmel,pins =
 485                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
 486                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA6 periph A */
 487                                         };
 488
 489                                         pinctrl_usart1_rts: usart1_rts-0 {
 490                                                 atmel,pins =
 491                                                         <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
 492                                         };
 493
 494                                         pinctrl_usart1_cts: usart1_cts-0 {
 495                                                 atmel,pins =
 496                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
 497                                         };
 498
 499                                         pinctrl_usart1_sck: usart1_sck-0 {
 500                                                 atmel,pins =
 501                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
 502                                         };
 503                                 };
 504
 505                                 usart2 {
 506                                         pinctrl_usart2: usart2-0 {
 507                                                 atmel,pins =
 508                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 509                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA8 periph A */
 510                                         };
 511
 512                                         pinctrl_usart2_rts: usart2_rts-0 {
 513                                                 atmel,pins =
 514                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 515                                         };
 516
 517                                         pinctrl_usart2_cts: usart2_cts-0 {
 518                                                 atmel,pins =
 519                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 520                                         };
 521
 522                                         pinctrl_usart2_sck: usart2_sck-0 {
 523                                                 atmel,pins =
 524                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
 525                                         };
 526                                 };
 527
 528                                 uart0 {
 529                                         pinctrl_uart0: uart0-0 {
 530                                                 atmel,pins =
 531                                                         <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC8 periph C */
 532                                                          AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;       /* PC9 periph C with pullup */
 533                                         };
 534                                 };
 535
 536                                 uart1 {
 537                                         pinctrl_uart1: uart1-0 {
 538                                                 atmel,pins =
 539                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC16 periph C */
 540                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;      /* PC17 periph C with pullup */
 541                                         };
 542                                 };
 543
 544                                 nand {
 545                                         pinctrl_nand: nand-0 {
 546                                                 atmel,pins =
 547                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A Read Enable */
 548                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A Write Enable */
 549                                                          AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD2 periph A Address Latch Enable */
 550                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A Command Latch Enable */
 551                                                          AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD4 gpio Chip Enable pin pull_up */
 552                                                          AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD5 gpio RDY/BUSY pin pull_up */
 553                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD6 periph A Data bit 0 */
 554                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD7 periph A Data bit 1 */
 555                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD8 periph A Data bit 2 */
 556                                                          AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A Data bit 3 */
 557                                                          AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A Data bit 4 */
 558                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A Data bit 5 */
 559                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD12 periph A Data bit 6 */
 560                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
 561                                         };
 562
 563                                         pinctrl_nand_16bits: nand_16bits-0 {
 564                                                 atmel,pins =
 565                                                         <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A Data bit 8 */
 566                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A Data bit 9 */
 567                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD16 periph A Data bit 10 */
 568                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A Data bit 11 */
 569                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD18 periph A Data bit 12 */
 570                                                          AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD19 periph A Data bit 13 */
 571                                                          AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD20 periph A Data bit 14 */
 572                                                          AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
 573                                         };
 574                                 };
 575
 576                                 mmc0 {
 577                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 578                                                 atmel,pins =
 579                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 580                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 581                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 582                                         };
 583
 584                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 585                                                 atmel,pins =
 586                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 587                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 588                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 589                                         };
 590                                 };
 591
 592                                 mmc1 {
 593                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 594                                                 atmel,pins =
 595                                                         <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA13 periph B */
 596                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 597                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA11 periph B with pullup */
 598                                         };
 599
 600                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 601                                                 atmel,pins =
 602                                                         <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
 603                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
 604                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA4 periph B with pullup */
 605                                         };
 606                                 };
 607
 608                                 ssc0 {
 609                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 610                                                 atmel,pins =
 611                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 612                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 613                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 614                                         };
 615
 616                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 617                                                 atmel,pins =
 618                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 619                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 620                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 621                                         };
 622                                 };
 623
 624                                 spi0 {
 625                                         pinctrl_spi0: spi0-0 {
 626                                                 atmel,pins =
 627                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 628                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 629                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 630                                         };
 631                                 };
 632
 633                                 spi1 {
 634                                         pinctrl_spi1: spi1-0 {
 635                                                 atmel,pins =
 636                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 637                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 638                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 639                                         };
 640                                 };
 641
 642                                 i2c0 {
 643                                         pinctrl_i2c0: i2c0-0 {
 644                                                 atmel,pins =
 645                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A I2C0 data */
 646                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
 647                                         };
 648                                 };
 649
 650                                 i2c1 {
 651                                         pinctrl_i2c1: i2c1-0 {
 652                                                 atmel,pins =
 653                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC0 periph C I2C1 data */
 654                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC1 periph C I2C1 clock */
 655                                         };
 656                                 };
 657
 658                                 i2c2 {
 659                                         pinctrl_i2c2: i2c2-0 {
 660                                                 atmel,pins =
 661                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B I2C2 data */
 662                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B I2C2 clock */
 663                                         };
 664                                 };
 665
 666                                 i2c_gpio0 {
 667                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 668                                                 atmel,pins =
 669                                                         <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
 670                                                          AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;       /* PA31 gpio multidrive I2C0 clock */
 671                                         };
 672                                 };
 673
 674                                 i2c_gpio1 {
 675                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
 676                                                 atmel,pins =
 677                                                         <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PC0 gpio multidrive I2C1 data */
 678                                                          AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PC1 gpio multidrive I2C1 clock */
 679                                         };
 680                                 };
 681
 682                                 i2c_gpio2 {
 683                                         pinctrl_i2c_gpio2: i2c_gpio2-0 {
 684                                                 atmel,pins =
 685                                                         <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PB4 gpio multidrive I2C2 data */
 686                                                          AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PB5 gpio multidrive I2C2 clock */
 687                                         };
 688                                 };
 689
 690                                 tcb0 {
 691                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 692                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 693                                         };
 694
 695                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 696                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 697                                         };
 698
 699                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 700                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 701                                         };
 702
 703                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 704                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 705                                         };
 706
 707                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 708                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 709                                         };
 710
 711                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 712                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 713                                         };
 714
 715                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 716                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 717                                         };
 718
 719                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 720                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 721                                         };
 722
 723                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 724                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 725                                         };
 726                                 };
 727
 728                                 tcb1 {
 729                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 730                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 731                                         };
 732
 733                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 734                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 735                                         };
 736
 737                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 738                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 739                                         };
 740
 741                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 742                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 743                                         };
 744
 745                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 746                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 747                                         };
 748
 749                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 750                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 751                                         };
 752
 753                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 754                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 755                                         };
 756
 757                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 758                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 759                                         };
 760
 761                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 762                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 763                                         };
 764                                 };
 765
 766                                 pioA: gpio@fffff400 {
 767                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 768                                         reg = <0xfffff400 0x200>;
 769                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 770                                         #gpio-cells = <2>;
 771                                         gpio-controller;
 772                                         interrupt-controller;
 773                                         #interrupt-cells = <2>;
 774                                         clocks = <&pioAB_clk>;
 775                                 };
 776
 777                                 pioB: gpio@fffff600 {
 778                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 779                                         reg = <0xfffff600 0x200>;
 780                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 781                                         #gpio-cells = <2>;
 782                                         gpio-controller;
 783                                         #gpio-lines = <19>;
 784                                         interrupt-controller;
 785                                         #interrupt-cells = <2>;
 786                                         clocks = <&pioAB_clk>;
 787                                 };
 788
 789                                 pioC: gpio@fffff800 {
 790                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 791                                         reg = <0xfffff800 0x200>;
 792                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 793                                         #gpio-cells = <2>;
 794                                         gpio-controller;
 795                                         interrupt-controller;
 796                                         #interrupt-cells = <2>;
 797                                         clocks = <&pioCD_clk>;
 798                                 };
 799
 800                                 pioD: gpio@fffffa00 {
 801                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 802                                         reg = <0xfffffa00 0x200>;
 803                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 804                                         #gpio-cells = <2>;
 805                                         gpio-controller;
 806                                         #gpio-lines = <22>;
 807                                         interrupt-controller;
 808                                         #interrupt-cells = <2>;
 809                                         clocks = <&pioCD_clk>;
 810                                 };
 811                         };
 812
 813                         ssc0: ssc@f0010000 {
 814                                 compatible = "atmel,at91sam9g45-ssc";
 815                                 reg = <0xf0010000 0x4000>;
 816                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 817                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
 818                                        <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
 819                                 dma-names = "tx", "rx";
 820                                 pinctrl-names = "default";
 821                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 822                                 clocks = <&ssc0_clk>;
 823                                 clock-names = "pclk";
 824                                 status = "disabled";
 825                         };
 826
 827                         mmc0: mmc@f0008000 {
 828                                 compatible = "atmel,hsmci";
 829                                 reg = <0xf0008000 0x600>;
 830                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 831                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
 832                                 dma-names = "rxtx";
 833                                 pinctrl-names = "default";
 834                                 clocks = <&mci0_clk>;
 835                                 clock-names = "mci_clk";
 836                                 #address-cells = <1>;
 837                                 #size-cells = <0>;
 838                                 status = "disabled";
 839                         };
 840
 841                         mmc1: mmc@f000c000 {
 842                                 compatible = "atmel,hsmci";
 843                                 reg = <0xf000c000 0x600>;
 844                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 845                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
 846                                 dma-names = "rxtx";
 847                                 pinctrl-names = "default";
 848                                 clocks = <&mci1_clk>;
 849                                 clock-names = "mci_clk";
 850                                 #address-cells = <1>;
 851                                 #size-cells = <0>;
 852                                 status = "disabled";
 853                         };
 854
 855                         dbgu: serial@fffff200 {
 856                                 compatible = "atmel,at91sam9260-usart";
 857                                 reg = <0xfffff200 0x200>;
 858                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 859                                 pinctrl-names = "default";
 860                                 pinctrl-0 = <&pinctrl_dbgu>;
 861                                 clocks = <&mck>;
 862                                 clock-names = "usart";
 863                                 status = "disabled";
 864                         };
 865
 866                         usart0: serial@f801c000 {
 867                                 compatible = "atmel,at91sam9260-usart";
 868                                 reg = <0xf801c000 0x200>;
 869                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 870                                 pinctrl-names = "default";
 871                                 pinctrl-0 = <&pinctrl_usart0>;
 872                                 clocks = <&usart0_clk>;
 873                                 clock-names = "usart";
 874                                 status = "disabled";
 875                         };
 876
 877                         usart1: serial@f8020000 {
 878                                 compatible = "atmel,at91sam9260-usart";
 879                                 reg = <0xf8020000 0x200>;
 880                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 881                                 pinctrl-names = "default";
 882                                 pinctrl-0 = <&pinctrl_usart1>;
 883                                 clocks = <&usart1_clk>;
 884                                 clock-names = "usart";
 885                                 status = "disabled";
 886                         };
 887
 888                         usart2: serial@f8024000 {
 889                                 compatible = "atmel,at91sam9260-usart";
 890                                 reg = <0xf8024000 0x200>;
 891                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 892                                 pinctrl-names = "default";
 893                                 pinctrl-0 = <&pinctrl_usart2>;
 894                                 clocks = <&usart2_clk>;
 895                                 clock-names = "usart";
 896                                 status = "disabled";
 897                         };
 898
 899                         i2c0: i2c@f8010000 {
 900                                 compatible = "atmel,at91sam9x5-i2c";
 901                                 reg = <0xf8010000 0x100>;
 902                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
 903                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
 904                                        <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
 905                                 dma-names = "tx", "rx";
 906                                 #address-cells = <1>;
 907                                 #size-cells = <0>;
 908                                 pinctrl-names = "default";
 909                                 pinctrl-0 = <&pinctrl_i2c0>;
 910                                 clocks = <&twi0_clk>;
 911                                 status = "disabled";
 912                         };
 913
 914                         i2c1: i2c@f8014000 {
 915                                 compatible = "atmel,at91sam9x5-i2c";
 916                                 reg = <0xf8014000 0x100>;
 917                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
 918                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
 919                                        <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
 920                                 dma-names = "tx", "rx";
 921                                 #address-cells = <1>;
 922                                 #size-cells = <0>;
 923                                 pinctrl-names = "default";
 924                                 pinctrl-0 = <&pinctrl_i2c1>;
 925                                 clocks = <&twi1_clk>;
 926                                 status = "disabled";
 927                         };
 928
 929                         i2c2: i2c@f8018000 {
 930                                 compatible = "atmel,at91sam9x5-i2c";
 931                                 reg = <0xf8018000 0x100>;
 932                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
 933                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
 934                                        <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
 935                                 dma-names = "tx", "rx";
 936                                 #address-cells = <1>;
 937                                 #size-cells = <0>;
 938                                 pinctrl-names = "default";
 939                                 pinctrl-0 = <&pinctrl_i2c2>;
 940                                 clocks = <&twi2_clk>;
 941                                 status = "disabled";
 942                         };
 943
 944                         uart0: serial@f8040000 {
 945                                 compatible = "atmel,at91sam9260-usart";
 946                                 reg = <0xf8040000 0x200>;
 947                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 948                                 pinctrl-names = "default";
 949                                 pinctrl-0 = <&pinctrl_uart0>;
 950                                 clocks = <&uart0_clk>;
 951                                 clock-names = "usart";
 952                                 status = "disabled";
 953                         };
 954
 955                         uart1: serial@f8044000 {
 956                                 compatible = "atmel,at91sam9260-usart";
 957                                 reg = <0xf8044000 0x200>;
 958                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 959                                 pinctrl-names = "default";
 960                                 pinctrl-0 = <&pinctrl_uart1>;
 961                                 clocks = <&uart1_clk>;
 962                                 clock-names = "usart";
 963                                 status = "disabled";
 964                         };
 965
 966                         adc0: adc@f804c000 {
 967                                 #address-cells = <1>;
 968                                 #size-cells = <0>;
 969                                 compatible = "atmel,at91sam9260-adc";
 970                                 reg = <0xf804c000 0x100>;
 971                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
 972                                 clocks = <&adc_clk>,
 973                                          <&adc_op_clk>;
 974                                 clock-names = "adc_clk", "adc_op_clk";
 975                                 atmel,adc-use-external-triggers;
 976                                 atmel,adc-channels-used = <0xffff>;
 977                                 atmel,adc-vref = <3300>;
 978                                 atmel,adc-startup-time = <40>;
 979                                 atmel,adc-res = <8 10>;
 980                                 atmel,adc-res-names = "lowres", "highres";
 981                                 atmel,adc-use-res = "highres";
 982
 983                                 trigger@0 {
 984                                         reg = <0>;
 985                                         trigger-name = "external-rising";
 986                                         trigger-value = <0x1>;
 987                                         trigger-external;
 988                                 };
 989
 990                                 trigger@1 {
 991                                         reg = <1>;
 992                                         trigger-name = "external-falling";
 993                                         trigger-value = <0x2>;
 994                                         trigger-external;
 995                                 };
 996
 997                                 trigger@2 {
 998                                         reg = <2>;
 999                                         trigger-name = "external-any";
1000                                         trigger-value = <0x3>;
1001                                         trigger-external;
1002                                 };
1003
1004                                 trigger@3 {
1005                                         reg = <3>;
1006                                         trigger-name = "continuous";
1007                                         trigger-value = <0x6>;
1008                                 };
1009                         };
1010
1011                         spi0: spi@f0000000 {
1012                                 #address-cells = <1>;
1013                                 #size-cells = <0>;
1014                                 compatible = "atmel,at91rm9200-spi";
1015                                 reg = <0xf0000000 0x100>;
1016                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
1017                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
1018                                        <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
1019                                 dma-names = "tx", "rx";
1020                                 pinctrl-names = "default";
1021                                 pinctrl-0 = <&pinctrl_spi0>;
1022                                 clocks = <&spi0_clk>;
1023                                 clock-names = "spi_clk";
1024                                 status = "disabled";
1025                         };
1026
1027                         spi1: spi@f0004000 {
1028                                 #address-cells = <1>;
1029                                 #size-cells = <0>;
1030                                 compatible = "atmel,at91rm9200-spi";
1031                                 reg = <0xf0004000 0x100>;
1032                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
1033                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
1034                                        <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
1035                                 dma-names = "tx", "rx";
1036                                 pinctrl-names = "default";
1037                                 pinctrl-0 = <&pinctrl_spi1>;
1038                                 clocks = <&spi1_clk>;
1039                                 clock-names = "spi_clk";
1040                                 status = "disabled";
1041                         };
1042
1043                         usb2: gadget@f803c000 {
1044                                 #address-cells = <1>;
1045                                 #size-cells = <0>;
1046                                 compatible = "atmel,at91sam9rl-udc";
1047                                 reg = <0x00500000 0x80000
1048                                        0xf803c000 0x400>;
1049                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1050                                 clocks = <&usb>, <&udphs_clk>;
1051                                 clock-names = "hclk", "pclk";
1052                                 status = "disabled";
1053
1054                                 ep0 {
1055                                         reg = <0>;
1056                                         atmel,fifo-size = <64>;
1057                                         atmel,nb-banks = <1>;
1058                                 };
1059
1060                                 ep1 {
1061                                         reg = <1>;
1062                                         atmel,fifo-size = <1024>;
1063                                         atmel,nb-banks = <2>;
1064                                         atmel,can-dma;
1065                                         atmel,can-isoc;
1066                                 };
1067
1068                                 ep2 {
1069                                         reg = <2>;
1070                                         atmel,fifo-size = <1024>;
1071                                         atmel,nb-banks = <2>;
1072                                         atmel,can-dma;
1073                                         atmel,can-isoc;
1074                                 };
1075
1076                                 ep3 {
1077                                         reg = <3>;
1078                                         atmel,fifo-size = <1024>;
1079                                         atmel,nb-banks = <3>;
1080                                         atmel,can-dma;
1081                                 };
1082
1083                                 ep4 {
1084                                         reg = <4>;
1085                                         atmel,fifo-size = <1024>;
1086                                         atmel,nb-banks = <3>;
1087                                         atmel,can-dma;
1088                                 };
1089
1090                                 ep5 {
1091                                         reg = <5>;
1092                                         atmel,fifo-size = <1024>;
1093                                         atmel,nb-banks = <3>;
1094                                         atmel,can-dma;
1095                                         atmel,can-isoc;
1096                                 };
1097
1098                                 ep6 {
1099                                         reg = <6>;
1100                                         atmel,fifo-size = <1024>;
1101                                         atmel,nb-banks = <3>;
1102                                         atmel,can-dma;
1103                                         atmel,can-isoc;
1104                                 };
1105                         };
1106
1107                         watchdog@fffffe40 {
1108                                 compatible = "atmel,at91sam9260-wdt";
1109                                 reg = <0xfffffe40 0x10>;
1110                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1111                                 atmel,watchdog-type = "hardware";
1112                                 atmel,reset-type = "all";
1113                                 atmel,dbg-halt;
1114                                 atmel,idle-halt;
1115                                 status = "disabled";
1116                         };
1117
1118                         rtc@fffffeb0 {
1119                                 compatible = "atmel,at91sam9x5-rtc";
1120                                 reg = <0xfffffeb0 0x40>;
1121                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1122                                 status = "disabled";
1123                         };
1124
1125                         pwm0: pwm@f8034000 {
1126                                 compatible = "atmel,at91sam9rl-pwm";
1127                                 reg = <0xf8034000 0x300>;
1128                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1129                                 clocks = <&pwm_clk>;
1130                                 #pwm-cells = <3>;
1131                                 status = "disabled";
1132                         };
1133                 };
1134
1135                 nand0: nand@40000000 {
1136                         compatible = "atmel,at91rm9200-nand";
1137                         #address-cells = <1>;
1138                         #size-cells = <1>;
1139                         reg = <0x40000000 0x10000000
1140                                0xffffe000 0x600         /* PMECC Registers */
1141                                0xffffe600 0x200         /* PMECC Error Location Registers */
1142                                0x00108000 0x18000       /* PMECC looup table in ROM code  */
1143                               >;
1144                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1145                         atmel,nand-addr-offset = <21>;
1146                         atmel,nand-cmd-offset = <22>;
1147                         atmel,nand-has-dma;
1148                         pinctrl-names = "default";
1149                         pinctrl-0 = <&pinctrl_nand>;
1150                         gpios = <&pioD 5 GPIO_ACTIVE_HIGH
1151                                  &pioD 4 GPIO_ACTIVE_HIGH
1152                                  0
1153                                 >;
1154                         status = "disabled";
1155                 };
1156
1157                 usb0: ohci@00600000 {
1158                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1159                         reg = <0x00600000 0x100000>;
1160                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1161                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1162                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1163                         status = "disabled";
1164                 };
1165
1166                 usb1: ehci@00700000 {
1167                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1168                         reg = <0x00700000 0x100000>;
1169                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1170                         clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1171                         clock-names = "usb_clk", "ehci_clk", "uhpck";
1172                         status = "disabled";
1173                 };
1174         };
1175
1176         i2c@0 {
1177                 compatible = "i2c-gpio";
1178                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1179                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1180                         >;
1181                 i2c-gpio,sda-open-drain;
1182                 i2c-gpio,scl-open-drain;
1183                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1184                 #address-cells = <1>;
1185                 #size-cells = <0>;
1186                 pinctrl-names = "default";
1187                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1188                 status = "disabled";
1189         };
1190
1191         i2c@1 {
1192                 compatible = "i2c-gpio";
1193                 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1194                          &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1195                         >;
1196                 i2c-gpio,sda-open-drain;
1197                 i2c-gpio,scl-open-drain;
1198                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1199                 #address-cells = <1>;
1200                 #size-cells = <0>;
1201                 pinctrl-names = "default";
1202                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1203                 status = "disabled";
1204         };
1205
1206         i2c@2 {
1207                 compatible = "i2c-gpio";
1208                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1209                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1210                         >;
1211                 i2c-gpio,sda-open-drain;
1212                 i2c-gpio,scl-open-drain;
1213                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1214                 #address-cells = <1>;
1215                 #size-cells = <0>;
1216                 pinctrl-names = "default";
1217                 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1218                 status = "disabled";
1219         };
1220 };