arch/arm/boot/dts/at91sam9x5.dtsi

   1 /*
   2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
   3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
   4  *                   AT91SAM9X25, AT91SAM9X35 SoC
   5  *
   6  *  Copyright (C) 2012 Atmel,
   7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 /include/ "skeleton.dtsi"
  13
  14 / {
  15         model = "Atmel AT91SAM9x5 family SoC";
  16         compatible = "atmel,at91sam9x5";
  17         interrupt-parent = <&aic>;
  18
  19         aliases {
  20                 serial0 = &dbgu;
  21                 serial1 = &usart0;
  22                 serial2 = &usart1;
  23                 serial3 = &usart2;
  24                 gpio0 = &pioA;
  25                 gpio1 = &pioB;
  26                 gpio2 = &pioC;
  27                 gpio3 = &pioD;
  28                 tcb0 = &tcb0;
  29                 tcb1 = &tcb1;
  30                 i2c0 = &i2c0;
  31                 i2c1 = &i2c1;
  32                 i2c2 = &i2c2;
  33                 ssc0 = &ssc0;
  34         };
  35         cpus {
  36                 #address-cells = <0>;
  37                 #size-cells = <0>;
  38
  39                 cpu {
  40                         compatible = "arm,arm926ej-s";
  41                         device_type = "cpu";
  42                 };
  43         };
  44
  45         memory {
  46                 reg = <0x20000000 0x10000000>;
  47         };
  48
  49         ahb {
  50                 compatible = "simple-bus";
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53                 ranges;
  54
  55                 apb {
  56                         compatible = "simple-bus";
  57                         #address-cells = <1>;
  58                         #size-cells = <1>;
  59                         ranges;
  60
  61                         aic: interrupt-controller@fffff000 {
  62                                 #interrupt-cells = <3>;
  63                                 compatible = "atmel,at91rm9200-aic";
  64                                 interrupt-controller;
  65                                 reg = <0xfffff000 0x200>;
  66                                 atmel,external-irqs = <31>;
  67                         };
  68
  69                         ramc0: ramc@ffffe800 {
  70                                 compatible = "atmel,at91sam9g45-ddramc";
  71                                 reg = <0xffffe800 0x200>;
  72                         };
  73
  74                         pmc: pmc@fffffc00 {
  75                                 compatible = "atmel,at91rm9200-pmc";
  76                                 reg = <0xfffffc00 0x100>;
  77                         };
  78
  79                         rstc@fffffe00 {
  80                                 compatible = "atmel,at91sam9g45-rstc";
  81                                 reg = <0xfffffe00 0x10>;
  82                         };
  83
  84                         shdwc@fffffe10 {
  85                                 compatible = "atmel,at91sam9x5-shdwc";
  86                                 reg = <0xfffffe10 0x10>;
  87                         };
  88
  89                         pit: timer@fffffe30 {
  90                                 compatible = "atmel,at91sam9260-pit";
  91                                 reg = <0xfffffe30 0xf>;
  92                                 interrupts = <1 4 7>;
  93                         };
  94
  95                         tcb0: timer@f8008000 {
  96                                 compatible = "atmel,at91sam9x5-tcb";
  97                                 reg = <0xf8008000 0x100>;
  98                                 interrupts = <17 4 0>;
  99                         };
 100
 101                         tcb1: timer@f800c000 {
 102                                 compatible = "atmel,at91sam9x5-tcb";
 103                                 reg = <0xf800c000 0x100>;
 104                                 interrupts = <17 4 0>;
 105                         };
 106
 107                         dma0: dma-controller@ffffec00 {
 108                                 compatible = "atmel,at91sam9g45-dma";
 109                                 reg = <0xffffec00 0x200>;
 110                                 interrupts = <20 4 0>;
 111                                 #dma-cells = <2>;
 112                         };
 113
 114                         dma1: dma-controller@ffffee00 {
 115                                 compatible = "atmel,at91sam9g45-dma";
 116                                 reg = <0xffffee00 0x200>;
 117                                 interrupts = <21 4 0>;
 118                                 #dma-cells = <2>;
 119                         };
 120
 121                         pinctrl@fffff400 {
 122                                 #address-cells = <1>;
 123                                 #size-cells = <1>;
 124                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 125                                 ranges = <0xfffff400 0xfffff400 0x800>;
 126
 127                                 /* shared pinctrl settings */
 128                                 dbgu {
 129                                         pinctrl_dbgu: dbgu-0 {
 130                                                 atmel,pins =
 131                                                         <0 9 0x1 0x0    /* PA9 periph A */
 132                                                          0 10 0x1 0x1>; /* PA10 periph A with pullup */
 133                                         };
 134                                 };
 135
 136                                 usart0 {
 137                                         pinctrl_usart0: usart0-0 {
 138                                                 atmel,pins =
 139                                                         <0 0 0x1 0x1    /* PA0 periph A with pullup */
 140                                                          0 1 0x1 0x0>;  /* PA1 periph A */
 141                                         };
 142
 143                                         pinctrl_usart0_rts: usart0_rts-0 {
 144                                                 atmel,pins =
 145                                                         <0 2 0x1 0x0>;  /* PA2 periph A */
 146                                         };
 147
 148                                         pinctrl_usart0_cts: usart0_cts-0 {
 149                                                 atmel,pins =
 150                                                         <0 3 0x1 0x0>;  /* PA3 periph A */
 151                                         };
 152
 153                                         pinctrl_usart0_sck: usart0_sck-0 {
 154                                                 atmel,pins =
 155                                                         <0 4 0x1 0x0>;  /* PA4 periph A */
 156                                         };
 157                                 };
 158
 159                                 usart1 {
 160                                         pinctrl_usart1: usart1-0 {
 161                                                 atmel,pins =
 162                                                         <0 5 0x1 0x1    /* PA5 periph A with pullup */
 163                                                          0 6 0x1 0x0>;  /* PA6 periph A */
 164                                         };
 165
 166                                         pinctrl_usart1_rts: usart1_rts-0 {
 167                                                 atmel,pins =
 168                                                         <2 27 0x3 0x0>; /* PC27 periph C */
 169                                         };
 170
 171                                         pinctrl_usart1_cts: usart1_cts-0 {
 172                                                 atmel,pins =
 173                                                         <2 28 0x3 0x0>; /* PC28 periph C */
 174                                         };
 175
 176                                         pinctrl_usart1_sck: usart1_sck-0 {
 177                                                 atmel,pins =
 178                                                         <2 28 0x3 0x0>; /* PC29 periph C */
 179                                         };
 180                                 };
 181
 182                                 usart2 {
 183                                         pinctrl_usart2: usart2-0 {
 184                                                 atmel,pins =
 185                                                         <0 7 0x1 0x1    /* PA7 periph A with pullup */
 186                                                          0 8 0x1 0x0>;  /* PA8 periph A */
 187                                         };
 188
 189                                         pinctrl_uart2_rts: uart2_rts-0 {
 190                                                 atmel,pins =
 191                                                         <1 0 0x2 0x0>;  /* PB0 periph B */
 192                                         };
 193
 194                                         pinctrl_uart2_cts: uart2_cts-0 {
 195                                                 atmel,pins =
 196                                                         <1 1 0x2 0x0>;  /* PB1 periph B */
 197                                         };
 198
 199                                         pinctrl_usart2_sck: usart2_sck-0 {
 200                                                 atmel,pins =
 201                                                         <1 2 0x2 0x0>;  /* PB2 periph B */
 202                                         };
 203                                 };
 204
 205                                 usart3 {
 206                                         pinctrl_usart3: usart3-0 {
 207                                                 atmel,pins =
 208                                                         <2 22 0x2 0x1   /* PC22 periph B with pullup */
 209                                                          2 23 0x2 0x0>; /* PC23 periph B */
 210                                         };
 211
 212                                         pinctrl_usart3_rts: usart3_rts-0 {
 213                                                 atmel,pins =
 214                                                         <2 24 0x2 0x0>; /* PC24 periph B */
 215                                         };
 216
 217                                         pinctrl_usart3_cts: usart3_cts-0 {
 218                                                 atmel,pins =
 219                                                         <2 25 0x2 0x0>; /* PC25 periph B */
 220                                         };
 221
 222                                         pinctrl_usart3_sck: usart3_sck-0 {
 223                                                 atmel,pins =
 224                                                         <2 26 0x2 0x0>; /* PC26 periph B */
 225                                         };
 226                                 };
 227
 228                                 uart0 {
 229                                         pinctrl_uart0: uart0-0 {
 230                                                 atmel,pins =
 231                                                         <2 8 0x3 0x0    /* PC8 periph C */
 232                                                          2 9 0x3 0x1>;  /* PC9 periph C with pullup */
 233                                         };
 234                                 };
 235
 236                                 uart1 {
 237                                         pinctrl_uart1: uart1-0 {
 238                                                 atmel,pins =
 239                                                         <2 16 0x3 0x0   /* PC16 periph C */
 240                                                          2 17 0x3 0x1>; /* PC17 periph C with pullup */
 241                                         };
 242                                 };
 243
 244                                 nand {
 245                                         pinctrl_nand: nand-0 {
 246                                                 atmel,pins =
 247                                                         <3 0 0x1 0x0    /* PD0 periph A Read Enable */
 248                                                          3 1 0x1 0x0    /* PD1 periph A Write Enable */
 249                                                          3 2 0x1 0x0    /* PD2 periph A Address Latch Enable */
 250                                                          3 3 0x1 0x0    /* PD3 periph A Command Latch Enable */
 251                                                          3 4 0x0 0x1    /* PD4 gpio Chip Enable pin pull_up */
 252                                                          3 5 0x0 0x1    /* PD5 gpio RDY/BUSY pin pull_up */
 253                                                          3 6 0x1 0x0    /* PD6 periph A Data bit 0 */
 254                                                          3 7 0x1 0x0    /* PD7 periph A Data bit 1 */
 255                                                          3 8 0x1 0x0    /* PD8 periph A Data bit 2 */
 256                                                          3 9 0x1 0x0    /* PD9 periph A Data bit 3 */
 257                                                          3 10 0x1 0x0   /* PD10 periph A Data bit 4 */
 258                                                          3 11 0x1 0x0   /* PD11 periph A Data bit 5 */
 259                                                          3 12 0x1 0x0   /* PD12 periph A Data bit 6 */
 260                                                          3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
 261                                         };
 262
 263                                         pinctrl_nand_16bits: nand_16bits-0 {
 264                                                 atmel,pins =
 265                                                         <3 14 0x1 0x0   /* PD14 periph A Data bit 8 */
 266                                                          3 15 0x1 0x0   /* PD15 periph A Data bit 9 */
 267                                                          3 16 0x1 0x0   /* PD16 periph A Data bit 10 */
 268                                                          3 17 0x1 0x0   /* PD17 periph A Data bit 11 */
 269                                                          3 18 0x1 0x0   /* PD18 periph A Data bit 12 */
 270                                                          3 19 0x1 0x0   /* PD19 periph A Data bit 13 */
 271                                                          3 20 0x1 0x0   /* PD20 periph A Data bit 14 */
 272                                                          3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
 273                                         };
 274                                 };
 275
 276                                 macb0 {
 277                                         pinctrl_macb0_rmii: macb0_rmii-0 {
 278                                                 atmel,pins =
 279                                                         <1 0 0x1 0x0    /* PB0 periph A */
 280                                                          1 1 0x1 0x0    /* PB1 periph A */
 281                                                          1 2 0x1 0x0    /* PB2 periph A */
 282                                                          1 3 0x1 0x0    /* PB3 periph A */
 283                                                          1 4 0x1 0x0    /* PB4 periph A */
 284                                                          1 5 0x1 0x0    /* PB5 periph A */
 285                                                          1 6 0x1 0x0    /* PB6 periph A */
 286                                                          1 7 0x1 0x0    /* PB7 periph A */
 287                                                          1 9 0x1 0x0    /* PB9 periph A */
 288                                                          1 10 0x1 0x0>; /* PB10 periph A */
 289                                         };
 290
 291                                         pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
 292                                                 atmel,pins =
 293                                                         <1 8 0x1 0x0    /* PB8 periph A */
 294                                                          1 11 0x1 0x0   /* PB11 periph A */
 295                                                          1 12 0x1 0x0   /* PB12 periph A */
 296                                                          1 13 0x1 0x0   /* PB13 periph A */
 297                                                          1 14 0x1 0x0   /* PB14 periph A */
 298                                                          1 15 0x1 0x0   /* PB15 periph A */
 299                                                          1 16 0x1 0x0   /* PB16 periph A */
 300                                                          1 17 0x1 0x0>; /* PB17 periph A */
 301                                         };
 302                                 };
 303
 304                                 mmc0 {
 305                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 306                                                 atmel,pins =
 307                                                         <0 17 0x1 0x0   /* PA17 periph A */
 308                                                          0 16 0x1 0x1   /* PA16 periph A with pullup */
 309                                                          0 15 0x1 0x1>; /* PA15 periph A with pullup */
 310                                         };
 311
 312                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 313                                                 atmel,pins =
 314                                                         <0 18 0x1 0x1   /* PA18 periph A with pullup */
 315                                                          0 19 0x1 0x1   /* PA19 periph A with pullup */
 316                                                          0 20 0x1 0x1>; /* PA20 periph A with pullup */
 317                                         };
 318                                 };
 319
 320                                 mmc1 {
 321                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 322                                                 atmel,pins =
 323                                                         <0 13 0x2 0x0   /* PA13 periph B */
 324                                                          0 12 0x2 0x1   /* PA12 periph B with pullup */
 325                                                          0 11 0x2 0x1>; /* PA11 periph B with pullup */
 326                                         };
 327
 328                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 329                                                 atmel,pins =
 330                                                         <0 2 0x2 0x1    /* PA2 periph B with pullup */
 331                                                          0 3 0x2 0x1    /* PA3 periph B with pullup */
 332                                                          0 4 0x2 0x1>;  /* PA4 periph B with pullup */
 333                                         };
 334                                 };
 335
 336                                 ssc0 {
 337                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 338                                                 atmel,pins =
 339                                                         <0 24 0x2 0x0   /* PA24 periph B */
 340                                                          0 25 0x2 0x0   /* PA25 periph B */
 341                                                          0 26 0x2 0x0>; /* PA26 periph B */
 342                                         };
 343
 344                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 345                                                 atmel,pins =
 346                                                         <0 27 0x2 0x0   /* PA27 periph B */
 347                                                          0 28 0x2 0x0   /* PA28 periph B */
 348                                                          0 29 0x2 0x0>; /* PA29 periph B */
 349                                         };
 350                                 };
 351
 352                                 spi0 {
 353                                         pinctrl_spi0: spi0-0 {
 354                                                 atmel,pins =
 355                                                         <0 11 0x1 0x0   /* PA11 periph A SPI0_MISO pin */
 356                                                          0 12 0x1 0x0   /* PA12 periph A SPI0_MOSI pin */
 357                                                          0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
 358                                         };
 359                                 };
 360
 361                                 spi1 {
 362                                         pinctrl_spi1: spi1-0 {
 363                                                 atmel,pins =
 364                                                         <0 21 0x2 0x0   /* PA21 periph B SPI1_MISO pin */
 365                                                          0 22 0x2 0x0   /* PA22 periph B SPI1_MOSI pin */
 366                                                          0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
 367                                         };
 368                                 };
 369
 370                                 i2c0 {
 371                                         pinctrl_i2c0: i2c0-0 {
 372                                                 atmel,pins =
 373                                                         <0 30 0x1 0x0   /* PA30 periph A I2C0 data */
 374                                                          0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */
 375                                         };
 376                                 };
 377
 378                                 i2c1 {
 379                                         pinctrl_i2c1: i2c1-0 {
 380                                                 atmel,pins =
 381                                                         <2 0 0x3 0x0    /* PC0 periph C I2C1 data */
 382                                                          2 1 0x3 0x0>;  /* PC1 periph C I2C1 clock */
 383                                         };
 384                                 };
 385
 386                                 i2c2 {
 387                                         pinctrl_i2c2: i2c2-0 {
 388                                                 atmel,pins =
 389                                                         <1 4 0x2 0x0    /* PB4 periph B I2C2 data */
 390                                                          1 5 0x2 0x0>;  /* PB5 periph B I2C2 clock */
 391                                         };
 392                                 };
 393
 394                                 i2c_gpio0 {
 395                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 396                                                 atmel,pins =
 397                                                         <0 30 0x0 0x2   /* PA30 gpio multidrive I2C0 data */
 398                                                          0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */
 399                                         };
 400                                 };
 401
 402                                 i2c_gpio1 {
 403                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
 404                                                 atmel,pins =
 405                                                         <2 0 0x0 0x2    /* PC0 gpio multidrive I2C1 data */
 406                                                          2 1 0x0 0x2>;  /* PC1 gpio multidrive I2C1 clock */
 407                                         };
 408                                 };
 409
 410                                 i2c_gpio2 {
 411                                         pinctrl_i2c_gpio2: i2c_gpio2-0 {
 412                                                 atmel,pins =
 413                                                         <1 4 0x0 0x2    /* PB4 gpio multidrive I2C2 data */
 414                                                          1 5 0x0 0x2>;  /* PB5 gpio multidrive I2C2 clock */
 415                                         };
 416                                 };
 417
 418                                 pioA: gpio@fffff400 {
 419                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 420                                         reg = <0xfffff400 0x200>;
 421                                         interrupts = <2 4 1>;
 422                                         #gpio-cells = <2>;
 423                                         gpio-controller;
 424                                         interrupt-controller;
 425                                         #interrupt-cells = <2>;
 426                                 };
 427
 428                                 pioB: gpio@fffff600 {
 429                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 430                                         reg = <0xfffff600 0x200>;
 431                                         interrupts = <2 4 1>;
 432                                         #gpio-cells = <2>;
 433                                         gpio-controller;
 434                                         #gpio-lines = <19>;
 435                                         interrupt-controller;
 436                                         #interrupt-cells = <2>;
 437                                 };
 438
 439                                 pioC: gpio@fffff800 {
 440                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 441                                         reg = <0xfffff800 0x200>;
 442                                         interrupts = <3 4 1>;
 443                                         #gpio-cells = <2>;
 444                                         gpio-controller;
 445                                         interrupt-controller;
 446                                         #interrupt-cells = <2>;
 447                                 };
 448
 449                                 pioD: gpio@fffffa00 {
 450                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 451                                         reg = <0xfffffa00 0x200>;
 452                                         interrupts = <3 4 1>;
 453                                         #gpio-cells = <2>;
 454                                         gpio-controller;
 455                                         #gpio-lines = <22>;
 456                                         interrupt-controller;
 457                                         #interrupt-cells = <2>;
 458                                 };
 459                         };
 460
 461                         ssc0: ssc@f0010000 {
 462                                 compatible = "atmel,at91sam9g45-ssc";
 463                                 reg = <0xf0010000 0x4000>;
 464                                 interrupts = <28 4 5>;
 465                                 pinctrl-names = "default";
 466                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 467                                 status = "disabled";
 468                         };
 469
 470                         mmc0: mmc@f0008000 {
 471                                 compatible = "atmel,hsmci";
 472                                 reg = <0xf0008000 0x600>;
 473                                 interrupts = <12 4 0>;
 474                                 dmas = <&dma0 1 0>;
 475                                 dma-names = "rxtx";
 476                                 #address-cells = <1>;
 477                                 #size-cells = <0>;
 478                                 status = "disabled";
 479                         };
 480
 481                         mmc1: mmc@f000c000 {
 482                                 compatible = "atmel,hsmci";
 483                                 reg = <0xf000c000 0x600>;
 484                                 interrupts = <26 4 0>;
 485                                 dmas = <&dma1 1 0>;
 486                                 dma-names = "rxtx";
 487                                 #address-cells = <1>;
 488                                 #size-cells = <0>;
 489                                 status = "disabled";
 490                         };
 491
 492                         dbgu: serial@fffff200 {
 493                                 compatible = "atmel,at91sam9260-usart";
 494                                 reg = <0xfffff200 0x200>;
 495                                 interrupts = <1 4 7>;
 496                                 pinctrl-names = "default";
 497                                 pinctrl-0 = <&pinctrl_dbgu>;
 498                                 status = "disabled";
 499                         };
 500
 501                         usart0: serial@f801c000 {
 502                                 compatible = "atmel,at91sam9260-usart";
 503                                 reg = <0xf801c000 0x200>;
 504                                 interrupts = <5 4 5>;
 505                                 pinctrl-names = "default";
 506                                 pinctrl-0 = <&pinctrl_usart0>;
 507                                 status = "disabled";
 508                         };
 509
 510                         usart1: serial@f8020000 {
 511                                 compatible = "atmel,at91sam9260-usart";
 512                                 reg = <0xf8020000 0x200>;
 513                                 interrupts = <6 4 5>;
 514                                 pinctrl-names = "default";
 515                                 pinctrl-0 = <&pinctrl_usart1>;
 516                                 status = "disabled";
 517                         };
 518
 519                         usart2: serial@f8024000 {
 520                                 compatible = "atmel,at91sam9260-usart";
 521                                 reg = <0xf8024000 0x200>;
 522                                 interrupts = <7 4 5>;
 523                                 pinctrl-names = "default";
 524                                 pinctrl-0 = <&pinctrl_usart2>;
 525                                 status = "disabled";
 526                         };
 527
 528                         macb0: ethernet@f802c000 {
 529                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 530                                 reg = <0xf802c000 0x100>;
 531                                 interrupts = <24 4 3>;
 532                                 pinctrl-names = "default";
 533                                 pinctrl-0 = <&pinctrl_macb0_rmii>;
 534                                 status = "disabled";
 535                         };
 536
 537                         macb1: ethernet@f8030000 {
 538                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 539                                 reg = <0xf8030000 0x100>;
 540                                 interrupts = <27 4 3>;
 541                                 status = "disabled";
 542                         };
 543
 544                         i2c0: i2c@f8010000 {
 545                                 compatible = "atmel,at91sam9x5-i2c";
 546                                 reg = <0xf8010000 0x100>;
 547                                 interrupts = <9 4 6>;
 548                                 dmas = <&dma0 1 7>,
 549                                        <&dma0 1 8>;
 550                                 dma-names = "tx", "rx";
 551                                 #address-cells = <1>;
 552                                 #size-cells = <0>;
 553                                 pinctrl-names = "default";
 554                                 pinctrl-0 = <&pinctrl_i2c0>;
 555                                 status = "disabled";
 556                         };
 557
 558                         i2c1: i2c@f8014000 {
 559                                 compatible = "atmel,at91sam9x5-i2c";
 560                                 reg = <0xf8014000 0x100>;
 561                                 interrupts = <10 4 6>;
 562                                 dmas = <&dma1 1 5>,
 563                                        <&dma1 1 6>;
 564                                 dma-names = "tx", "rx";
 565                                 #address-cells = <1>;
 566                                 #size-cells = <0>;
 567                                 pinctrl-names = "default";
 568                                 pinctrl-0 = <&pinctrl_i2c1>;
 569                                 status = "disabled";
 570                         };
 571
 572                         i2c2: i2c@f8018000 {
 573                                 compatible = "atmel,at91sam9x5-i2c";
 574                                 reg = <0xf8018000 0x100>;
 575                                 interrupts = <11 4 6>;
 576                                 dmas = <&dma0 1 9>,
 577                                        <&dma0 1 10>;
 578                                 dma-names = "tx", "rx";
 579                                 #address-cells = <1>;
 580                                 #size-cells = <0>;
 581                                 pinctrl-names = "default";
 582                                 pinctrl-0 = <&pinctrl_i2c2>;
 583                                 status = "disabled";
 584                         };
 585
 586                         adc0: adc@f804c000 {
 587                                 compatible = "atmel,at91sam9260-adc";
 588                                 reg = <0xf804c000 0x100>;
 589                                 interrupts = <19 4 0>;
 590                                 atmel,adc-use-external;
 591                                 atmel,adc-channels-used = <0xffff>;
 592                                 atmel,adc-vref = <3300>;
 593                                 atmel,adc-num-channels = <12>;
 594                                 atmel,adc-startup-time = <40>;
 595                                 atmel,adc-channel-base = <0x50>;
 596                                 atmel,adc-drdy-mask = <0x1000000>;
 597                                 atmel,adc-status-register = <0x30>;
 598                                 atmel,adc-trigger-register = <0xc0>;
 599                                 atmel,adc-res = <8 10>;
 600                                 atmel,adc-res-names = "lowres", "highres";
 601                                 atmel,adc-use-res = "highres";
 602
 603                                 trigger@0 {
 604                                         trigger-name = "external-rising";
 605                                         trigger-value = <0x1>;
 606                                         trigger-external;
 607                                 };
 608
 609                                 trigger@1 {
 610                                         trigger-name = "external-falling";
 611                                         trigger-value = <0x2>;
 612                                         trigger-external;
 613                                 };
 614
 615                                 trigger@2 {
 616                                         trigger-name = "external-any";
 617                                         trigger-value = <0x3>;
 618                                         trigger-external;
 619                                 };
 620
 621                                 trigger@3 {
 622                                         trigger-name = "continuous";
 623                                         trigger-value = <0x6>;
 624                                 };
 625                         };
 626
 627                         spi0: spi@f0000000 {
 628                                 #address-cells = <1>;
 629                                 #size-cells = <0>;
 630                                 compatible = "atmel,at91rm9200-spi";
 631                                 reg = <0xf0000000 0x100>;
 632                                 interrupts = <13 4 3>;
 633                                 pinctrl-names = "default";
 634                                 pinctrl-0 = <&pinctrl_spi0>;
 635                                 status = "disabled";
 636                         };
 637
 638                         spi1: spi@f0004000 {
 639                                 #address-cells = <1>;
 640                                 #size-cells = <0>;
 641                                 compatible = "atmel,at91rm9200-spi";
 642                                 reg = <0xf0004000 0x100>;
 643                                 interrupts = <14 4 3>;
 644                                 pinctrl-names = "default";
 645                                 pinctrl-0 = <&pinctrl_spi1>;
 646                                 status = "disabled";
 647                         };
 648
 649                         rtc@fffffeb0 {
 650                                 compatible = "atmel,at91sam9x5-rtc";
 651                                 reg = <0xfffffeb0 0x40>;
 652                                 interrupts = <1 4 7>;
 653                                 status = "disabled";
 654                         };
 655                 };
 656
 657                 nand0: nand@40000000 {
 658                         compatible = "atmel,at91rm9200-nand";
 659                         #address-cells = <1>;
 660                         #size-cells = <1>;
 661                         reg = <0x40000000 0x10000000
 662                                0xffffe000 0x600         /* PMECC Registers */
 663                                0xffffe600 0x200         /* PMECC Error Location Registers */
 664                                0x00108000 0x18000       /* PMECC looup table in ROM code  */
 665                               >;
 666                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
 667                         atmel,nand-addr-offset = <21>;
 668                         atmel,nand-cmd-offset = <22>;
 669                         pinctrl-names = "default";
 670                         pinctrl-0 = <&pinctrl_nand>;
 671                         gpios = <&pioD 5 0
 672                                  &pioD 4 0
 673                                  0
 674                                 >;
 675                         status = "disabled";
 676                 };
 677
 678                 usb0: ohci@00600000 {
 679                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 680                         reg = <0x00600000 0x100000>;
 681                         interrupts = <22 4 2>;
 682                         status = "disabled";
 683                 };
 684
 685                 usb1: ehci@00700000 {
 686                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 687                         reg = <0x00700000 0x100000>;
 688                         interrupts = <22 4 2>;
 689                         status = "disabled";
 690                 };
 691         };
 692
 693         i2c@0 {
 694                 compatible = "i2c-gpio";
 695                 gpios = <&pioA 30 0 /* sda */
 696                          &pioA 31 0 /* scl */
 697                         >;
 698                 i2c-gpio,sda-open-drain;
 699                 i2c-gpio,scl-open-drain;
 700                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 701                 #address-cells = <1>;
 702                 #size-cells = <0>;
 703                 pinctrl-names = "default";
 704                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
 705                 status = "disabled";
 706         };
 707
 708         i2c@1 {
 709                 compatible = "i2c-gpio";
 710                 gpios = <&pioC 0 0 /* sda */
 711                          &pioC 1 0 /* scl */
 712                         >;
 713                 i2c-gpio,sda-open-drain;
 714                 i2c-gpio,scl-open-drain;
 715                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 716                 #address-cells = <1>;
 717                 #size-cells = <0>;
 718                 pinctrl-names = "default";
 719                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
 720                 status = "disabled";
 721         };
 722
 723         i2c@2 {
 724                 compatible = "i2c-gpio";
 725                 gpios = <&pioB 4 0 /* sda */
 726                          &pioB 5 0 /* scl */
 727                         >;
 728                 i2c-gpio,sda-open-drain;
 729                 i2c-gpio,scl-open-drain;
 730                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 731                 #address-cells = <1>;
 732                 #size-cells = <0>;
 733                 pinctrl-names = "default";
 734                 pinctrl-0 = <&pinctrl_i2c_gpio2>;
 735                 status = "disabled";
 736         };
 737 };