2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
6 * Licensed under GPLv2 or later.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/clk/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Atmel AT91SAM9RL family SoC";
17 compatible = "atmel,at91sam9rl", "atmel,at91sam9";
18 interrupt-parent = <&aic>;
42 compatible = "arm,arm926ej-s";
48 reg = <0x20000000 0x04000000>;
52 compatible = "simple-bus";
57 nand0: nand@40000000 {
58 compatible = "atmel,at91rm9200-nand";
61 reg = <0x40000000 0x10000000>,
63 atmel,nand-addr-offset = <21>;
64 atmel,nand-cmd-offset = <22>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_nand>;
67 gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
68 <&pioB 6 GPIO_ACTIVE_HIGH>,
74 compatible = "simple-bus";
79 tcb0: timer@fffa0000 {
80 compatible = "atmel,at91rm9200-tcb";
81 reg = <0xfffa0000 0x100>;
82 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
83 <17 IRQ_TYPE_LEVEL_HIGH 0>,
84 <18 IRQ_TYPE_LEVEL_HIGH 0>;
85 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
86 clock-names = "t0_clk", "t1_clk", "t2_clk";
90 compatible = "atmel,hsmci";
91 reg = <0xfffa4000 0x600>;
92 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
95 pinctrl-names = "default";
97 clock-names = "mci_clk";
102 compatible = "atmel,at91sam9260-i2c";
103 reg = <0xfffa8000 0x100>;
104 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
105 #address-cells = <1>;
107 clocks = <&twi0_clk>;
112 compatible = "atmel,at91sam9260-i2c";
113 reg = <0xfffac000 0x100>;
114 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
115 #address-cells = <1>;
120 usart0: serial@fffb0000 {
121 compatible = "atmel,at91sam9260-usart";
122 reg = <0xfffb0000 0x200>;
123 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_usart0>;
128 clocks = <&usart0_clk>;
129 clock-names = "usart";
133 usart1: serial@fffb4000 {
134 compatible = "atmel,at91sam9260-usart";
135 reg = <0xfffb4000 0x200>;
136 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_usart1>;
141 clocks = <&usart1_clk>;
142 clock-names = "usart";
146 usart2: serial@fffb8000 {
147 compatible = "atmel,at91sam9260-usart";
148 reg = <0xfffb8000 0x200>;
149 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_usart2>;
154 clocks = <&usart2_clk>;
155 clock-names = "usart";
159 usart3: serial@fffbc000 {
160 compatible = "atmel,at91sam9260-usart";
161 reg = <0xfffbc000 0x200>;
162 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usart3>;
167 clocks = <&usart3_clk>;
168 clock-names = "usart";
173 compatible = "atmel,at91rm9200-ssc";
174 reg = <0xfffc0000 0x4000>;
175 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
182 compatible = "atmel,at91rm9200-ssc";
183 reg = <0xfffc4000 0x4000>;
184 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
191 #address-cells = <1>;
193 compatible = "atmel,at91rm9200-spi";
194 reg = <0xfffcc000 0x200>;
195 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_spi0>;
198 clocks = <&spi0_clk>;
199 clock-names = "spi_clk";
203 ramc0: ramc@ffffea00 {
204 compatible = "atmel,at91sam9260-sdramc";
205 reg = <0xffffea00 0x200>;
208 aic: interrupt-controller@fffff000 {
209 #interrupt-cells = <3>;
210 compatible = "atmel,at91rm9200-aic";
211 interrupt-controller;
212 reg = <0xfffff000 0x200>;
213 atmel,external-irqs = <31>;
216 dbgu: serial@fffff200 {
217 compatible = "atmel,at91sam9260-usart";
218 reg = <0xfffff200 0x200>;
219 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_dbgu>;
223 clock-names = "usart";
228 #address-cells = <1>;
230 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
231 ranges = <0xfffff400 0xfffff400 0x800>;
235 <0xffffffff 0xe05c6738>, /* pioA */
236 <0xffffffff 0x0000c780>, /* pioB */
237 <0xffffffff 0xe3ffff0e>, /* pioC */
238 <0x003fffff 0x0001ff3c>; /* pioD */
240 /* shared pinctrl settings */
242 pinctrl_dbgu: dbgu-0 {
244 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
245 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
250 pinctrl_i2c_gpio0: i2c_gpio0-0 {
252 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
253 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
258 pinctrl_i2c_gpio1: i2c_gpio1-0 {
260 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
261 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
266 pinctrl_mmc0_clk: mmc0_clk-0 {
268 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
271 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
273 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
274 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
277 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
279 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
280 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
281 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
286 pinctrl_nand: nand-0 {
288 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
289 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
292 pinctrl_nand0_ale_cle: nand_ale_cle-0 {
294 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
295 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
298 pinctrl_nand0_oe_we: nand_oe_we-0 {
300 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
301 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
304 pinctrl_nand0_cs: nand_cs-0 {
306 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
311 pinctrl_ssc0_tx: ssc0_tx-0 {
313 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
314 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
315 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
318 pinctrl_ssc0_rx: ssc0_rx-0 {
320 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
321 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
322 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
327 pinctrl_ssc1_tx: ssc1_tx-0 {
329 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
330 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
331 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
334 pinctrl_ssc1_rx: ssc1_rx-0 {
336 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
337 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
338 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
343 pinctrl_spi0: spi0-0 {
345 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
346 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
347 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
352 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
353 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
356 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
357 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
360 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
361 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
364 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
365 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
368 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
369 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
372 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
373 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
376 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
377 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
380 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
381 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
384 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
385 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
390 pinctrl_usart0: usart0-0 {
392 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
393 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
396 pinctrl_usart0_rts: usart0_rts-0 {
398 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
401 pinctrl_usart0_cts: usart0_cts-0 {
403 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
406 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
408 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
409 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
412 pinctrl_usart0_dcd: usart0_dcd-0 {
414 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
417 pinctrl_usart0_ri: usart0_ri-0 {
419 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
422 pinctrl_usart0_sck: usart0_sck-0 {
424 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
429 pinctrl_usart1: usart1-0 {
431 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
432 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
435 pinctrl_usart1_rts: usart1_rts-0 {
437 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
440 pinctrl_usart1_cts: usart1_cts-0 {
442 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
445 pinctrl_usart1_sck: usart1_sck-0 {
447 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
452 pinctrl_usart2: usart2-0 {
454 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
455 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
458 pinctrl_usart2_rts: usart2_rts-0 {
460 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
463 pinctrl_usart2_cts: usart2_cts-0 {
465 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
468 pinctrl_usart2_sck: usart2_sck-0 {
470 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
475 pinctrl_usart3: usart3-0 {
477 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
478 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
481 pinctrl_usart3_rts: usart3_rts-0 {
483 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
486 pinctrl_usart3_cts: usart3_cts-0 {
488 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
491 pinctrl_usart3_sck: usart3_sck-0 {
493 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
497 pioA: gpio@fffff400 {
498 compatible = "atmel,at91rm9200-gpio";
499 reg = <0xfffff400 0x200>;
500 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
503 interrupt-controller;
504 #interrupt-cells = <2>;
505 clocks = <&pioA_clk>;
508 pioB: gpio@fffff600 {
509 compatible = "atmel,at91rm9200-gpio";
510 reg = <0xfffff600 0x200>;
511 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
514 interrupt-controller;
515 #interrupt-cells = <2>;
516 clocks = <&pioB_clk>;
519 pioC: gpio@fffff800 {
520 compatible = "atmel,at91rm9200-gpio";
521 reg = <0xfffff800 0x200>;
522 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
525 interrupt-controller;
526 #interrupt-cells = <2>;
527 clocks = <&pioC_clk>;
530 pioD: gpio@fffffa00 {
531 compatible = "atmel,at91rm9200-gpio";
532 reg = <0xfffffa00 0x200>;
533 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
536 interrupt-controller;
537 #interrupt-cells = <2>;
538 clocks = <&pioD_clk>;
543 compatible = "atmel,at91sam9g45-pmc";
544 reg = <0xfffffc00 0x100>;
545 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
546 interrupt-controller;
547 #address-cells = <1>;
549 #interrupt-cells = <1>;
552 compatible = "fixed-clock";
554 clock-frequency = <32768>;
558 compatible = "atmel,at91rm9200-clk-main";
560 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
565 compatible = "atmel,at91rm9200-clk-pll";
567 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
570 atmel,clk-input-range = <1000000 32000000>;
571 #atmel,pll-clk-output-range-cells = <4>;
572 atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
576 compatible = "atmel,at91sam9x5-clk-utmi";
578 interrupt-parent = <&pmc>;
579 interrupts = <AT91_PMC_LOCKU>;
584 compatible = "atmel,at91rm9200-clk-master";
586 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
587 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
588 atmel,clk-output-range = <0 94000000>;
589 atmel,clk-divisors = <1 2 4 3>;
593 compatible = "atmel,at91rm9200-clk-programmable";
594 #address-cells = <1>;
596 interrupt-parent = <&pmc>;
597 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
602 interrupts = <AT91_PMC_PCKRDY(0)>;
608 interrupts = <AT91_PMC_PCKRDY(1)>;
613 compatible = "atmel,at91rm9200-clk-system";
614 #address-cells = <1>;
632 compatible = "atmel,at91rm9200-clk-peripheral";
633 #address-cells = <1>;
657 usart0_clk: usart0_clk {
662 usart1_clk: usart1_clk {
667 usart2_clk: usart2_clk {
672 usart3_clk: usart3_clk {
737 udphs_clk: udphs_clk {
750 compatible = "atmel,at91sam9260-rstc";
751 reg = <0xfffffd00 0x10>;
755 compatible = "atmel,at91sam9260-shdwc";
756 reg = <0xfffffd10 0x10>;
759 pit: timer@fffffd30 {
760 compatible = "atmel,at91sam9260-pit";
761 reg = <0xfffffd30 0xf>;
762 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
767 compatible = "atmel,at91sam9260-wdt";
768 reg = <0xfffffd40 0x10>;
769 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
776 compatible = "i2c-gpio";
777 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
778 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
779 i2c-gpio,sda-open-drain;
780 i2c-gpio,scl-open-drain;
781 i2c-gpio,delay-us = <2>; /* ~100 kHz */
782 #address-cells = <1>;
784 pinctrl-names = "default";
785 pinctrl-0 = <&pinctrl_i2c_gpio0>;
790 compatible = "i2c-gpio";
791 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
792 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
793 i2c-gpio,sda-open-drain;
794 i2c-gpio,scl-open-drain;
795 i2c-gpio,delay-us = <2>; /* ~100 kHz */
796 #address-cells = <1>;
798 pinctrl-names = "default";
799 pinctrl-0 = <&pinctrl_i2c_gpio1>;