2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
7 * Licensed under GPLv2 or later.
10 /include/ "skeleton.dtsi"
13 model = "Atmel AT91SAM9N12 SoC";
14 compatible = "atmel,at91sam9n12";
15 interrupt-parent = <&aic>;
34 compatible = "arm,arm926ejs";
39 reg = <0x20000000 0x10000000>;
43 compatible = "simple-bus";
49 compatible = "simple-bus";
54 aic: interrupt-controller@fffff000 {
55 #interrupt-cells = <3>;
56 compatible = "atmel,at91rm9200-aic";
58 reg = <0xfffff000 0x200>;
61 ramc0: ramc@ffffe800 {
62 compatible = "atmel,at91sam9g45-ddramc";
63 reg = <0xffffe800 0x200>;
67 compatible = "atmel,at91rm9200-pmc";
68 reg = <0xfffffc00 0x100>;
72 compatible = "atmel,at91sam9g45-rstc";
73 reg = <0xfffffe00 0x10>;
77 compatible = "atmel,at91sam9260-pit";
78 reg = <0xfffffe30 0xf>;
83 compatible = "atmel,at91sam9x5-shdwc";
84 reg = <0xfffffe10 0x10>;
87 tcb0: timer@f8008000 {
88 compatible = "atmel,at91sam9x5-tcb";
89 reg = <0xf8008000 0x100>;
90 interrupts = <17 4 0>;
93 tcb1: timer@f800c000 {
94 compatible = "atmel,at91sam9x5-tcb";
95 reg = <0xf800c000 0x100>;
96 interrupts = <17 4 0>;
99 dma: dma-controller@ffffec00 {
100 compatible = "atmel,at91sam9g45-dma";
101 reg = <0xffffec00 0x200>;
102 interrupts = <20 4 0>;
106 #address-cells = <1>;
108 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
109 ranges = <0xfffff400 0xfffff400 0x800>;
111 pioA: gpio@fffff400 {
112 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
113 reg = <0xfffff400 0x200>;
114 interrupts = <2 4 1>;
117 interrupt-controller;
118 #interrupt-cells = <2>;
121 pioB: gpio@fffff600 {
122 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
123 reg = <0xfffff600 0x200>;
124 interrupts = <2 4 1>;
127 interrupt-controller;
128 #interrupt-cells = <2>;
131 pioC: gpio@fffff800 {
132 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
133 reg = <0xfffff800 0x200>;
134 interrupts = <3 4 1>;
137 interrupt-controller;
138 #interrupt-cells = <2>;
141 pioD: gpio@fffffa00 {
142 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
143 reg = <0xfffffa00 0x200>;
144 interrupts = <3 4 1>;
147 interrupt-controller;
148 #interrupt-cells = <2>;
152 dbgu: serial@fffff200 {
153 compatible = "atmel,at91sam9260-usart";
154 reg = <0xfffff200 0x200>;
155 interrupts = <1 4 7>;
159 usart0: serial@f801c000 {
160 compatible = "atmel,at91sam9260-usart";
161 reg = <0xf801c000 0x4000>;
162 interrupts = <5 4 5>;
168 usart1: serial@f8020000 {
169 compatible = "atmel,at91sam9260-usart";
170 reg = <0xf8020000 0x4000>;
171 interrupts = <6 4 5>;
177 usart2: serial@f8024000 {
178 compatible = "atmel,at91sam9260-usart";
179 reg = <0xf8024000 0x4000>;
180 interrupts = <7 4 5>;
186 usart3: serial@f8028000 {
187 compatible = "atmel,at91sam9260-usart";
188 reg = <0xf8028000 0x4000>;
189 interrupts = <8 4 5>;
196 compatible = "atmel,at91sam9x5-i2c";
197 reg = <0xf8010000 0x100>;
198 interrupts = <9 4 6>;
199 #address-cells = <1>;
205 compatible = "atmel,at91sam9x5-i2c";
206 reg = <0xf8014000 0x100>;
207 interrupts = <10 4 6>;
208 #address-cells = <1>;
214 nand0: nand@40000000 {
215 compatible = "atmel,at91rm9200-nand";
216 #address-cells = <1>;
218 reg = < 0x40000000 0x10000000
219 0xffffe000 0x00000600
220 0xffffe600 0x00000200
221 0x00100000 0x00100000
223 atmel,nand-addr-offset = <21>;
224 atmel,nand-cmd-offset = <22>;
232 usb0: ohci@00500000 {
233 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
234 reg = <0x00500000 0x00100000>;
235 interrupts = <22 4 2>;
241 compatible = "i2c-gpio";
242 gpios = <&pioA 30 0 /* sda */
245 i2c-gpio,sda-open-drain;
246 i2c-gpio,scl-open-drain;
247 i2c-gpio,delay-us = <2>; /* ~100 kHz */
248 #address-cells = <1>;