arch/arm/boot/dts/at91sam9n12.dtsi

   1 /*
   2  * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
   3  *
   4  *  Copyright (C) 2012 Atmel,
   5  *                2012 Hong Xu <hong.xu@atmel.com>
   6  *
   7  * Licensed under GPLv2 or later.
   8  */
   9
  10 /include/ "skeleton.dtsi"
  11
  12 / {
  13         model = "Atmel AT91SAM9N12 SoC";
  14         compatible = "atmel,at91sam9n12";
  15         interrupt-parent = <&aic>;
  16
  17         aliases {
  18                 serial0 = &dbgu;
  19                 serial1 = &usart0;
  20                 serial2 = &usart1;
  21                 serial3 = &usart2;
  22                 serial4 = &usart3;
  23                 gpio0 = &pioA;
  24                 gpio1 = &pioB;
  25                 gpio2 = &pioC;
  26                 gpio3 = &pioD;
  27                 tcb0 = &tcb0;
  28                 tcb1 = &tcb1;
  29                 i2c0 = &i2c0;
  30                 i2c1 = &i2c1;
  31                 ssc0 = &ssc0;
  32         };
  33         cpus {
  34                 #address-cells = <0>;
  35                 #size-cells = <0>;
  36
  37                 cpu {
  38                         compatible = "arm,arm926ej-s";
  39                         device_type = "cpu";
  40                 };
  41         };
  42
  43         memory {
  44                 reg = <0x20000000 0x10000000>;
  45         };
  46
  47         ahb {
  48                 compatible = "simple-bus";
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 ranges;
  52
  53                 apb {
  54                         compatible = "simple-bus";
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges;
  58
  59                         aic: interrupt-controller@fffff000 {
  60                                 #interrupt-cells = <3>;
  61                                 compatible = "atmel,at91rm9200-aic";
  62                                 interrupt-controller;
  63                                 reg = <0xfffff000 0x200>;
  64                                 atmel,external-irqs = <31>;
  65                         };
  66
  67                         ramc0: ramc@ffffe800 {
  68                                 compatible = "atmel,at91sam9g45-ddramc";
  69                                 reg = <0xffffe800 0x200>;
  70                         };
  71
  72                         pmc: pmc@fffffc00 {
  73                                 compatible = "atmel,at91rm9200-pmc";
  74                                 reg = <0xfffffc00 0x100>;
  75                         };
  76
  77                         rstc@fffffe00 {
  78                                 compatible = "atmel,at91sam9g45-rstc";
  79                                 reg = <0xfffffe00 0x10>;
  80                         };
  81
  82                         pit: timer@fffffe30 {
  83                                 compatible = "atmel,at91sam9260-pit";
  84                                 reg = <0xfffffe30 0xf>;
  85                                 interrupts = <1 4 7>;
  86                         };
  87
  88                         shdwc@fffffe10 {
  89                                 compatible = "atmel,at91sam9x5-shdwc";
  90                                 reg = <0xfffffe10 0x10>;
  91                         };
  92
  93                         mmc0: mmc@f0008000 {
  94                                 compatible = "atmel,hsmci";
  95                                 reg = <0xf0008000 0x600>;
  96                                 interrupts = <12 4 0>;
  97                                 dmas = <&dma 1 0>;
  98                                 dma-names = "rxtx";
  99                                 #address-cells = <1>;
 100                                 #size-cells = <0>;
 101                                 status = "disabled";
 102                         };
 103
 104                         tcb0: timer@f8008000 {
 105                                 compatible = "atmel,at91sam9x5-tcb";
 106                                 reg = <0xf8008000 0x100>;
 107                                 interrupts = <17 4 0>;
 108                         };
 109
 110                         tcb1: timer@f800c000 {
 111                                 compatible = "atmel,at91sam9x5-tcb";
 112                                 reg = <0xf800c000 0x100>;
 113                                 interrupts = <17 4 0>;
 114                         };
 115
 116                         dma: dma-controller@ffffec00 {
 117                                 compatible = "atmel,at91sam9g45-dma";
 118                                 reg = <0xffffec00 0x200>;
 119                                 interrupts = <20 4 0>;
 120                                 #dma-cells = <2>;
 121                         };
 122
 123                         pinctrl@fffff400 {
 124                                 #address-cells = <1>;
 125                                 #size-cells = <1>;
 126                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 127                                 ranges = <0xfffff400 0xfffff400 0x800>;
 128
 129                                 atmel,mux-mask = <
 130                                       /*    A         B          C     */
 131                                        0xffffffff 0xffe07983 0x00000000  /* pioA */
 132                                        0x00040000 0x00047e0f 0x00000000  /* pioB */
 133                                        0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
 134                                        0x003fffff 0x003f8000 0x00000000  /* pioD */
 135                                       >;
 136
 137                                 /* shared pinctrl settings */
 138                                 dbgu {
 139                                         pinctrl_dbgu: dbgu-0 {
 140                                                 atmel,pins =
 141                                                         <0 9 0x1 0x0    /* PA9 periph A */
 142                                                          0 10 0x1 0x1>; /* PA10 periph with pullup */
 143                                         };
 144                                 };
 145
 146                                 usart0 {
 147                                         pinctrl_usart0: usart0-0 {
 148                                                 atmel,pins =
 149                                                         <0 1 0x1 0x1    /* PA1 periph A with pullup */
 150                                                          0 0 0x1 0x0>;  /* PA0 periph A */
 151                                         };
 152
 153                                         pinctrl_usart0_rts: usart0_rts-0 {
 154                                                 atmel,pins =
 155                                                         <0 2 0x1 0x0>;  /* PA2 periph A */
 156                                         };
 157
 158                                         pinctrl_usart0_cts: usart0_cts-0 {
 159                                                 atmel,pins =
 160                                                         <0 3 0x1 0x0>;  /* PA3 periph A */
 161                                         };
 162                                 };
 163
 164                                 usart1 {
 165                                         pinctrl_usart1: usart1-0 {
 166                                                 atmel,pins =
 167                                                         <0 6 0x1 0x1    /* PA6 periph A with pullup */
 168                                                          0 5 0x1 0x0>;  /* PA5 periph A */
 169                                         };
 170                                 };
 171
 172                                 usart2 {
 173                                         pinctrl_usart2: usart2-0 {
 174                                                 atmel,pins =
 175                                                         <0 8 0x1 0x1    /* PA8 periph A with pullup */
 176                                                          0 7 0x1 0x0>;  /* PA7 periph A */
 177                                         };
 178
 179                                         pinctrl_usart2_rts: usart2_rts-0 {
 180                                                 atmel,pins =
 181                                                         <1 0 0x2 0x0>;  /* PB0 periph B */
 182                                         };
 183
 184                                         pinctrl_usart2_cts: usart2_cts-0 {
 185                                                 atmel,pins =
 186                                                         <1 1 0x2 0x0>;  /* PB1 periph B */
 187                                         };
 188                                 };
 189
 190                                 usart3 {
 191                                         pinctrl_usart3: usart3-0 {
 192                                                 atmel,pins =
 193                                                         <2 23 0x2 0x1   /* PC23 periph B with pullup */
 194                                                          2 22 0x2 0x0>; /* PC22 periph B */
 195                                         };
 196
 197                                         pinctrl_usart3_rts: usart3_rts-0 {
 198                                                 atmel,pins =
 199                                                         <2 24 0x2 0x0>; /* PC24 periph B */
 200                                         };
 201
 202                                         pinctrl_usart3_cts: usart3_cts-0 {
 203                                                 atmel,pins =
 204                                                         <2 25 0x2 0x0>; /* PC25 periph B */
 205                                         };
 206                                 };
 207
 208                                 uart0 {
 209                                         pinctrl_uart0: uart0-0 {
 210                                                 atmel,pins =
 211                                                         <2 9 0x3 0x1    /* PC9 periph C with pullup */
 212                                                          2 8 0x3 0x0>;  /* PC8 periph C */
 213                                         };
 214                                 };
 215
 216                                 uart1 {
 217                                         pinctrl_uart1: uart1-0 {
 218                                                 atmel,pins =
 219                                                         <2 16 0x3 0x1   /* PC17 periph C with pullup */
 220                                                          2 17 0x3 0x0>; /* PC16 periph C */
 221                                         };
 222                                 };
 223
 224                                 nand {
 225                                         pinctrl_nand: nand-0 {
 226                                                 atmel,pins =
 227                                                         <3 5 0x0 0x1    /* PD5 gpio RDY pin pull_up*/
 228                                                          3 4 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
 229                                         };
 230                                 };
 231
 232                                 mmc0 {
 233                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 234                                                 atmel,pins =
 235                                                         <0 17 0x1 0x0   /* PA17 periph A */
 236                                                          0 16 0x1 0x1   /* PA16 periph A with pullup */
 237                                                          0 15 0x1 0x1>; /* PA15 periph A with pullup */
 238                                         };
 239
 240                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 241                                                 atmel,pins =
 242                                                         <0 18 0x1 0x1   /* PA18 periph A with pullup */
 243                                                          0 19 0x1 0x1   /* PA19 periph A with pullup */
 244                                                          0 20 0x1 0x1>; /* PA20 periph A with pullup */
 245                                         };
 246
 247                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 248                                                 atmel,pins =
 249                                                         <0 11 0x2 0x1   /* PA11 periph B with pullup */
 250                                                          0 12 0x2 0x1   /* PA12 periph B with pullup */
 251                                                          0 13 0x2 0x1   /* PA13 periph B with pullup */
 252                                                          0 14 0x2 0x1>; /* PA14 periph B with pullup */
 253                                         };
 254                                 };
 255
 256                                 ssc0 {
 257                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 258                                                 atmel,pins =
 259                                                         <0 24 0x2 0x0   /* PA24 periph B */
 260                                                          0 25 0x2 0x0   /* PA25 periph B */
 261                                                          0 26 0x2 0x0>; /* PA26 periph B */
 262                                         };
 263
 264                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 265                                                 atmel,pins =
 266                                                         <0 27 0x2 0x0   /* PA27 periph B */
 267                                                          0 28 0x2 0x0   /* PA28 periph B */
 268                                                          0 29 0x2 0x0>; /* PA29 periph B */
 269                                         };
 270                                 };
 271
 272                                 spi0 {
 273                                         pinctrl_spi0: spi0-0 {
 274                                                 atmel,pins =
 275                                                         <0 11 0x1 0x0   /* PA11 periph A SPI0_MISO pin */
 276                                                          0 12 0x1 0x0   /* PA12 periph A SPI0_MOSI pin */
 277                                                          0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
 278                                         };
 279                                 };
 280
 281                                 spi1 {
 282                                         pinctrl_spi1: spi1-0 {
 283                                                 atmel,pins =
 284                                                         <0 21 0x2 0x0   /* PA21 periph B SPI1_MISO pin */
 285                                                          0 22 0x2 0x0   /* PA22 periph B SPI1_MOSI pin */
 286                                                          0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
 287                                         };
 288                                 };
 289
 290                                 pioA: gpio@fffff400 {
 291                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 292                                         reg = <0xfffff400 0x200>;
 293                                         interrupts = <2 4 1>;
 294                                         #gpio-cells = <2>;
 295                                         gpio-controller;
 296                                         interrupt-controller;
 297                                         #interrupt-cells = <2>;
 298                                 };
 299
 300                                 pioB: gpio@fffff600 {
 301                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 302                                         reg = <0xfffff600 0x200>;
 303                                         interrupts = <2 4 1>;
 304                                         #gpio-cells = <2>;
 305                                         gpio-controller;
 306                                         interrupt-controller;
 307                                         #interrupt-cells = <2>;
 308                                 };
 309
 310                                 pioC: gpio@fffff800 {
 311                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 312                                         reg = <0xfffff800 0x200>;
 313                                         interrupts = <3 4 1>;
 314                                         #gpio-cells = <2>;
 315                                         gpio-controller;
 316                                         interrupt-controller;
 317                                         #interrupt-cells = <2>;
 318                                 };
 319
 320                                 pioD: gpio@fffffa00 {
 321                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 322                                         reg = <0xfffffa00 0x200>;
 323                                         interrupts = <3 4 1>;
 324                                         #gpio-cells = <2>;
 325                                         gpio-controller;
 326                                         interrupt-controller;
 327                                         #interrupt-cells = <2>;
 328                                 };
 329                         };
 330
 331                         dbgu: serial@fffff200 {
 332                                 compatible = "atmel,at91sam9260-usart";
 333                                 reg = <0xfffff200 0x200>;
 334                                 interrupts = <1 4 7>;
 335                                 pinctrl-names = "default";
 336                                 pinctrl-0 = <&pinctrl_dbgu>;
 337                                 status = "disabled";
 338                         };
 339
 340                         ssc0: ssc@f0010000 {
 341                                 compatible = "atmel,at91sam9g45-ssc";
 342                                 reg = <0xf0010000 0x4000>;
 343                                 interrupts = <28 4 5>;
 344                                 pinctrl-names = "default";
 345                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 346                                 status = "disabled";
 347                         };
 348
 349                         usart0: serial@f801c000 {
 350                                 compatible = "atmel,at91sam9260-usart";
 351                                 reg = <0xf801c000 0x4000>;
 352                                 interrupts = <5 4 5>;
 353                                 pinctrl-names = "default";
 354                                 pinctrl-0 = <&pinctrl_usart0>;
 355                                 status = "disabled";
 356                         };
 357
 358                         usart1: serial@f8020000 {
 359                                 compatible = "atmel,at91sam9260-usart";
 360                                 reg = <0xf8020000 0x4000>;
 361                                 interrupts = <6 4 5>;
 362                                 pinctrl-names = "default";
 363                                 pinctrl-0 = <&pinctrl_usart1>;
 364                                 status = "disabled";
 365                         };
 366
 367                         usart2: serial@f8024000 {
 368                                 compatible = "atmel,at91sam9260-usart";
 369                                 reg = <0xf8024000 0x4000>;
 370                                 interrupts = <7 4 5>;
 371                                 pinctrl-names = "default";
 372                                 pinctrl-0 = <&pinctrl_usart2>;
 373                                 status = "disabled";
 374                         };
 375
 376                         usart3: serial@f8028000 {
 377                                 compatible = "atmel,at91sam9260-usart";
 378                                 reg = <0xf8028000 0x4000>;
 379                                 interrupts = <8 4 5>;
 380                                 pinctrl-names = "default";
 381                                 pinctrl-0 = <&pinctrl_usart3>;
 382                                 status = "disabled";
 383                         };
 384
 385                         i2c0: i2c@f8010000 {
 386                                 compatible = "atmel,at91sam9x5-i2c";
 387                                 reg = <0xf8010000 0x100>;
 388                                 interrupts = <9 4 6>;
 389                                 dmas = <&dma 1 13>,
 390                                        <&dma 1 14>;
 391                                 dma-names = "tx", "rx";
 392                                 #address-cells = <1>;
 393                                 #size-cells = <0>;
 394                                 status = "disabled";
 395                         };
 396
 397                         i2c1: i2c@f8014000 {
 398                                 compatible = "atmel,at91sam9x5-i2c";
 399                                 reg = <0xf8014000 0x100>;
 400                                 interrupts = <10 4 6>;
 401                                 dmas = <&dma 1 15>,
 402                                        <&dma 1 16>;
 403                                 dma-names = "tx", "rx";
 404                                 #address-cells = <1>;
 405                                 #size-cells = <0>;
 406                                 status = "disabled";
 407                         };
 408
 409                         spi0: spi@f0000000 {
 410                                 #address-cells = <1>;
 411                                 #size-cells = <0>;
 412                                 compatible = "atmel,at91rm9200-spi";
 413                                 reg = <0xf0000000 0x100>;
 414                                 interrupts = <13 4 3>;
 415                                 pinctrl-names = "default";
 416                                 pinctrl-0 = <&pinctrl_spi0>;
 417                                 status = "disabled";
 418                         };
 419
 420                         spi1: spi@f0004000 {
 421                                 #address-cells = <1>;
 422                                 #size-cells = <0>;
 423                                 compatible = "atmel,at91rm9200-spi";
 424                                 reg = <0xf0004000 0x100>;
 425                                 interrupts = <14 4 3>;
 426                                 pinctrl-names = "default";
 427                                 pinctrl-0 = <&pinctrl_spi1>;
 428                                 status = "disabled";
 429                         };
 430                 };
 431
 432                 nand0: nand@40000000 {
 433                         compatible = "atmel,at91rm9200-nand";
 434                         #address-cells = <1>;
 435                         #size-cells = <1>;
 436                         reg = < 0x40000000 0x10000000
 437                                 0xffffe000 0x00000600
 438                                 0xffffe600 0x00000200
 439                                 0x00108000 0x00018000
 440                                >;
 441                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
 442                         atmel,nand-addr-offset = <21>;
 443                         atmel,nand-cmd-offset = <22>;
 444                         pinctrl-names = "default";
 445                         pinctrl-0 = <&pinctrl_nand>;
 446                         gpios = <&pioD 5 0
 447                                  &pioD 4 0
 448                                  0
 449                                 >;
 450                         status = "disabled";
 451                 };
 452
 453                 usb0: ohci@00500000 {
 454                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 455                         reg = <0x00500000 0x00100000>;
 456                         interrupts = <22 4 2>;
 457                         status = "disabled";
 458                 };
 459         };
 460
 461         i2c@0 {
 462                 compatible = "i2c-gpio";
 463                 gpios = <&pioA 30 0 /* sda */
 464                          &pioA 31 0 /* scl */
 465                         >;
 466                 i2c-gpio,sda-open-drain;
 467                 i2c-gpio,scl-open-drain;
 468                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 469                 #address-cells = <1>;
 470                 #size-cells = <0>;
 471                 status = "disabled";
 472         };
 473 };