2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
7 * Licensed under GPLv2 or later.
10 /include/ "skeleton.dtsi"
13 model = "Atmel AT91SAM9N12 SoC";
14 compatible = "atmel,at91sam9n12";
15 interrupt-parent = <&aic>;
34 compatible = "arm,arm926ejs";
39 reg = <0x20000000 0x10000000>;
43 compatible = "simple-bus";
49 compatible = "simple-bus";
54 aic: interrupt-controller@fffff000 {
55 #interrupt-cells = <3>;
56 compatible = "atmel,at91rm9200-aic";
58 reg = <0xfffff000 0x200>;
61 ramc0: ramc@ffffe800 {
62 compatible = "atmel,at91sam9g45-ddramc";
63 reg = <0xffffe800 0x200>;
67 compatible = "atmel,at91rm9200-pmc";
68 reg = <0xfffffc00 0x100>;
72 compatible = "atmel,at91sam9g45-rstc";
73 reg = <0xfffffe00 0x10>;
77 compatible = "atmel,at91sam9260-pit";
78 reg = <0xfffffe30 0xf>;
83 compatible = "atmel,at91sam9x5-shdwc";
84 reg = <0xfffffe10 0x10>;
87 tcb0: timer@f8008000 {
88 compatible = "atmel,at91sam9x5-tcb";
89 reg = <0xf8008000 0x100>;
90 interrupts = <17 4 0>;
93 tcb1: timer@f800c000 {
94 compatible = "atmel,at91sam9x5-tcb";
95 reg = <0xf800c000 0x100>;
96 interrupts = <17 4 0>;
99 dma: dma-controller@ffffec00 {
100 compatible = "atmel,at91sam9g45-dma";
101 reg = <0xffffec00 0x200>;
102 interrupts = <20 4 0>;
105 pioA: gpio@fffff400 {
106 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
107 reg = <0xfffff400 0x100>;
108 interrupts = <2 4 1>;
111 interrupt-controller;
112 #interrupt-cells = <2>;
115 pioB: gpio@fffff600 {
116 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
117 reg = <0xfffff600 0x100>;
118 interrupts = <2 4 1>;
121 interrupt-controller;
122 #interrupt-cells = <2>;
125 pioC: gpio@fffff800 {
126 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
127 reg = <0xfffff800 0x100>;
128 interrupts = <3 4 1>;
131 interrupt-controller;
132 #interrupt-cells = <2>;
135 pioD: gpio@fffffa00 {
136 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
137 reg = <0xfffffa00 0x100>;
138 interrupts = <3 4 1>;
141 interrupt-controller;
142 #interrupt-cells = <2>;
145 dbgu: serial@fffff200 {
146 compatible = "atmel,at91sam9260-usart";
147 reg = <0xfffff200 0x200>;
148 interrupts = <1 4 7>;
152 usart0: serial@f801c000 {
153 compatible = "atmel,at91sam9260-usart";
154 reg = <0xf801c000 0x4000>;
155 interrupts = <5 4 5>;
161 usart1: serial@f8020000 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xf8020000 0x4000>;
164 interrupts = <6 4 5>;
170 usart2: serial@f8024000 {
171 compatible = "atmel,at91sam9260-usart";
172 reg = <0xf8024000 0x4000>;
173 interrupts = <7 4 5>;
179 usart3: serial@f8028000 {
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xf8028000 0x4000>;
182 interrupts = <8 4 5>;
189 compatible = "atmel,at91sam9x5-i2c";
190 reg = <0xf8010000 0x100>;
191 interrupts = <9 4 6>;
192 #address-cells = <1>;
198 compatible = "atmel,at91sam9x5-i2c";
199 reg = <0xf8014000 0x100>;
200 interrupts = <10 4 6>;
201 #address-cells = <1>;
207 nand0: nand@40000000 {
208 compatible = "atmel,at91rm9200-nand";
209 #address-cells = <1>;
211 reg = < 0x40000000 0x10000000
212 0xffffe000 0x00000600
213 0xffffe600 0x00000200
214 0x00100000 0x00100000
216 atmel,nand-addr-offset = <21>;
217 atmel,nand-cmd-offset = <22>;
225 usb0: ohci@00500000 {
226 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
227 reg = <0x00500000 0x00100000>;
228 interrupts = <22 4 2>;
234 compatible = "i2c-gpio";
235 gpios = <&pioA 30 0 /* sda */
238 i2c-gpio,sda-open-drain;
239 i2c-gpio,scl-open-drain;
240 i2c-gpio,delay-us = <2>; /* ~100 kHz */
241 #address-cells = <1>;