2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91SAM9G45 family SoC";
21 compatible = "atmel,at91sam9g45";
22 interrupt-parent = <&aic>;
48 compatible = "arm,arm926ej-s";
54 reg = <0x70000000 0x10000000>;
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
61 clock-frequency = <0>;
64 main_xtal: main_xtal {
65 compatible = "fixed-clock";
67 clock-frequency = <0>;
70 adc_op_clk: adc_op_clk{
71 compatible = "fixed-clock";
73 clock-frequency = <300000>;
78 compatible = "simple-bus";
84 compatible = "simple-bus";
89 aic: interrupt-controller@fffff000 {
90 #interrupt-cells = <3>;
91 compatible = "atmel,at91rm9200-aic";
93 reg = <0xfffff000 0x200>;
94 atmel,external-irqs = <31>;
97 ramc0: ramc@ffffe400 {
98 compatible = "atmel,at91sam9g45-ddramc";
99 reg = <0xffffe400 0x200
102 clock-names = "ddrck";
106 compatible = "atmel,at91sam9g45-pmc";
107 reg = <0xfffffc00 0x100>;
108 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
109 interrupt-controller;
110 #address-cells = <1>;
112 #interrupt-cells = <1>;
115 compatible = "atmel,at91rm9200-clk-main-osc";
117 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
118 clocks = <&main_xtal>;
122 compatible = "atmel,at91rm9200-clk-main";
124 clocks = <&main_osc>;
128 compatible = "atmel,at91rm9200-clk-pll";
130 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
133 atmel,clk-input-range = <2000000 32000000>;
134 #atmel,pll-clk-output-range-cells = <4>;
135 atmel,pll-clk-output-ranges = <745000000 800000000 0 0
136 695000000 750000000 1 0
137 645000000 700000000 2 0
138 595000000 650000000 3 0
139 545000000 600000000 0 1
140 495000000 555000000 1 1
141 445000000 500000000 2 1
142 400000000 450000000 3 1>;
146 compatible = "atmel,at91sam9x5-clk-plldiv";
152 compatible = "atmel,at91sam9x5-clk-utmi";
154 interrupts-extended = <&pmc AT91_PMC_LOCKU>;
159 compatible = "atmel,at91rm9200-clk-master";
161 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
162 clocks = <&slow_xtal>, <&main>, <&plladiv>, <&utmi>;
163 atmel,clk-output-range = <0 133333333>;
164 atmel,clk-divisors = <1 2 4 3>;
168 compatible = "atmel,at91sam9x5-clk-usb";
170 clocks = <&plladiv>, <&utmi>;
174 compatible = "atmel,at91sam9g45-clk-programmable";
175 #address-cells = <1>;
177 interrupt-parent = <&pmc>;
178 clocks = <&slow_xtal>, <&main>, <&plladiv>, <&utmi>, <&mck>;
183 interrupts = <AT91_PMC_PCKRDY(0)>;
189 interrupts = <AT91_PMC_PCKRDY(1)>;
194 compatible = "atmel,at91rm9200-clk-system";
195 #address-cells = <1>;
224 compatible = "atmel,at91rm9200-clk-peripheral";
225 #address-cells = <1>;
244 pioDE_clk: pioDE_clk {
254 usart0_clk: usart0_clk {
259 usart1_clk: usart1_clk {
264 usart2_clk: usart2_clk {
269 usart3_clk: usart3_clk {
329 uhphs_clk: uhphs_clk {
344 macb0_clk: macb0_clk {
354 udphs_clk: udphs_clk {
359 aestdessha_clk: aestdessha_clk {
377 compatible = "atmel,at91sam9g45-rstc";
378 reg = <0xfffffd00 0x10>;
381 pit: timer@fffffd30 {
382 compatible = "atmel,at91sam9260-pit";
383 reg = <0xfffffd30 0xf>;
384 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
390 compatible = "atmel,at91sam9rl-shdwc";
391 reg = <0xfffffd10 0x10>;
394 tcb0: timer@fff7c000 {
395 compatible = "atmel,at91rm9200-tcb";
396 reg = <0xfff7c000 0x100>;
397 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
398 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
399 clock-names = "t0_clk", "t1_clk", "t2_clk";
402 tcb1: timer@fffd4000 {
403 compatible = "atmel,at91rm9200-tcb";
404 reg = <0xfffd4000 0x100>;
405 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
406 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
407 clock-names = "t0_clk", "t1_clk", "t2_clk";
410 dma: dma-controller@ffffec00 {
411 compatible = "atmel,at91sam9g45-dma";
412 reg = <0xffffec00 0x200>;
413 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
415 clocks = <&dma0_clk>;
416 clock-names = "dma_clk";
420 #address-cells = <1>;
422 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
423 ranges = <0xfffff200 0xfffff200 0xa00>;
427 0xffffffff 0xffc003ff /* pioA */
428 0xffffffff 0x800f8f00 /* pioB */
429 0xffffffff 0x00000e00 /* pioC */
430 0xffffffff 0xff0c1381 /* pioD */
431 0xffffffff 0x81ffff81 /* pioE */
434 /* shared pinctrl settings */
436 pinctrl_adc0_adtrg: adc0_adtrg {
437 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
439 pinctrl_adc0_ad0: adc0_ad0 {
440 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
442 pinctrl_adc0_ad1: adc0_ad1 {
443 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
445 pinctrl_adc0_ad2: adc0_ad2 {
446 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
448 pinctrl_adc0_ad3: adc0_ad3 {
449 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
451 pinctrl_adc0_ad4: adc0_ad4 {
452 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
454 pinctrl_adc0_ad5: adc0_ad5 {
455 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
457 pinctrl_adc0_ad6: adc0_ad6 {
458 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
460 pinctrl_adc0_ad7: adc0_ad7 {
461 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
466 pinctrl_dbgu: dbgu-0 {
468 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
469 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
474 pinctrl_i2c0: i2c0-0 {
476 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
477 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
482 pinctrl_i2c1: i2c1-0 {
484 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
485 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
490 pinctrl_usart0: usart0-0 {
492 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
493 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
496 pinctrl_usart0_rts: usart0_rts-0 {
498 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
501 pinctrl_usart0_cts: usart0_cts-0 {
503 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
508 pinctrl_usart1: usart1-0 {
510 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
511 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
514 pinctrl_usart1_rts: usart1_rts-0 {
516 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
519 pinctrl_usart1_cts: usart1_cts-0 {
521 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
526 pinctrl_usart2: usart2-0 {
528 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
529 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
532 pinctrl_usart2_rts: usart2_rts-0 {
534 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
537 pinctrl_usart2_cts: usart2_cts-0 {
539 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
544 pinctrl_usart3: usart3-0 {
546 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
547 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
550 pinctrl_usart3_rts: usart3_rts-0 {
552 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
555 pinctrl_usart3_cts: usart3_cts-0 {
557 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
562 pinctrl_nand: nand-0 {
564 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
565 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
570 pinctrl_macb_rmii: macb_rmii-0 {
572 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
573 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
574 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
575 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
576 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
577 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
578 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
579 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
580 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
581 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
584 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
586 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
587 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
588 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
589 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
590 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
591 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
592 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
593 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
598 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
600 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
601 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
602 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
605 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
607 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
608 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
609 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
612 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
614 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
615 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
616 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
617 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
622 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
624 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
625 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
626 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
629 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
631 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
632 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
633 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
636 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
638 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
639 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
640 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
641 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
646 pinctrl_ssc0_tx: ssc0_tx-0 {
648 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
649 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
650 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
653 pinctrl_ssc0_rx: ssc0_rx-0 {
655 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
656 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
657 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
662 pinctrl_ssc1_tx: ssc1_tx-0 {
664 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
665 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
666 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
669 pinctrl_ssc1_rx: ssc1_rx-0 {
671 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
672 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
673 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
678 pinctrl_spi0: spi0-0 {
680 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
681 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
682 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
687 pinctrl_spi1: spi1-0 {
689 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
690 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
691 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
696 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
697 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
700 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
701 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
704 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
705 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
708 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
709 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
712 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
713 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
716 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
717 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
720 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
721 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
724 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
725 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
728 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
729 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
734 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
735 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
738 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
739 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
742 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
743 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
746 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
747 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
750 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
751 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
754 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
755 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
758 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
759 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
762 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
763 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
766 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
767 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
774 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
775 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
776 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
777 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
778 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
779 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
780 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
781 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
782 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
783 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
784 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
785 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
786 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
787 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
788 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
789 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
790 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
791 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
792 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
793 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
794 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
795 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
796 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
797 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
798 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
799 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
800 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
801 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
802 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
803 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
807 pioA: gpio@fffff200 {
808 compatible = "atmel,at91rm9200-gpio";
809 reg = <0xfffff200 0x200>;
810 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
813 interrupt-controller;
814 #interrupt-cells = <2>;
815 clocks = <&pioA_clk>;
818 pioB: gpio@fffff400 {
819 compatible = "atmel,at91rm9200-gpio";
820 reg = <0xfffff400 0x200>;
821 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
824 interrupt-controller;
825 #interrupt-cells = <2>;
826 clocks = <&pioB_clk>;
829 pioC: gpio@fffff600 {
830 compatible = "atmel,at91rm9200-gpio";
831 reg = <0xfffff600 0x200>;
832 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
835 interrupt-controller;
836 #interrupt-cells = <2>;
837 clocks = <&pioC_clk>;
840 pioD: gpio@fffff800 {
841 compatible = "atmel,at91rm9200-gpio";
842 reg = <0xfffff800 0x200>;
843 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
846 interrupt-controller;
847 #interrupt-cells = <2>;
848 clocks = <&pioDE_clk>;
851 pioE: gpio@fffffa00 {
852 compatible = "atmel,at91rm9200-gpio";
853 reg = <0xfffffa00 0x200>;
854 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
857 interrupt-controller;
858 #interrupt-cells = <2>;
859 clocks = <&pioDE_clk>;
863 dbgu: serial@ffffee00 {
864 compatible = "atmel,at91sam9260-usart";
865 reg = <0xffffee00 0x200>;
866 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
867 pinctrl-names = "default";
868 pinctrl-0 = <&pinctrl_dbgu>;
870 clock-names = "usart";
874 usart0: serial@fff8c000 {
875 compatible = "atmel,at91sam9260-usart";
876 reg = <0xfff8c000 0x200>;
877 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
880 pinctrl-names = "default";
881 pinctrl-0 = <&pinctrl_usart0>;
882 clocks = <&usart0_clk>;
883 clock-names = "usart";
887 usart1: serial@fff90000 {
888 compatible = "atmel,at91sam9260-usart";
889 reg = <0xfff90000 0x200>;
890 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
893 pinctrl-names = "default";
894 pinctrl-0 = <&pinctrl_usart1>;
895 clocks = <&usart1_clk>;
896 clock-names = "usart";
900 usart2: serial@fff94000 {
901 compatible = "atmel,at91sam9260-usart";
902 reg = <0xfff94000 0x200>;
903 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
906 pinctrl-names = "default";
907 pinctrl-0 = <&pinctrl_usart2>;
908 clocks = <&usart2_clk>;
909 clock-names = "usart";
913 usart3: serial@fff98000 {
914 compatible = "atmel,at91sam9260-usart";
915 reg = <0xfff98000 0x200>;
916 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
919 pinctrl-names = "default";
920 pinctrl-0 = <&pinctrl_usart3>;
921 clocks = <&usart3_clk>;
922 clock-names = "usart";
926 macb0: ethernet@fffbc000 {
927 compatible = "cdns,at32ap7000-macb", "cdns,macb";
928 reg = <0xfffbc000 0x100>;
929 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
930 pinctrl-names = "default";
931 pinctrl-0 = <&pinctrl_macb_rmii>;
932 clocks = <&macb0_clk>, <&macb0_clk>;
933 clock-names = "hclk", "pclk";
938 compatible = "atmel,at91sam9g10-i2c";
939 reg = <0xfff84000 0x100>;
940 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
941 pinctrl-names = "default";
942 pinctrl-0 = <&pinctrl_i2c0>;
943 #address-cells = <1>;
945 clocks = <&twi0_clk>;
950 compatible = "atmel,at91sam9g10-i2c";
951 reg = <0xfff88000 0x100>;
952 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
953 pinctrl-names = "default";
954 pinctrl-0 = <&pinctrl_i2c1>;
955 #address-cells = <1>;
957 clocks = <&twi1_clk>;
962 compatible = "atmel,at91sam9g45-ssc";
963 reg = <0xfff9c000 0x4000>;
964 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
965 pinctrl-names = "default";
966 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
967 clocks = <&ssc0_clk>;
968 clock-names = "pclk";
973 compatible = "atmel,at91sam9g45-ssc";
974 reg = <0xfffa0000 0x4000>;
975 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
976 pinctrl-names = "default";
977 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
978 clocks = <&ssc1_clk>;
979 clock-names = "pclk";
984 #address-cells = <1>;
986 compatible = "atmel,at91sam9g45-adc";
987 reg = <0xfffb0000 0x100>;
988 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
989 clocks = <&adc_clk>, <&adc_op_clk>;
990 clock-names = "adc_clk", "adc_op_clk";
991 atmel,adc-channels-used = <0xff>;
992 atmel,adc-vref = <3300>;
993 atmel,adc-startup-time = <40>;
994 atmel,adc-res = <8 10>;
995 atmel,adc-res-names = "lowres", "highres";
996 atmel,adc-use-res = "highres";
1000 trigger-name = "external-rising";
1001 trigger-value = <0x1>;
1006 trigger-name = "external-falling";
1007 trigger-value = <0x2>;
1013 trigger-name = "external-any";
1014 trigger-value = <0x3>;
1020 trigger-name = "continuous";
1021 trigger-value = <0x6>;
1025 pwm0: pwm@fffb8000 {
1026 compatible = "atmel,at91sam9rl-pwm";
1027 reg = <0xfffb8000 0x300>;
1028 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
1030 clocks = <&pwm_clk>;
1031 status = "disabled";
1034 mmc0: mmc@fff80000 {
1035 compatible = "atmel,hsmci";
1036 reg = <0xfff80000 0x600>;
1037 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1038 pinctrl-names = "default";
1039 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
1041 #address-cells = <1>;
1043 clocks = <&mci0_clk>;
1044 clock-names = "mci_clk";
1045 status = "disabled";
1048 mmc1: mmc@fffd0000 {
1049 compatible = "atmel,hsmci";
1050 reg = <0xfffd0000 0x600>;
1051 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
1052 pinctrl-names = "default";
1053 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
1055 #address-cells = <1>;
1057 clocks = <&mci1_clk>;
1058 clock-names = "mci_clk";
1059 status = "disabled";
1063 compatible = "atmel,at91sam9260-wdt";
1064 reg = <0xfffffd40 0x10>;
1065 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1066 atmel,watchdog-type = "hardware";
1067 atmel,reset-type = "all";
1070 status = "disabled";
1073 spi0: spi@fffa4000 {
1074 #address-cells = <1>;
1076 compatible = "atmel,at91rm9200-spi";
1077 reg = <0xfffa4000 0x200>;
1078 interrupts = <14 4 3>;
1079 pinctrl-names = "default";
1080 pinctrl-0 = <&pinctrl_spi0>;
1081 clocks = <&spi0_clk>;
1082 clock-names = "spi_clk";
1083 status = "disabled";
1086 spi1: spi@fffa8000 {
1087 #address-cells = <1>;
1089 compatible = "atmel,at91rm9200-spi";
1090 reg = <0xfffa8000 0x200>;
1091 interrupts = <15 4 3>;
1092 pinctrl-names = "default";
1093 pinctrl-0 = <&pinctrl_spi1>;
1094 clocks = <&spi1_clk>;
1095 clock-names = "spi_clk";
1096 status = "disabled";
1099 usb2: gadget@fff78000 {
1100 #address-cells = <1>;
1102 compatible = "atmel,at91sam9rl-udc";
1103 reg = <0x00600000 0x80000
1105 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
1106 clocks = <&udphs_clk>, <&utmi>;
1107 clock-names = "pclk", "hclk";
1108 status = "disabled";
1112 atmel,fifo-size = <64>;
1113 atmel,nb-banks = <1>;
1118 atmel,fifo-size = <1024>;
1119 atmel,nb-banks = <2>;
1126 atmel,fifo-size = <1024>;
1127 atmel,nb-banks = <2>;
1134 atmel,fifo-size = <1024>;
1135 atmel,nb-banks = <3>;
1141 atmel,fifo-size = <1024>;
1142 atmel,nb-banks = <3>;
1148 atmel,fifo-size = <1024>;
1149 atmel,nb-banks = <3>;
1156 atmel,fifo-size = <1024>;
1157 atmel,nb-banks = <3>;
1164 fb0: fb@0x00500000 {
1165 compatible = "atmel,at91sam9g45-lcdc";
1166 reg = <0x00500000 0x1000>;
1167 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
1168 pinctrl-names = "default";
1169 pinctrl-0 = <&pinctrl_fb>;
1170 clocks = <&lcd_clk>, <&lcd_clk>;
1171 clock-names = "hclk", "lcdc_clk";
1172 status = "disabled";
1175 nand0: nand@40000000 {
1176 compatible = "atmel,at91rm9200-nand";
1177 #address-cells = <1>;
1179 reg = <0x40000000 0x10000000
1182 atmel,nand-addr-offset = <21>;
1183 atmel,nand-cmd-offset = <22>;
1185 pinctrl-names = "default";
1186 pinctrl-0 = <&pinctrl_nand>;
1187 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
1188 &pioC 14 GPIO_ACTIVE_HIGH
1191 status = "disabled";
1194 usb0: ohci@00700000 {
1195 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1196 reg = <0x00700000 0x100000>;
1197 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1199 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1200 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1201 status = "disabled";
1204 usb1: ehci@00800000 {
1205 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1206 reg = <0x00800000 0x100000>;
1207 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1209 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1210 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
1211 status = "disabled";
1216 compatible = "i2c-gpio";
1217 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
1218 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
1220 i2c-gpio,sda-open-drain;
1221 i2c-gpio,scl-open-drain;
1222 i2c-gpio,delay-us = <5>; /* ~100 kHz */
1223 #address-cells = <1>;
1225 status = "disabled";